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aa310.cpp
2032 lines (1697 loc) · 91 KB
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aa310.cpp
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// license:LGPL-2.1+
// copyright-holders:Angelo Salese, R. Belmont, Juergen Buchmueller, Nigel Barnes
/******************************************************************************
*
* Acorn Archimedes
*
* AKB10 - Archimedes 305
* AKB15 - Archimedes 310
* AKB20 - Archimedes 440
* AKB26 - Archimedes 410 (advertised but not known to be produced)
* AKB01 - BBC A3000
* AKB40 - Archimedes 410/1
* AKB42 - Archimedes 420/1
* AKB44 - Archimedes 440/1
* AKB50 - Archimedes 540
* ALB22 - Acorn A5000 2MB HD 80
* ALB24 - Acorn A5000 4MB HD 120
* AKB62 - Acorn A4 2MB FD
* AKB64 - Acorn A4 4MB HD 60
* AGB11 - Acorn A3010
* AGB22 - Acorn A3020 FD
* AGB23 - Acorn A3020 HD 60
* AGB33 - Acorn A3020 HD 80
* AGC10 - Acorn A4000
* AGC20 - Acorn A4000 2MB HD 80
* UNX11 - R140 Workstation
* UNX22 - R225 Discless Workstation
* UNX26 - R260 8MB Workstation
*
* Supplied IDE Hard Drives:
* 60MB Connor CP2064
* 85MB Conner CP30084E
* 99MB Fujitsu M2616ET
* 105MB Connor CFS105A
* 210MB Connor CFS210A
*
* Notes:
* - Hold DEL down during boot reset the CMOS memory to the default values.
* - default NVRAM is plainly wrong. Use the status/configure commands to set up properly
* (Scroll Lock is currently mapped with Right SHIFT, use this to move to next page of status).
* In order to load a floppy, you need at very least:
* - configure floppies 1
* - configure filesystem adfs
* - configure monitortype 12
* Then reboot / reset the machine, and use cat to (attempt) to load a floppy contents.
*
* TODO:
* - RISC OS Draw app uses unimplemented copro instructions
* - Add ABORT line support to the ARM core.
* - HD63463 Hard disc controller.
*
=======================================================================================
*
* Memory map (from http://b-em.bbcmicro.com/arculator/archdocs.txt)
*
* 0000000 - 1FFFFFF - logical RAM (32 meg)
* 2000000 - 2FFFFFF - physical RAM (supervisor only - max 16MB - requires quad MEMCs)
* 3000000 - 33FFFFF - IOC (IO controllers - supervisor only)
* 3310000 - FDC - WD1772
* 33A0000 - Econet - 6854
* 33B0000 - Serial - 6551
* 3240000 - 33FFFFF - internal expansion cards
* 32D0000 - hard disc controller (not IDE) - HD63463
* 3350010 - printer
* 3350018 - latch A
* 3350040 - latch B
* 3270000 - external expansion cards
*
* 3400000 - 3FFFFFF - ROM (read - 12 meg - Arthur and RiscOS 2 512k, RiscOS 3 2MB)
* 3400000 - 37FFFFF - Low ROM (4 meg, I think this is expansion ROMs)
* 3800000 - 3FFFFFF - High ROM (main OS ROM)
*
* 3400000 - 35FFFFF - VICD10 (write - supervisor only)
* 3600000 - 3FFFFFF - MEMC (write - supervisor only)
*
=======================================================================================
*
* Archimedes IOC interrupts:
* IL0 Podule FIQ
* IL1 Sound Empty
* IL2 Serial
* IL3 HDD
* IL4 Disc Change
* IL5 Podule IRQ
* IL6 Printer Busy
* IL7 Serial Ring
* IF Printer Ack
* IR VBL
* POR Reset
* FH0 Floppy DRQ
* FH1 Floppy IRQ
* FL Econet
*
*****************************************************************************/
/*
DASM of code (bios 2 / RISC OS 2)
0x380d4e0: MEMC: control to 0x10c (page size 32 kbytes, DRAM ram refresh only during flyback)
0x380d4f0: VIDC: params (screen + sound frequency)
0x380d51c: IOC: sets control to 0xff, clear IRQA and FIQ masks, sets IRQB mask to 0x80 (keyboard receive full irq)
0x380d530: IOC: sets timer 0 to 0x4e20, go command
0x380e0a8: work RAM physical check, max size etc.
0x380e1f8: IOC: Disables DRAM ram refresh, sets timer 1 to 0x7ffe, go command, then it tests the latch of this timer, enables DRAM refresh
0x380d00c: Set up default logical space
0x380d16c: Set up case by case logical space
*/
#include "emu.h"
#include "cpu/arm/arm.h"
#include "machine/acorn_bmu.h"
#include "machine/acorn_ioc.h"
#include "machine/acorn_lc.h"
#include "machine/acorn_memc.h"
#include "machine/acorn_vidc.h"
#include "machine/archimedes_keyb.h"
#include "machine/ds2401.h"
//#include "machine/hd63463.h"
#include "machine/i2cmem.h"
#include "machine/mc6854.h"
#include "machine/mos6551.h"
#include "machine/pcf8573.h"
#include "machine/pcf8583.h"
#include "machine/ram.h"
#include "machine/upc82c710.h"
#include "machine/upc82c711.h"
#include "machine/wd_fdc.h"
#include "machine/wd33c9x.h"
#include "machine/z80scc.h"
#include "bus/archimedes/econet/slot.h"
#include "bus/archimedes/podule/slot.h"
//#include "bus/archimedes/test/slot.h"
#include "bus/centronics/ctronics.h"
#include "bus/centronics/spjoy.h"
#include "bus/econet/econet.h"
#include "bus/generic/slot.h"
#include "bus/generic/carts.h"
#include "bus/nscsi/devices.h"
#include "bus/rs232/rs232.h"
#include "imagedev/floppy.h"
#include "imagedev/harddriv.h"
#include "formats/acorn_dsk.h"
#include "formats/apd_dsk.h"
#include "formats/jfd_dsk.h"
#include "formats/st_dsk.h"
#include "screen.h"
#include "softlist.h"
#include "speaker.h"
#define LOG_POST (1U << 1)
#define VERBOSE (LOG_POST)
#include "logmacro.h"
namespace {
class aabase_state : public driver_device
{
public:
aabase_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
, m_maincpu(*this, "maincpu")
, m_ioc(*this, "ioc")
, m_memc(*this, "memc")
, m_vidc(*this, "vidc")
, m_exp(*this, "exp")
, m_podule(*this, "podule%u", 0U)
, m_ram(*this, RAM_TAG)
, m_joy(*this, "joy_p%u", 1U)
, m_selected_floppy(nullptr)
{ }
void aabase(machine_config &config);
void init_r225();
void init_flop();
void init_hd();
void init_scsi();
void init_ide();
void init_a4();
protected:
u32 dram_r(offs_t offset, u32 mem_mask = ~0);
void dram_w(offs_t offset, u32 data, u32 mem_mask = ~0);
virtual void machine_start() override;
static void floppy_formats(format_registration &fr);
void arm_map(address_map &map);
virtual void memc_map(address_map &map);
void post_debug(int post_state);
required_device<arm_cpu_device> m_maincpu;
required_device<acorn_ioc_device> m_ioc;
required_device<acorn_memc_device> m_memc;
required_device<acorn_vidc10_device> m_vidc;
required_device<archimedes_exp_device> m_exp;
optional_device_array<archimedes_podule_slot_device, 4> m_podule;
required_device<ram_device> m_ram;
optional_ioport_array<2> m_joy;
floppy_image_device *m_selected_floppy;
std::unique_ptr<u32[]> m_dram;
};
class aa500_state : public aabase_state
{
public:
aa500_state(const machine_config &mconfig, device_type type, const char *tag)
: aabase_state(mconfig, type, tag)
, m_fdc(*this, "fdc")
, m_floppy(*this, "fdc:%u", 0U)
//, m_hdc(*this, "hdc")
, m_adlc(*this, "adlc")
, m_centronics(*this, "centronics")
, m_cent_data_out(*this, "cent_data_out")
, m_i2cmem(*this, "i2cmem")
, m_rtc(*this, "rtc")
{ }
void aa500(machine_config &config);
void aa500d(machine_config &config);
protected:
virtual void machine_reset() override;
u32 peripheral5_r(offs_t offset);
void peripheral5_w(offs_t offset, u32 data);
void peripheral6_w(offs_t offset, u32 data);
private:
required_device<fd1793_device> m_fdc;
optional_device_array<floppy_connector, 2> m_floppy;
//required_device<hd63463_device> m_hdc;
required_device<mc6854_device> m_adlc;
required_device<centronics_device> m_centronics;
required_device<output_latch_device> m_cent_data_out;
required_device<i2c_pcf8570_device> m_i2cmem;
required_device<pcf8573_device> m_rtc;
};
class aa310_state : public aabase_state
{
public:
aa310_state(const machine_config &mconfig, device_type type, const char *tag)
: aabase_state(mconfig, type, tag)
, m_fdc(*this, "fdc")
, m_floppy(*this, "fdc:%u", 0U)
//, m_hdc(*this, "hdc")
//, m_test(*this, "test")
, m_centronics(*this, "centronics")
, m_cent_data_out(*this, "cent_data_out")
{ }
void aa305(machine_config &config);
void aa310(machine_config &config);
void aa440(machine_config &config);
void aa4101(machine_config &config);
void aa4201(machine_config &config);
void aa4401(machine_config &config);
void ar140(machine_config &config);
void aa540(machine_config &config);
void ar225(machine_config &config);
void ar260(machine_config &config);
void aa3000(machine_config &config);
protected:
virtual void machine_reset() override;
u32 peripheral5_r(offs_t offset);
void peripheral5_w(offs_t offset, u32 data);
private:
required_device<wd1772_device> m_fdc;
optional_device_array<floppy_connector, 4> m_floppy;
//optional_device<hd63463_device> m_hdc;
//optional_device<archimedes_test_slot_device> m_test;
required_device<centronics_device> m_centronics;
required_device<output_latch_device> m_cent_data_out;
};
class aa680_state : public aabase_state
{
public:
aa680_state(const machine_config &mconfig, device_type type, const char *tag)
: aabase_state(mconfig, type, tag)
, m_fdc(*this, "fdc")
, m_floppy(*this, "fdc:%u", 0U)
, m_scsi(*this, "scsi:7:wd33c93a")
, m_centronics(*this, "centronics")
, m_cent_data_out(*this, "cent_data_out")
, m_cent_ctrl_out(*this, "cent_ctrl_out")
, m_cent_status_in(*this, "cent_status_in")
, m_hex_display(0)
{ }
void am4(machine_config &config);
void aa680(machine_config &config);
protected:
virtual void machine_reset() override;
virtual void memc_map(address_map &map) override;
u32 peripheral5_r(offs_t offset);
void peripheral5_w(offs_t offset, u32 data);
private:
required_device<fd1793_device> m_fdc;
optional_device_array<floppy_connector, 2> m_floppy;
required_device<wd33c93a_device> m_scsi;
required_device<centronics_device> m_centronics;
required_device<output_latch_device> m_cent_data_out;
required_device<output_latch_device> m_cent_ctrl_out;
required_device<input_buffer_device> m_cent_status_in;
u8 m_hex_display;
};
class aa4000_state : public aabase_state
{
public:
aa4000_state(const machine_config &mconfig, device_type type, const char *tag)
: aabase_state(mconfig, type, tag)
, m_i2cmem(*this,"i2cmem")
, m_floppy(*this, "upc:fdc:%u", 0U)
//, m_test(*this, "test")
, m_ioeb_control(0)
{ }
void aa3010(machine_config &config);
void aa3020(machine_config &config);
void aa4000(machine_config &config);
required_device<pcf8583_device> m_i2cmem;
protected:
virtual void machine_reset() override;
virtual void memc_map(address_map &map) override;
u8 ioeb_r(offs_t offset);
void ioeb_w(offs_t offset, u8 data);
optional_device_array<floppy_connector, 4> m_floppy;
//required_device<archimedes_test_slot_device> m_test;
u8 m_ioeb_control;
};
class aa5000_state : public aa4000_state
{
public:
aa5000_state(const machine_config &mconfig, device_type type, const char *tag)
: aa4000_state(mconfig, type, tag)
, m_ext_rom(*this, "extrom")
, m_ext_region(*this, "extension")
{ }
void aa5000(machine_config &config);
void aa5000a(machine_config &config);
protected:
virtual void memc_map(address_map &map) override;
u8 extension_r(offs_t offset);
required_device<generic_slot_device> m_ext_rom;
required_memory_region m_ext_region;
};
class aa4_state : public aa5000_state
{
public:
aa4_state(const machine_config &mconfig, device_type type, const char *tag)
: aa5000_state(mconfig, type, tag)
, m_lc(*this, "lc")
, m_bmu(*this, "bmu")
{ }
void aa4(machine_config &config);
protected:
virtual void memc_map(address_map &map) override;
private:
required_device<acorn_lc_device> m_lc;
required_device<acorn_bmu_device> m_bmu;
};
void aabase_state::init_r225()
{
u8 *cmos = memregion("i2cmem")->base();
cmos[0x30] = 0x20; // *Configure Autoboot On
cmos[0x36] = 0x01; // *Configure Netboot On
cmos[0xb4] = 0x24; // *Configure Romboard 1 1 1024 *Configure Romboard 1 2 1024
cmos[0xc7] = 0x00; // *Configure Floppies 0
}
void aabase_state::init_flop()
{
u8 *cmos = memregion("i2cmem")->base();
cmos[0xc7] = 0x01; // *Configure Floppies 1
}
void aabase_state::init_hd()
{
//u8 *cmos = memregion("i2cmem")->base();
//cmos[0x4b] = 0x54; // *Configure Drive 4
//cmos[0x50] = 0x90; // *Configure Boot
//cmos[0xc7] = 0x09; // *Configure HardDiscs 1
}
void aabase_state::init_scsi()
{
//u8 *cmos = memregion("i2cmem")->base();
//cmos[0x4b] = 0x54; // *Configure Drive 4
//cmos[0xc7] = 0x08; // *Configure SCSIFSdiscs 1
}
void aabase_state::init_ide()
{
u8 *cmos = memregion("i2cmem")->base();
cmos[0x4b] = 0x54; // *Configure Drive 4
cmos[0xc7] = 0x41; // *Configure IDEDiscs 1
}
void aabase_state::init_a4()
{
u8 *cmos = memregion("i2cmem")->base();
cmos[0x28] = 0x01; // !BatMgr
cmos[0x4b] = 0x54; // *Configure Drive 4
cmos[0xc7] = 0x41; // *Configure IDEDiscs 1
}
u32 aa310_state::peripheral5_r(offs_t offset)
{
switch ((offset << 2) & 0xfc)
{
case 0x20: // HD63463
case 0x24:
return 0; //m_hdc->read(offset);
case 0x08: // HD63463 DACK
case 0x0c:
return 0; //m_hdc->dma_r();
case 0x18: // FDC latch B
return 0x00;
case 0x40: // FDC latch A
return 0x00;
case 0x50: // IOEB not present
return 0x00;
case 0x70: // Monitor Type, TBD
return 0x0f;
case 0x78: // Joystick (A3010 only)
return 0xff;
}
return 0xffffffff;
}
void aa310_state::peripheral5_w(offs_t offset, u32 data)
{
switch ((offset << 2) & 0xfc)
{
case 0x00: // HD63463
case 0x04:
//m_hdc->write(offset, data);
break;
case 0x28: // HD63463 DACK
case 0x2c:
//m_hdc->dma_w(data);
break;
case 0x10: // Printer port
m_cent_data_out->write(data & 0xff);
break;
case 0x18: // Latch B
// xxx- ---- Not used
// ---x ---- Printer Strobe
// ---- x--- FDC Reset
// ---- --x- FDC DDEN
m_fdc->dden_w(BIT(data, 1));
m_fdc->mr_w(BIT(data, 3));
m_centronics->write_strobe(BIT(data, 4));
break;
case 0x40: // Latch A
// x--- ---- Not used
// -x-- ---- Floppy disc INUSE
// --x- ---- Floppy motor
// ---x ---- Side select
// ---- xxxx Floppy disc select
if (!BIT(data, 0)) m_selected_floppy = m_floppy[0]->get_device();
if (!BIT(data, 1)) m_selected_floppy = m_floppy[1]->get_device();
if (!BIT(data, 2)) m_selected_floppy = m_floppy[2]->get_device();
if (!BIT(data, 3)) m_selected_floppy = m_floppy[3]->get_device();
m_fdc->set_floppy(m_selected_floppy);
if (m_selected_floppy)
{
m_selected_floppy->mon_w(BIT(data, 5));
m_selected_floppy->ss_w(!BIT(data, 4));
}
// Debug code to display RISC OS 3 POST failures
//if (BIT(data, 1))
//{
post_debug(BIT(data, 0));
//}
break;
}
}
u32 aa500_state::peripheral5_r(offs_t offset)
{
switch ((offset << 2) & 0xfc)
{
case 0x20: // HD63463
case 0x24:
return 0; //m_hdc->read(offset);
case 0x08: // HD63463 DACK
case 0x0c:
return 0; //m_hdc->dma_r();
case 0x18: // External Latch B
return 0x00;
}
return 0xffffffff;
}
void aa500_state::peripheral5_w(offs_t offset, u32 data)
{
switch ((offset << 2) & 0xfc)
{
case 0x00: // HD63463
case 0x04:
//m_hdc->write(offset, data);
break;
case 0x28: // HD63463 DACK
case 0x2c:
//m_hdc->dma_w(data);
break;
case 0x10: // Printer Data
m_cent_data_out->write(data & 0xff);
break;
case 0x18: // External Latch B
// x--- ---- Head Select 3
// -x-- ---- analogue output Mute
// --x- ---- analogue input Mute
// ---x ---- Printer Strobe
// ---- x--- FDC Controller reset
// ---- -x-- FDC clock frequency control
// ---- --xx Data Separator control
m_fdc->dden_w(BIT(data, 1));
//m_fdc->set_unscaled_clock(24_MHz_XTAL / (BIT(data, 2) ? 24 : 12));
m_fdc->mr_w(BIT(data, 3));
m_centronics->write_strobe(BIT(data, 4));
break;
}
}
void aa500_state::peripheral6_w(offs_t offset, u32 data)
{
switch ((offset << 2) & 0xfc)
{
case 0x00: // External Latch A
// x--- ---- Disc Eject/Change Reset
// -x-- ---- In Use control
// --x- ---- Motor on/off control
// ---x ---- Side Select
// ---- xxxx Floppy Disc select
if (!BIT(data, 0)) m_selected_floppy = m_floppy[0]->get_device();
if (!BIT(data, 1)) m_selected_floppy = m_floppy[1]->get_device();
if (!BIT(data, 2)) m_selected_floppy = nullptr;
if (!BIT(data, 3)) m_selected_floppy = nullptr;
m_fdc->set_floppy(m_selected_floppy);
if (m_selected_floppy)
{
m_selected_floppy->mon_w(BIT(data, 5));
m_selected_floppy->ss_w(!BIT(data, 4));
}
break;
}
}
u32 aa680_state::peripheral5_r(offs_t offset)
{
switch ((offset << 2) & 0xfc)
{
case 0x18: // Printer Control
// x--- ---- Select
// -x-- ---- Printer error
// --x- ---- Printer reset
// ---x ---- Busy
// ---- x--- Acknowledge
// ---- -x-- Auto-line feed
// ---- --x- Printer direction
// ---- ---x Paper error
return m_cent_status_in->read();
}
return 0xffffffff;
}
void aa680_state::peripheral5_w(offs_t offset, u32 data)
{
switch ((offset << 2) & 0xfc)
{
case 0x10: // Printer Data
m_cent_data_out->write(data & 0xff);
break;
case 0x18: // Printer Control
// xx-- ---- Reserved write zeros
// --x- ---- Printer reset
// ---x ---- Clear busy
// ---- x--- Acknowledge
// ---- -x-- Auto-line feed
// ---- --x- Printer port direction
// ---- ---x Printer strobe
m_cent_ctrl_out->write(data ^ 0xff);
break;
case 0x40: // Floppy Latch 1
// x--- ---- reset
// -x-- ---- Floppy disc INUSE
// --x- ---- Floppy motor
// ---x ---- Side select
// ---- x--- Density
// ---- -x-- Not used
// ---- --xx Floppy disc select
if (!BIT(data, 0)) m_selected_floppy = m_floppy[0]->get_device();
if (!BIT(data, 1)) m_selected_floppy = m_floppy[1]->get_device();
m_fdc->dden_w(BIT(data, 3));
m_fdc->set_floppy(m_selected_floppy);
if (m_selected_floppy)
{
m_selected_floppy->mon_w(BIT(data, 5));
m_selected_floppy->ss_w(!BIT(data, 4));
}
m_fdc->mr_w(BIT(data, 7));
break;
}
}
u8 aa4000_state::ioeb_r(offs_t offset)
{
static constexpr struct
{
u8 id;
u8 hs;
}
mid[6] =
{
{0xe, 0x1}, // Normal
{0xb, 0x4}, // Multiscan
{0xe, 0x0}, // VGA
{0xe, 0x0}, // Super VGA
{0xf, 0x0}, // Hi-res mono
{0xf, 0x0} // LCD
};
u8 data = 0xff;
int hs = 0;
switch ((offset << 2) & 0xf8)
{
case 0x50: // ID register
data = 0xf5;
break;
case 0x58: // Interrupt latch
logerror("ioeb_r: interrupt latch\n");
break;
case 0x70: // MID register (monitor)
//if (BIT(m_ioeb_control, 2))
// hs = !vidc_get_hs();
//else
// hs = vidc_get_hs();
if (hs)
data = 0xf0 | mid[1].id | mid[1].hs;
else
data = 0xf0 | mid[1].id;
break;
case 0x78: // Joystick (A3010 only)
data = m_joy[offset & 1].read_safe(0xff);
break;
default:
logerror("ioeb_r: unknown %04x\n", offset << 2);
}
return data;
}
void aa4000_state::ioeb_w(offs_t offset, u8 data)
{
switch ((offset << 2) & 0xf8)
{
case 0x48: // Control register
switch (BIT(data, 0, 2))
{
case 0:
m_vidc->set_unscaled_clock(24_MHz_XTAL);
break;
case 1:
m_vidc->set_unscaled_clock(25.175_MHz_XTAL);
break;
case 2:
m_vidc->set_unscaled_clock(36_MHz_XTAL);
break;
case 3:
m_vidc->set_unscaled_clock(24_MHz_XTAL);
break;
}
m_ioeb_control = data & 0x0f;
break;
case 0x58: // Interrupt latch
//logerror("ioeb_w: interrupt latch %02x\n", data);
break;
default:
logerror("ioeb_w: unknown %04x %04x\n", offset << 2, data);
}
}
u8 aa5000_state::extension_r(offs_t offset)
{
// test for valid extension rom loaded
if (m_ext_rom->read_rom(3) == 0x87)
return m_ext_rom->read_rom(offset & 0xffff);
else
return m_ext_region->base()[offset & 0xffff];
}
u32 aabase_state::dram_r(offs_t offset, u32 mem_mask)
{
return m_dram[offset];
}
void aabase_state::dram_w(offs_t offset, u32 data, u32 mem_mask)
{
COMBINE_DATA(&m_dram[offset]);
}
void aabase_state::post_debug(int state)
{
static attotime last_time(0, 0);
static int bitpos = 0;
if (state && bitpos <= 32)
{
bool bit = (machine().time() - last_time) > m_maincpu->clocks_to_attotime(2000000);
switch (32 - bitpos)
{
// Status bits
case 0: LOGMASKED(LOG_POST, "00000001 %-4s Self-test due to power on\n" , bit ? "Yes" : "No"); break;
case 1: LOGMASKED(LOG_POST, "00000002 %-4s Self-test due to interface hardware\n" , bit ? "Yes" : "No"); break;
case 2: LOGMASKED(LOG_POST, "00000004 %-4s Self-test due to test link\n" , bit ? "Yes" : "No"); break;
case 3: LOGMASKED(LOG_POST, "00000008 %-4s Long memory test performed\n" , bit ? "Yes" : "No"); break;
case 4: LOGMASKED(LOG_POST, "00000010 %-4s ARM 3 fitted\n" , bit ? "Yes" : "No"); break;
case 5: LOGMASKED(LOG_POST, "00000020 %-4s Long memory test disabled\n" , bit ? "Yes" : "No"); break;
case 6: LOGMASKED(LOG_POST, "00000040 %-4s PC-style IO world detected\n" , bit ? "Yes" : "No"); break;
case 7: LOGMASKED(LOG_POST, "00000080 %-4s VRAM detected\n" , bit ? "Yes" : "No"); break;
// Fault bits
case 8: LOGMASKED(LOG_POST, "00000100 %-4s CMOS RAM checksum error\n" , bit ? "Fail" : "Pass"); break;
case 9: LOGMASKED(LOG_POST, "00000200 %-4s ROM failed checksum test\n" , bit ? "Fail" : "Pass"); break;
case 10: LOGMASKED(LOG_POST, "00000400 %-4s MEMC CAM mapping failed\n" , bit ? "Fail" : "Pass"); break;
case 11: LOGMASKED(LOG_POST, "00000800 %-4s MEMC protection failed\n" , bit ? "Fail" : "Pass"); break;
case 12: LOGMASKED(LOG_POST, "00001000 %-4s IOC register test failed\n" , bit ? "Fail" : "Pass"); break;
case 14: LOGMASKED(LOG_POST, "00004000 %-4s VIDC (Virq interrupt) timing failed\n" , bit ? "Fail" : "Pass"); break;
case 15: LOGMASKED(LOG_POST, "00008000 %-4s Sound (Sirq interrupt) timing failed\n" , bit ? "Fail" : "Pass"); break;
case 16: LOGMASKED(LOG_POST, "00010000 %-4s CMOS RAM (clock/calendar chip) unreadable\n", bit ? "Fail" : "Pass"); break;
case 17: LOGMASKED(LOG_POST, "00020000 %-4s RAM control line failure\n" , bit ? "Fail" : "Pass"); break;
case 18: LOGMASKED(LOG_POST, "00040000 %-4s Long RAM test failure\n" , bit ? "Fail" : "Pass"); break;
}
bitpos++;
}
last_time = machine().time();
}
void aabase_state::machine_start()
{
// LK14 and LK15 are used to configure the installed RAM, different configurations
// create different memory mirrors that RISC OS uses to detect the available RAM.
int dram_size = m_ram->size() / 1024;
m_dram = nullptr;
switch (dram_size)
{
case 512: // 512 kB
case 1024: // 1 MB
// for configurations with less than 2 MB it is necessary to use a custom handler in order to emulate the correct memory mirrors.
m_memc->output_dram_rowcol(true);
m_memc->space(0).install_readwrite_handler(0x02000000, 0x021fffff, dram_size == 512 ? 0x000ff7ff : 0x001ff7ff, 0x00e00000, 0,
read32s_delegate(*this, FUNC(aabase_state::dram_r)),
write32s_delegate(*this, FUNC(aabase_state::dram_w)));
// for better performance we allocate 2 MB and mask out unused lines in the handlers
m_dram = std::make_unique<u32[]>(2048 * 1024 / 4);
save_pointer(NAME(m_dram), 2048 * 1024 / 4);
break;
case 2048: // 2 MB
m_memc->space(0).install_ram(0x02000000, 0x021fffff, 0x00e00000, m_ram->pointer());
break;
case 4096: // 4 MB
m_memc->space(0).install_ram(0x02000000, 0x023fffff, 0x00c00000, m_ram->pointer());
break;
case 4096 * 2: // 8 MB
m_memc->space(0).install_ram(0x02000000, 0x027fffff, 0x00800000, m_ram->pointer());
break;
case 4096 * 3: // 12 MB
m_memc->space(0).install_ram(0x02000000, 0x02bfffff, 0x00000000, m_ram->pointer());
break;
case 4096 * 4: // 16 MB
m_memc->space(0).install_ram(0x02000000, 0x02ffffff, 0x00000000, m_ram->pointer());
break;
default:
fatalerror("Archimedes %d kB RAM not supported", dram_size);
break;
}
}
void aa500_state::machine_reset()
{
m_selected_floppy = m_floppy[0]->get_device();
}
void aa310_state::machine_reset()
{
m_selected_floppy = m_floppy[0]->get_device();
}
void aa680_state::machine_reset()
{
address_space &program = m_maincpu->space(AS_PROGRAM);
// install hexadecimal display
program.install_read_tap(0x3400000, 0x3420003, "rom_shadow_bank_r", [this](offs_t offset, u32 &data, u32 mem_mask)
{
if (!machine().side_effects_disabled())
{
switch (offset & 0xfff00)
{
case 0x00000:
if (((offset >> 4) & 0x0f) != m_hex_display)
{
m_hex_display = (offset >> 4) & 0x0f;
logerror("Hexadecimal display: %X\n", m_hex_display);
}
break;
case 0x20000:
if (m_hex_display != 0x00)
{
m_hex_display = 0x00;
logerror("Hexadecimal display: BLANK\n");
}
break;
}
}
// return the original data
return data;
});
m_selected_floppy = m_floppy[0]->get_device();
m_hex_display = 0x00;
}
void aa4000_state::machine_reset()
{
m_selected_floppy = m_floppy[0]->get_device();
m_ioeb_control = 0x00;
}
void aabase_state::arm_map(address_map &map)
{
map(0x00000000, 0x01ffffff).rw(m_memc, FUNC(acorn_memc_device::logical_r), FUNC(acorn_memc_device::logical_w));
map(0x02000000, 0x03ffffff).rw(m_memc, FUNC(acorn_memc_device::high_mem_r), FUNC(acorn_memc_device::high_mem_w));
}
void aabase_state::memc_map(address_map &map)
{
map(0x00000000, 0x01ffffff).rw(m_memc, FUNC(acorn_memc_device::logical_r), FUNC(acorn_memc_device::logical_w));
map(0x02000000, 0x02ffffff).noprw(); // physical ram installed in machine_start
map(0x03000000, 0x033fffff).m(m_ioc, FUNC(acorn_ioc_device::map));
map(0x03000000, 0x0300ffff).rw(m_exp, FUNC(archimedes_exp_device::ms_r), FUNC(archimedes_exp_device::ms_w)).umask32(0x0000ffff);
map(0x03400000, 0x035fffff).nopr().w(m_vidc, FUNC(acorn_vidc10_device::write));
map(0x03600000, 0x037fffff).nopr().w(m_memc, FUNC(acorn_memc_device::registers_w));
map(0x03800000, 0x039fffff).mirror(0x600000).rom().region("maincpu", 0).w(m_memc, FUNC(acorn_memc_device::page_w));
}
void aa680_state::memc_map(address_map &map)
{
aabase_state::memc_map(map);
map(0x03100000, 0x0313ffff).ram(); // scsi buffer
map(0x031e0000, 0x031e0007).rw(m_scsi, FUNC(wd33c93a_device::indir_r), FUNC(wd33c93a_device::indir_w)).umask32(0x000000ff);
//map(0x031e0200, 0x031e03ff).lw8(NAME([this](u8 data) { m_scsi_ctrl = data; })).umask32(0x000000ff);
//map(0x031e0400, 0x031e05ff).lw16(NAME([this](u16 data) { m_scsi_addr = data; })).umask32(0x0000ffff);
map(0x03400000, 0x035fffff).rom().region("maincpu", 0);
}
void aa4000_state::memc_map(address_map &map)
{
aabase_state::memc_map(map);
map(0x03010000, 0x03011fff).select(0x00180000).rw("upc", FUNC(upc82c711_device::io_r), FUNC(upc82c711_device::io_w)).umask32(0x0000ffff);
map(0x03012000, 0x03029fff).select(0x00180000).rw("upc", FUNC(upc82c711_device::dack_tc0_r), FUNC(upc82c711_device::dack_tc0_w)).umask32(0x000000ff);
map(0x0302a000, 0x0302bfff).select(0x00180000).rw("upc", FUNC(upc82c711_device::dack_tc1_r), FUNC(upc82c711_device::dack_tc1_w)).umask32(0x000000ff);
}
void aa5000_state::memc_map(address_map &map)
{
aabase_state::memc_map(map);
map(0x03010000, 0x03011fff).select(0x00180000).rw("upc", FUNC(upc82c710_device::io_r), FUNC(upc82c710_device::io_w)).umask32(0x0000ffff);
map(0x03012000, 0x03029fff).select(0x00180000).rw("upc", FUNC(upc82c710_device::dack_tc0_r), FUNC(upc82c710_device::dack_tc0_w)).umask32(0x000000ff);
map(0x0302a000, 0x0302bfff).select(0x00180000).rw("upc", FUNC(upc82c710_device::dack_tc1_r), FUNC(upc82c710_device::dack_tc1_w)).umask32(0x000000ff);
map(0x03400000, 0x037fffff).r(FUNC(aa5000_state::extension_r)).umask32(0x000000ff); // 5th column ROM
}
void aa4_state::memc_map(address_map &map)
{
aabase_state::memc_map(map);
map(0x03010000, 0x03011fff).select(0x00180000).rw("upc", FUNC(upc82c711_device::io_r), FUNC(upc82c711_device::io_w)).umask32(0x0000ffff);
map(0x03012000, 0x03029fff).select(0x00180000).rw("upc", FUNC(upc82c711_device::dack_tc0_r), FUNC(upc82c711_device::dack_tc0_w)).umask32(0x000000ff);
map(0x0302a000, 0x0302bfff).select(0x00180000).rw("upc", FUNC(upc82c711_device::dack_tc1_r), FUNC(upc82c711_device::dack_tc1_w)).umask32(0x000000ff);
map(0x0302c000, 0x0302ffff).select(0x00180000).rw(m_lc, FUNC(acorn_lc_device::read), FUNC(acorn_lc_device::write)).umask32(0x000000ff);
map(0x03400000, 0x037fffff).r(FUNC(aa4_state::extension_r)).umask32(0x000000ff); // 5th column ROM
}
//static INPUT_PORTS_START( aa4 )
// PORT_START("MONITOR")
// PORT_CONFNAME( 0x07, 0x07, "Monitor Type" )
// PORT_CONFSETTING( 0x02, "Colour SVGA" )
// PORT_CONFSETTING( 0x05, "Mono VGA" )
// PORT_CONFSETTING( 0x06, "Colour VGA" )
// PORT_CONFSETTING( 0x07, "LCD" )
//INPUT_PORTS_END
static INPUT_PORTS_START( aa3010 )