/
pet.cpp
2646 lines (2113 loc) · 94.1 KB
/
pet.cpp
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// license:BSD-3-Clause
// copyright-holders:Curt Coder
/*
PET = Personal Electronic Transactor
http://www.6502.org/users/andre/petindex/boards.html
Static Board (PET 2001)
-----------------------
Four variations based on type of RAM(6550 or 2114) and ROM(6540 or 2316B).
4K or 8K static RAM (selected by jumper).
40 column display
A video interrupt interferes with disk drive operation.
Display timing not compatible with Basic 4.0.
ROM sockets: A2 2K character ROM sockets: A2 2K character
(2316B) H1 C000-CFFF (6540) H1 C000-C7FF
H2 D000-DFFF H2 D000-D7FF
H3 E000-E7FF H3 E000-E7FF
H4 F000-FFFF H4 F000-F7FF
H5 C000-CFFF H5 C800-CFFF
H6 D000-DFFF H6 D800-DFFF
H7 F000-FFFF H7 F800-FFFF
IEEE user tape #2
+------####-####--##-+
! #
! #
! # exp
! # bus
! #
! # 2000 Series
! ! circa 1977/78 Max RAM - 8k
! (2k) ROMS ! [w/daughter board exp to 32k shown]
! F F E D D C C !
! 8 0 0 8 0 8 0 !
! !
tape # RAM MEMORY !
#1 # !
+--------------------+
Dynamic Board (PET/CBM 2001-N/2001-B/4000)
------------------------------------------
4K, 8K, 16K or 32K dynamic RAM (selected by jumper).
40 column display
Can run all versions of 40 column Basic (Basic 1 must be copied to 4K ROMs)
Can be jumpered to replace the older board.
ROM sockets: UD3 9000-9FFF
UD4 A000-AFFF
UD5 B000-BFFF
UD6 C000-CFFF
UD7 D000-DFFF
UD8 E000-E7FF
UD9 F000-FFFF
UF10 2K character
IEEE user tape #1
+------####-####--##-+
! #!
! #!
! #! exp
! ROMS #! bus
! F E D C B A 9 #!
! #! 3000, 4000 Series
! ! (3000 series is European version)
! ! circa 1979/80 Max RAM - 32k
! !
! !
! !
tape # RAM MEMORY !
#2 # !
+--------------------+
80 Column Board (CBM 8000)
--------------------------
16K or 32K RAM (selected by jumper).
Uses CTRC to generate 80 column display.
Can only run the 80 column version of Basic 4.0.
Not compatible with older boards.
ROM sockets: UA3 2K or 4K character
UD6 F000-FFFF
UD7 E000-E7FF
UD8 D000-DFFF
UD9 C000-CFFF
UD10 B000-BFFF
UD11 A000-AFFF
UD12 9000-9FFF
The layout is the same of the one used in Universal Boards below.
Universal Board (CBM 8000/PET 4000-12)
--------------------------------------
This is an 80 column board with jumpers for different configurations.
16K or 32K RAM (selected by jumper).
Uses CTRC to generate 40 or 80 column display (selected by jumpers).
Can only run Basic 4.0 versions that support the CRTC.
Can be jumpered to replace all older boards.
ROM sockets: UA3 2K or 4K character
UD6 F000-FFFF
UD7 E000-E7FF
UD8 D000-DFFF
UD9 C000-CFFF
UD10 B000-BFFF
UD11 A000-AFFF
UD12 9000-9FFF
IEEE user tape #1
+------####-####--##-+
! # # tape
! # # #2
! R exp bus # !
! A #!
! M 9 #!
! A #! 4000, 8000 Series
! M R B ! circa 1981 Max RAM - 32k*
! E O C ! [8296 layout not shown]
! M M D !
! O S E !
! R F !
! Y !
! spkr!
+--------------------+
*/
/*
TODO:
- accurate video timing for non-CRTC models
- High Speed Graphics board
- keyboard layouts
- Swedish
- German
- SuperPET
- 6809
- OS/9 MMU
- 8296
- PLA dumps
- high resolution graphics
- Malvern Particle Sizer OEM variant
*/
#include "emu.h"
#include "emupal.h"
#include "screen.h"
#include "softlist_dev.h"
#include "speaker.h"
#include "bus/generic/slot.h"
#include "bus/generic/carts.h"
#include "bus/ieee488/c2040.h"
#include "bus/ieee488/c8050.h"
#include "bus/ieee488/ieee488.h"
#include "bus/pet/cass.h"
#include "bus/pet/exp.h"
#include "bus/pet/user.h"
#include "cpu/m6502/m6502.h"
#include "imagedev/snapquik.h"
#include "machine/6522via.h"
#include "machine/6821pia.h"
#include "cbm_snqk.h"
#include "machine/input_merger.h"
#include "machine/pla.h"
#include "machine/ram.h"
#include "machine/timer.h"
#include "sound/spkrdev.h"
#include "video/mc6845.h"
namespace {
#define M6502_TAG "f3"
#define M6522_TAG "a5"
#define M6520_1_TAG "g8"
#define M6520_2_TAG "b8"
#define MC6845_TAG "ub13"
#define SCREEN_TAG "screen"
#define PLA1_TAG "ue6"
#define PLA2_TAG "ue5"
#define PET_USER_PORT_TAG "user"
class pet_state : public driver_device
{
public:
pet_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_maincpu(*this, M6502_TAG),
m_via(*this, M6522_TAG),
m_pia1(*this, M6520_1_TAG),
m_pia2(*this, M6520_2_TAG),
m_crtc(*this, MC6845_TAG),
m_screen(*this, SCREEN_TAG),
m_ieee(*this, IEEE488_TAG),
m_palette(*this, "palette"),
m_cassette(*this, PET_DATASSETTE_PORT_TAG),
m_cassette2(*this, PET_DATASSETTE_PORT2_TAG),
m_exp(*this, "exp"),
m_user(*this, PET_USER_PORT_TAG),
m_speaker(*this, "speaker"),
m_cart_9000(*this, "cart_9000"),
m_cart_a000(*this, "cart_a000"),
m_cart_b000(*this, "cart_b000"),
m_ram(*this, RAM_TAG),
m_rom(*this, M6502_TAG),
m_char_rom(*this, "charom"),
m_video_ram(*this, "video_ram", 0x800, ENDIANNESS_LITTLE),
m_row(*this, "ROW%u", 0),
m_lock(*this, "LOCK"),
m_sync_timer(nullptr),
m_sync_period(attotime::zero),
m_key(0),
m_sync(0),
m_graphic(0),
m_blanktv(0),
m_user_diag(1)
{ }
void base_pet_devices(machine_config &config, const char *default_drive);
void _4k(machine_config &config);
void _8k(machine_config &config);
void _16k(machine_config &config);
void _32k(machine_config &config);
void pet(machine_config &config);
void pet2001n(machine_config &config, bool with_b000 = true);
void pet2001n8(machine_config &config);
void cbm3032(machine_config &config);
void pet20018(machine_config &config);
void pet2001n16(machine_config &config);
void cbm3016(machine_config &config);
void cbm3000(machine_config &config);
void cbm4000(machine_config &config);
void cbm4032f(machine_config &config);
void cbm4032(machine_config &config);
void cbm4016(machine_config &config);
void cbm3008(machine_config &config);
void pet2001(machine_config &config);
void pet2001n32(machine_config &config);
uint8_t read(offs_t offset);
void write(offs_t offset, uint8_t data);
void via_pa_w(uint8_t data);
uint8_t via_pb_r();
void via_pb_w(uint8_t data);
void via_ca2_w(int state);
void via_cb2_w(int state);
uint8_t pia1_pa_r();
uint8_t pia1_pb_r();
void pia1_pa_w(uint8_t data);
void pia1_ca2_w(int state);
void user_diag_w(int state);
MC6845_BEGIN_UPDATE( pet_begin_update );
MC6845_UPDATE_ROW( pet40_update_row );
TIMER_CALLBACK_MEMBER( sync_tick );
DECLARE_QUICKLOAD_LOAD_MEMBER(quickload_pet);
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
DECLARE_MACHINE_START( pet40 );
DECLARE_MACHINE_RESET( pet40 );
void pet2001_mem(address_map &map);
protected:
required_device<m6502_device> m_maincpu;
required_device<via6522_device> m_via;
required_device<pia6821_device> m_pia1;
required_device<pia6821_device> m_pia2;
optional_device<mc6845_device> m_crtc;
required_device<screen_device> m_screen;
required_device<ieee488_device> m_ieee;
required_device<palette_device> m_palette;
required_device<pet_datassette_port_device> m_cassette;
required_device<pet_datassette_port_device> m_cassette2;
required_device<pet_expansion_slot_device> m_exp;
required_device<pet_user_port_device> m_user;
optional_device<speaker_sound_device> m_speaker;
optional_device<generic_slot_device> m_cart_9000;
optional_device<generic_slot_device> m_cart_a000;
optional_device<generic_slot_device> m_cart_b000;
required_device<ram_device> m_ram;
required_memory_region m_rom;
required_memory_region m_char_rom;
memory_share_creator<uint8_t> m_video_ram;
required_ioport_array<10> m_row;
required_ioport m_lock;
emu_timer *m_sync_timer;
attotime m_sync_period;
DECLARE_MACHINE_START( pet );
DECLARE_MACHINE_START( pet2001 );
DECLARE_MACHINE_RESET( pet );
void update_speaker();
enum
{
SEL0 = 0,
SEL1,
SEL2,
SEL3,
SEL4,
SEL5,
SEL6,
SEL7,
SEL8,
SEL9,
SELA,
SELB,
SELC,
SELD,
SELE,
SELF
};
// keyboard state
uint8_t m_key;
// video state
int m_sync;
int m_graphic;
int m_blanktv;
int m_video_ram_size;
// sound state
int m_via_cb2;
int m_pia1_pa7;
uint8_t m_via_pa;
int m_user_diag;
};
class pet2001b_state : public pet_state
{
public:
pet2001b_state(const machine_config &mconfig, device_type type, const char *tag) :
pet_state(mconfig, type, tag)
{ }
void pet2001b(machine_config &config, bool with_b000 = true);
void pet2001b32(machine_config &config);
void pet4000(machine_config &config);
void pet4000b(machine_config &config);
void pet4001b(machine_config &config);
void pet4032f(machine_config &config);
void pet4032b(machine_config &config);
void pet4032(machine_config &config);
void pet2001b16(machine_config &config);
void cbm3032b(machine_config &config);
void cbm4000b(machine_config &config);
void cbm4032b(machine_config &config);
void pet2001b8(machine_config &config);
void pet4016(machine_config &config);
protected:
uint8_t pia1_pb_r();
};
class pet80_state : public pet2001b_state
{
public:
pet80_state(const machine_config &mconfig, device_type type, const char *tag) :
pet2001b_state(mconfig, type, tag)
{ }
void pet80(machine_config &config);
void pet8032(machine_config &config);
DECLARE_MACHINE_START( pet80 );
DECLARE_MACHINE_RESET( pet80 );
MC6845_UPDATE_ROW( cbm8296_update_row );
protected:
MC6845_UPDATE_ROW( pet80_update_row );
};
class superpet_state : public pet80_state
{
public:
superpet_state(const machine_config &mconfig, device_type type, const char *tag)
: pet80_state(mconfig, type, tag)
{ }
void superpet(machine_config &config);
};
class cbm8096_state : public pet80_state
{
public:
cbm8096_state(const machine_config &mconfig, device_type type, const char *tag) :
pet80_state(mconfig, type, tag)
{ }
void cbm8096(machine_config &config);
};
class cbm8296_state : public pet80_state
{
public:
cbm8296_state(const machine_config &mconfig, device_type type, const char *tag) :
pet80_state(mconfig, type, tag),
m_basic_rom(*this, "basic"),
m_editor_rom(*this, "editor"),
m_ue5_rom(*this, "ue5_eprom"),
m_ue6_rom(*this, "ue6_eprom"),
m_pla1(*this, PLA1_TAG),
m_pla2(*this, PLA2_TAG)
{ }
void cbm8296d(machine_config &config);
void cbm8296(machine_config &config);
private:
required_memory_region m_basic_rom;
required_memory_region m_editor_rom;
required_memory_region m_ue5_rom;
required_memory_region m_ue6_rom;
required_device<pla_device> m_pla1;
required_device<pla_device> m_pla2;
DECLARE_MACHINE_START( cbm8296 );
DECLARE_MACHINE_RESET( cbm8296 );
[[maybe_unused]] void read_pla1(offs_t offset, int phi2, int brw, int noscreen, int noio, int ramsela, int ramsel9, int ramon, int norom,
int &cswff, int &cs9, int &csa, int &csio, int &cse, int &cskb, int &fa12, int &casena1);
[[maybe_unused]] void read_pla2(offs_t offset, int phi2, int brw, int casena1, int &endra, int &noscreen, int &casena2, int &fa15);
void read_pla1_eprom(offs_t offset, int phi2, int brw, int noscreen, int noio, int ramsela, int ramsel9, int ramon, int norom,
int &cswff, int &cs9, int &csa, int &csio, int &cse, int &cskb, int &fa12, int &casena1);
void read_pla2_eprom(offs_t offset, int phi2, int brw, int casena1, int &endra, int &noscreen, int &casena2, int &fa15);
uint8_t read(offs_t offset);
void write(offs_t offset, uint8_t data);
uint8_t m_cr;
void cbm8296_mem(address_map &map);
};
static void cbm_pet_quick_sethiaddress( address_space &space, uint16_t hiaddress )
{
space.write_byte(0x2e, hiaddress & 0xff);
space.write_byte(0x2c, hiaddress & 0xff);
space.write_byte(0x2a, hiaddress & 0xff);
space.write_byte(0x2f, hiaddress >> 8);
space.write_byte(0x2d, hiaddress >> 8);
space.write_byte(0x2b, hiaddress >> 8);
}
QUICKLOAD_LOAD_MEMBER(pet_state::quickload_pet)
{
return general_cbm_loadsnap(image, m_maincpu->space(AS_PROGRAM), 0, cbm_pet_quick_sethiaddress);
}
//**************************************************************************
// INTERRUPTS
//**************************************************************************
//-------------------------------------------------
// update_speaker -
//-------------------------------------------------
void pet_state::update_speaker()
{
if (m_speaker)
{
int level = m_via_cb2 && m_pia1_pa7;
m_speaker->level_w(level);
}
}
//-------------------------------------------------
// read -
//-------------------------------------------------
uint8_t pet_state::read(offs_t offset)
{
int sel = offset >> 12;
int norom = m_exp->norom_r(offset, sel);
uint8_t data = 0;
data = m_exp->read(offset, data, sel);
switch (sel)
{
case SEL0: case SEL1: case SEL2: case SEL3: case SEL4: case SEL5: case SEL6: case SEL7:
if (offset < m_ram->size())
{
data = m_ram->pointer()[offset];
}
break;
case SEL8:
if (!(offset & 0x800))
{
data = m_video_ram[offset & (m_video_ram_size - 1)];
}
break;
case SEL9:
if (norom)
{
if (m_cart_9000 && m_cart_9000->exists())
data = m_cart_9000->read_rom(offset & 0xfff);
else
data = m_rom->base()[offset - 0x9000];
}
break;
case SELA:
if (norom)
{
if (m_cart_a000 && m_cart_a000->exists())
data = m_cart_a000->read_rom(offset & 0xfff);
else
data = m_rom->base()[offset - 0x9000];
}
break;
case SELB:
if (norom)
{
if (m_cart_b000 && m_cart_b000->exists())
data = m_cart_b000->read_rom(offset & 0xfff);
else
data = m_rom->base()[offset - 0x9000];
}
break;
case SELC: case SELD: case SELF:
if (norom)
{
data = m_rom->base()[offset - 0x9000];
}
break;
case SELE:
if (BIT(offset, 11))
{
data = 0xff;
if (BIT(offset, 4))
{
data &= m_pia1->read(offset & 0x03);
}
if (BIT(offset, 5))
{
data &= m_pia2->read(offset & 0x03);
}
if (BIT(offset, 6))
{
data &= m_via->read(offset & 0x0f);
}
if (m_crtc && BIT(offset, 7) && BIT(offset, 0))
{
data &= m_crtc->register_r();
}
}
else if (norom)
{
data = m_rom->base()[offset - 0x9000];
}
break;
}
return data;
}
//-------------------------------------------------
// write -
//-------------------------------------------------
void pet_state::write(offs_t offset, uint8_t data)
{
int sel = offset >> 12;
m_exp->write(offset, data, sel);
switch (sel)
{
case SEL0: case SEL1: case SEL2: case SEL3: case SEL4: case SEL5: case SEL6: case SEL7:
if (offset < m_ram->size())
{
m_ram->pointer()[offset] = data;
}
break;
case SEL8:
if (!(offset & 0x800))
{
m_video_ram[offset & (m_video_ram_size - 1)] = data;
}
break;
case SELE:
if (BIT(offset, 11))
{
if (BIT(offset, 4))
{
m_pia1->write(offset & 0x03, data);
}
if (BIT(offset, 5))
{
m_pia2->write(offset & 0x03, data);
}
if (BIT(offset, 6))
{
m_via->write(offset & 0x0f, data);
}
if (m_crtc && BIT(offset, 7))
{
if (BIT(offset, 0))
{
m_crtc->register_w(data);
}
else
{
m_crtc->address_w(data);
}
}
}
break;
}
}
//-------------------------------------------------
// read_pla1 -
//-------------------------------------------------
void cbm8296_state::read_pla1(offs_t offset, int phi2, int brw, int noscreen, int noio, int ramsela, int ramsel9, int ramon, int norom,
int &cswff, int &cs9, int &csa, int &csio, int &cse, int &cskb, int &fa12, int &casena1)
{
uint32_t input = (offset & 0xff00) | phi2 << 7 | brw << 6 | noscreen << 5 | noio << 4 | ramsela << 3 | ramsel9 << 2 | ramon << 1 | norom;
uint32_t data = m_pla1->read(input);
cswff = BIT(data, 0);
cs9 = BIT(data, 1);
csa = BIT(data, 2);
csio = BIT(data, 3);
cse = BIT(data, 4);
cskb = BIT(data, 5);
fa12 = BIT(data, 6);
casena1 = BIT(data, 7);
}
void cbm8296_state::read_pla1_eprom(offs_t offset, int phi2, int brw, int noscreen, int noio, int ramsela, int ramsel9, int ramon, int norom,
int &cswff, int &cs9, int &csa, int &csio, int &cse, int &cskb, int &fa12, int &casena1)
{
// PLA-EPROM adapter by Joachim Nemetz (Jogi)
uint32_t input = (offset & 0xff00) | phi2 << 7 | brw << 6 | noscreen << 5 | noio << 4 | ramsela << 3 | ramsel9 << 2 | ramon << 1 | norom;
input = bitswap<16>(input,13,8,9,7,12,14,11,10,6,5,4,3,2,1,0,15);
uint8_t data = m_ue6_rom->base()[input];
data = bitswap<8>(data,7,0,1,2,3,4,5,6);
cswff = BIT(data, 0);
cs9 = BIT(data, 1);
csa = BIT(data, 2);
csio = BIT(data, 3);
cse = BIT(data, 4);
cskb = BIT(data, 5);
fa12 = BIT(data, 6);
casena1 = BIT(data, 7);
}
//-------------------------------------------------
// read_pla2 -
//-------------------------------------------------
void cbm8296_state::read_pla2(offs_t offset, int phi2, int brw, int casena1, int &endra, int &noscreen, int &casena2, int &fa15)
{
uint32_t input = bitswap<8>(m_cr, 0,1,2,3,4,5,6,7) << 8 | ((offset >> 8) & 0xf8) | brw << 2 | phi2 << 1 | casena1;
uint32_t data = m_pla2->read(input);
endra = BIT(data, 4);
noscreen = BIT(data, 5);
casena2 = BIT(data, 6);
fa15 = BIT(data, 7);
}
void cbm8296_state::read_pla2_eprom(offs_t offset, int phi2, int brw, int casena1, int &endra, int &noscreen, int &casena2, int &fa15)
{
// PLA-EPROM adapter by Joachim Nemetz (Jogi)
uint32_t input = bitswap<8>(m_cr, 0,1,2,3,4,5,6,7) << 8 | ((offset >> 8) & 0xf8) | brw << 2 | phi2 << 1 | casena1;
input = bitswap<16>(input,13,8,9,7,12,14,11,10,6,5,4,3,2,1,0,15);
uint8_t data = m_ue5_rom->base()[input];
data = bitswap<8>(data,7,0,1,2,3,4,5,6);
endra = BIT(data, 4);
noscreen = BIT(data, 5);
casena2 = BIT(data, 6);
fa15 = BIT(data, 7);
}
//-------------------------------------------------
// read -
//-------------------------------------------------
uint8_t cbm8296_state::read(offs_t offset)
{
int norom = m_exp->norom_r(offset, offset >> 12) && !BIT(m_cr, 7);
int phi2 = 1, brw = 1, noscreen = 1, noio = BIT(m_cr, 6);
int ramsela = BIT(m_via_pa, 0), ramsel9 = BIT(m_via_pa, 1), ramon = BIT(m_via_pa, 2);
int cswff = 1, cs9 = 1, csa = 1, csio = 1, cse = 1, cskb = 1, fa12 = 1, fa15 = 1, casena1 = 1, casena2 = 1, endra = 1;
read_pla1_eprom(offset, phi2, brw, noscreen, noio, ramsela, ramsel9, ramon, norom,
cswff, cs9, csa, csio, cse, cskb, fa12, casena1);
read_pla2_eprom(offset, phi2, brw, casena1, endra, noscreen, casena2, fa15);
read_pla1_eprom(offset, phi2, brw, noscreen, noio, ramsela, ramsel9, ramon, norom,
cswff, cs9, csa, csio, cse, cskb, fa12, casena1);
//logerror("%s read %04x : norom %u noio %u ramsela %u ramsel9 %u ramon %u / cswff %u cs9 %u csa %u csio %u cse %u cskb %u fa12 %u casena1 %u endra %u noscreen %u casena2 %u fa15 %u\n",machine().describe_context(),offset,norom,noio,ramsela,ramsel9,ramon,cswff,cs9,csa,csio,cse,cskb,fa12,casena1,endra,noscreen,casena2,fa15);
uint8_t data = 0;
offs_t drma = fa15 << 15 | (offset & 0x7e00) | BIT(offset, 0) << 8 | (offset & 0x1fe) >> 1;
if (!endra && !casena1)
{
data = m_ram->pointer()[drma];
}
if (casena2)
{
data = m_ram->pointer()[0x10000 | drma];
}
if (!cs9)
{
if (m_cart_9000 && m_cart_9000->exists())
data = m_cart_9000->read_rom(offset & 0xfff);
else
data = m_rom->base()[offset & 0xfff];
}
if (!csa)
{
if (m_cart_a000 && m_cart_a000->exists())
data = m_cart_a000->read_rom(offset & 0xfff);
else
data = m_rom->base()[0x1000 | (offset & 0xfff)];
}
if (!cse)
{
data = m_editor_rom->base()[offset & 0xfff];
}
if (!cskb)
{
data = m_basic_rom->base()[(offset & 0x2fff) | fa12 << 12];
}
if (!csio)
{
data = 0xff;
if (BIT(offset, 4))
{
data &= m_pia1->read(offset & 0x03);
}
if (BIT(offset, 5))
{
data &= m_pia2->read(offset & 0x03);
}
if (BIT(offset, 6))
{
data &= m_via->read(offset & 0x0f);
}
if (BIT(offset, 7) && BIT(offset, 0))
{
data &= m_crtc->register_r();
}
}
return data;
}
//-------------------------------------------------
// write -
//-------------------------------------------------
void cbm8296_state::write(offs_t offset, uint8_t data)
{
int norom = m_exp->norom_r(offset, offset >> 12) && !BIT(m_cr, 7);
int phi2 = 1, brw = 0, noscreen = 1, noio = BIT(m_cr, 6);
int ramsela = BIT(m_via_pa, 0), ramsel9 = BIT(m_via_pa, 1), ramon = BIT(m_via_pa, 2);
int cswff = 1, cs9 = 1, csa = 1, csio = 1, cse = 1, cskb = 1, fa12 = 1, fa15 = 1, casena1 = 1, casena2 = 1, endra = 1;
read_pla1_eprom(offset, phi2, brw, noscreen, noio, ramsela, ramsel9, ramon, norom,
cswff, cs9, csa, csio, cse, cskb, fa12, casena1);
read_pla2_eprom(offset, phi2, brw, casena1, endra, noscreen, casena2, fa15);
read_pla1_eprom(offset, phi2, brw, noscreen, noio, ramsela, ramsel9, ramon, norom,
cswff, cs9, csa, csio, cse, cskb, fa12, casena1);
//logerror("%s write %04x : norom %u noio %u ramsela %u ramsel9 %u ramon %u / cswff %u cs9 %u csa %u csio %u cse %u cskb %u fa12 %u casena1 %u endra %u noscreen %u casena2 %u fa15 %u\n",machine().describe_context(),offset,norom,noio,ramsela,ramsel9,ramon,cswff,cs9,csa,csio,cse,cskb,fa12,casena1,endra,noscreen,casena2,fa15);
offs_t drma = fa15 << 15 | (offset & 0x7e00) | BIT(offset, 0) << 8 | (offset & 0x1fe) >> 1;
if (!endra && !casena1)
{
m_ram->pointer()[drma] = data;
}
if (casena2)
{
m_ram->pointer()[0x10000 | drma] = data;
}
if (!csio)
{
if (BIT(offset, 4))
{
m_pia1->write(offset & 0x03, data);
}
if (BIT(offset, 5))
{
m_pia2->write(offset & 0x03, data);
}
if (BIT(offset, 6))
{
m_via->write(offset & 0x0f, data);
}
if (BIT(offset, 7))
{
if (BIT(offset, 0))
{
m_crtc->register_w(data);
}
else
{
m_crtc->address_w(data);
}
}
}
if (cswff && ((offset & 0xff) == 0xf0))
{
m_cr = data;
}
}
//**************************************************************************
// ADDRESS MAPS
//**************************************************************************
void pet_state::pet2001_mem(address_map &map)
{
map(0x0000, 0xffff).rw(FUNC(pet_state::read), FUNC(pet_state::write));
}
void cbm8296_state::cbm8296_mem(address_map &map)
{
map(0x0000, 0xffff).rw(FUNC(cbm8296_state::read), FUNC(cbm8296_state::write));
}
//**************************************************************************
// INPUT PORTS
//**************************************************************************
static INPUT_PORTS_START( pet )
PORT_START( "ROW0" )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Crsr Right Left") PORT_CODE(KEYCODE_PGDN) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) PORT_CHAR(UCHAR_MAMEKEY(LEFT))
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Home Clr Screen") PORT_CODE(KEYCODE_HOME) PORT_CHAR(UCHAR_MAMEKEY(HOME))
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("\xE2\x86\x90") PORT_CODE(KEYCODE_MINUS) PORT_CHAR(0x2190)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_9) PORT_CHAR('(')
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7) PORT_CHAR('&')
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5) PORT_CHAR('%')
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3) PORT_CHAR('#')
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1) PORT_CHAR('!')
PORT_START( "ROW1" )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Del Inst") PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8) PORT_CHAR(UCHAR_MAMEKEY(INSERT))
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Crsr Down Up") PORT_CODE(KEYCODE_PGUP) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) PORT_CHAR(UCHAR_MAMEKEY(UP))
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0) PORT_CHAR(')')
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_8) PORT_CHAR('\\')
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6) PORT_CHAR('\'')
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4) PORT_CHAR('$')
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2) PORT_CHAR('"')
PORT_START( "ROW2" )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_9_PAD) PORT_CHAR('9')
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7_PAD) PORT_CHAR('7')
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("\xE2\x86\x91 Pi") PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('^') PORT_CHAR(0x03C0)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_O) PORT_CHAR('O')
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_U) PORT_CHAR('U')
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_T) PORT_CHAR('T')
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_E) PORT_CHAR('E')
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Q) PORT_CHAR('Q')
PORT_START( "ROW3" )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SLASH_PAD) PORT_CHAR('/')
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_8_PAD) PORT_CHAR('8')
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_P) PORT_CHAR('P')
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_I) PORT_CHAR('I')
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y) PORT_CHAR('Y')
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_R) PORT_CHAR('R')
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_W) PORT_CHAR('W')
PORT_START( "ROW4" )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6_PAD) PORT_CHAR('6')
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4_PAD) PORT_CHAR('4')
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_L) PORT_CHAR('L')
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_J) PORT_CHAR('J')
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_G) PORT_CHAR('G')
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_D) PORT_CHAR('D')
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_A) PORT_CHAR('A')
PORT_START( "ROW5" )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_ASTERISK) PORT_CHAR('*')
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5_PAD) PORT_CHAR('5')
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COLON) PORT_CHAR(':')
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_K) PORT_CHAR('K')
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_H) PORT_CHAR('H')
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F) PORT_CHAR('F')
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_S) PORT_CHAR('S')
PORT_START( "ROW6" )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3_PAD) PORT_CHAR('3')
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1_PAD) PORT_CHAR('1')
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Return") PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_STOP) PORT_CHAR(';')
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_M) PORT_CHAR('M')
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_B) PORT_CHAR('B')
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_C) PORT_CHAR('C')
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Z) PORT_CHAR('Z')
PORT_START( "ROW7" )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_PLUS_PAD) PORT_CHAR('+')
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2_PAD) PORT_CHAR('2')
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('?')
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',')
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_N) PORT_CHAR('N')
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_V) PORT_CHAR('V')
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_X) PORT_CHAR('X')
PORT_START( "ROW8" )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_MINUS_PAD) PORT_CHAR('-')
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0_PAD) PORT_CHAR('0')
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Shift (Right)") PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_SHIFT_1)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('>')
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_DEL) PORT_CHAR(']')
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_TILDE) PORT_CHAR('@')
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Shift (Left)") PORT_CODE(KEYCODE_LSHIFT)
PORT_START( "ROW9" )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad =") PORT_CODE(KEYCODE_ENTER_PAD) PORT_CHAR('=')
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_DEL_PAD) PORT_CHAR('.')
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Stop Run") PORT_CODE(KEYCODE_QUOTE)
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR('<')
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ')
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('[')
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Rvs Off") PORT_CODE(KEYCODE_TAB)
PORT_START( "LOCK" )
PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("SHIFT LOCK") PORT_CODE(KEYCODE_CAPSLOCK) PORT_TOGGLE PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK))
INPUT_PORTS_END