/
gaelco3d.cpp
1381 lines (1126 loc) · 68.3 KB
/
gaelco3d.cpp
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// license:BSD-3-Clause
// copyright-holders:Aaron Giles
/*************************************************************************
Driver for Gaelco 3D games
driver by Aaron Giles
Games supported:
* Speed Up
* Surf Planet
* Radikal Bikers
* Football Power
Known bugs:
* EEPROM interface not right
***************************************************************************
PCB Layout -- Radikal Bikers
----------
Top board
REF. 980311
|----------------------------------------------------------------|
| RAB.6 RAB.14 PAL RAB.48* |
| RAB.12 RAB.19 |
| RAB.23* ADSP-2115 16MHz RAB.45* |
| |
| |
| RAB.24 RAB.32 TDA1543 |
| TL074 |
| RAB.8* RAB.15* RAB.25 RAB.33 |
| RAB.9* RAB.16* |
| RAB.26 RAB.34 |
| |
| RAB.10* RAB.17* RAB.27 RAB.35 TDA1543 |
| RAB.11* RAB.18* TL074 |
| |
| |
| |
|----------------------------------------------------------------|
Notes:
Contents of RAB.24 to RAB.27 = RAB.32 to RAB.35
* - These ROMs are surface mounted
Bottom board
REF. 980512
|----------------------------------------------------------------|
| ALTERA TMS320C31 50MHz |
|50MHz EPM7064 68EC020 CY7C199 (QFP132) |
| CY7C199 |
| CY7C199 KM4216C256 |
|93C66 CY7C199 |
| CY7C199 |--------| |
| CY7C199 |3D-3G | |
|75LBC176 |(QFP206)| |
|75LBC176 | | |
| |------------| |--------| |
| |CHIP EXPRESS| |
| |RASTER | 45MHz |
| |M1178-01 | |
| |M032541-4 | |
| CY7C199 |------------| |
| CY7C199 |
| CY7C199 |
| CY7C199 |
| KM4216C256 KM4216C256 |
| |------------| |
| |CHIP EXPRESS| KM4216C256 KM4216C256 PAL |
| |CHK1 | |
| |M1105-01 | KM4216C256 |
| |M048494-22 | |
| |------------| |
|----------------------------------------------------------------|
PCB Layout -- Surf Planet
----------
Top board
REF. 971223
|----------------------------------------------------------------|
| PLS.5 PLS.11 PAL PLS.37* |
| PLS.8 PLS.13 |
| PLS.18* ADSP-2115 16MHz PLS.40* |
| |
| |
| PLS.19 PLS.27 TDA1543 |
| TL074 |
| PLS.20 PLS.28 |
| |
| PLS.21 PLS.29 |
| |
| PLS.7* PLS.12* PLS.22 PLS.30 TDA1543 |
| PLS.9* PLS.15* TL074 |
| |
| TLC549 |
| LM358 |
|----------------------------------------------------------------|
Notes:
Contents of PLS.19 to PLS.22 = PLS.27 to PLS.30
* - These ROMs are surface mounted
Some versions are known to use REF. 970514 board (looks identical)
Bottom board
REF. 970429
|----------------------------------------------------------------|
| PAL 60MHz TMS320C31 |
| 68HC000 CY7C199 (QFP132) |
| CY7C199 |
| CY7C199 KM4216C256 |
|93C66 CY7C199 |
| CY7C199 |--------| |
| CY7C199 |3D-3G | |
|75LBC176 |(QFP206)| |
|75LBC176 | | |
| |------------| |--------| |
| |CHIP EXPRESS| |
| |RASTER | 45MHz |
| |M027851-1 | |
| |9706 CI USA | |
| CY7C199 |------------| |
| CY7C199 |
| CY7C199 |
| CY7C199 |
| KM4216C256 KM4216C256 |
| |------------| |
| |CHIP EXPRESS| KM4216C256 KM4216C256 PAL |
| |SU3DCOL | |
| |M026402-3 | KM4216C256 |
| |9647 CI USA | |
| |------------| |
|----------------------------------------------------------------|
6 * KM4216C256G = 6 * 256k x 16
10 * CY7C199 = 10 * 32k x 8
**************************************************************************/
#include "emu.h"
#include "gaelco3d.h"
#include "cpu/m68000/m68000.h"
#include "cpu/m68000/m68020.h"
#include "emupal.h"
#include "speaker.h"
#include "speedup.lh"
#define LOG 0
void gaelco3d_state::ser_irq(int state)
{
if (state)
m_maincpu->set_input_line(6, ASSERT_LINE);
else
m_maincpu->set_input_line(6, CLEAR_LINE);
}
/*************************************
*
* Machine init
*
*************************************/
void gaelco3d_state::machine_start()
{
// Save state support
save_item(NAME(m_sound_status));
save_item(NAME(m_analog_ports));
save_item(NAME(m_framenum));
save_item(NAME(m_adsp_ireg));
save_item(NAME(m_adsp_ireg_base));
save_item(NAME(m_adsp_incs));
save_item(NAME(m_adsp_size));
save_item(NAME(m_fp_clock));
save_item(NAME(m_fp_state));
save_item(NAME(m_fp_analog_ports));
save_item(NAME(m_fp_lenght));
}
MACHINE_RESET_MEMBER(gaelco3d_state,common)
{
m_framenum = 0;
// Boot the ADSP chip
uint16_t *src = (uint16_t *)memregion("user1")->base();
for (int i = 0; i < (src[3] & 0xff) * 8; i++)
{
uint32_t opcode = ((src[i*4+0] & 0xff) << 16) | ((src[i*4+1] & 0xff) << 8) | (src[i*4+2] & 0xff);
m_adsp_ram_base[i] = opcode;
}
m_adsp_bank->configure_entries(0, 256, memregion("user1")->base(), 0x4000);
m_adsp_bank->set_entry(0);
// Keep the TMS32031 halted until the code is ready to go
m_tms->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
}
void gaelco3d_state::machine_reset()
{
MACHINE_RESET_CALL_MEMBER( common );
m_soundlatch->acknowledge_w();
}
MACHINE_RESET_MEMBER(gaelco3d_state,gaelco3d2)
{
MACHINE_RESET_CALL_MEMBER( common );
m_fp_clock = 27;
m_fp_state = 0;
}
/*************************************
*
* IRQ handling
*
*************************************/
INTERRUPT_GEN_MEMBER(gaelco3d_state::vblank_gen)
{
gaelco3d_render(*m_screen);
device.execute().set_input_line(2, ASSERT_LINE);
}
void gaelco3d_state::irq_ack_w(uint16_t data)
{
m_maincpu->set_input_line(2, CLEAR_LINE);
}
/*************************************
*
* EEPROM (93C66B)
* Serial Interface
*
*************************************/
uint16_t gaelco3d_state::eeprom_data_r(offs_t offset, uint16_t mem_mask)
{
uint32_t result = 0xffff;
if (ACCESSING_BITS_0_7)
{
// bit 0 is clock
// bit 1 active
result &= ~uint32_t(gaelco_serial_device::EXT_STATUS_MASK);
result |= m_serial->status_r();
}
if (m_eeprom->do_read())
result ^= 0x0004;
if (LOG)
logerror("eeprom_data_r(%02X)\n", result);
return result;
}
/*************************************
*
* Sound CPU comms
*
*************************************/
uint16_t gaelco3d_state::sound_status_r(offs_t offset, uint16_t mem_mask)
{
if (LOG)
logerror("%s:sound_status_r(%02X) = %02X\n", machine().describe_context(), offset, m_sound_status);
if (ACCESSING_BITS_0_7)
return m_sound_status;
return 0xffff;
}
void gaelco3d_state::sound_status_w(uint16_t data)
{
if (LOG)
logerror("sound_status_w(%02X)\n", m_sound_status);
m_sound_status = data;
}
/*************************************
*
* Input ports
*
*************************************/
template <int N>
int gaelco3d_state::analog_bit_r()
{
return (m_analog_ports[N] >> 7) & 0x01;
}
void gaelco3d_state::analog_port_clock_w(int state)
{
// A zero/one combo is written here to clock the next analog port bit
if (!state)
{
m_analog_ports[0] <<= 1;
m_analog_ports[1] <<= 1;
m_analog_ports[2] <<= 1;
m_analog_ports[3] <<= 1;
}
}
void gaelco3d_state::analog_port_latch_w(int state)
{
// A zero is written here to read the analog ports, and a one is written when finished
if (!state)
{
m_analog_ports[0] = m_analog[0].read_safe(0);
m_analog_ports[1] = m_analog[1].read_safe(0);
m_analog_ports[2] = m_analog[2].read_safe(0);
m_analog_ports[3] = m_analog[3].read_safe(0);
}
}
template <int N>
int gaelco3d_state::fp_analog_bit_r()
{
return (m_fp_analog_ports[N] >> m_fp_clock) & 1;
}
void gaelco3d_state::fp_analog_clock_w(int state)
{
if (state != m_fp_state)
{
m_fp_state = state;
m_fp_clock++;
if (m_fp_clock == 28)
{
m_fp_clock = 0;
for (int i = 0; i < 2; i++)
{
u32 ay = m_analog[i * 2].read_safe(0);
u32 ax = m_analog[i * 2 + 1].read_safe(0);
m_fp_analog_ports[i] = (ax << 18) | ((ax ^ 0xff) << 10) | (ay << 2) | 1;
s32 aay = ay - 0x80;
s32 aax = ax - 0x80;
u32 len = aay * aay + aax * aax;
if (len <= m_fp_lenght[i])
m_fp_analog_ports[i] |= 2;
m_fp_lenght[i] = len;
}
}
}
}
/*************************************
*
* TMS32031 interface
*
*************************************/
uint32_t gaelco3d_state::tms_m68k_ram_r(offs_t offset)
{
// logerror("%s:tms_m68k_ram_r(%04X) = %08X\n", machine().describe_context(), offset, !(offset & 1) ? ((int32_t)m_m68k_ram_base[offset/2] >> 16) : (int)(int16_t)m_m68k_ram_base[offset/2]);
if (m_m68k_ram_base16)
return (int32_t)(int16_t)m_m68k_ram_base16[offset];
else if (offset & 1)
return (int32_t)(int16_t)m_m68k_ram_base32[offset >> 1];
else
return (int32_t)(int16_t)(m_m68k_ram_base32[offset >> 1] >> 16);
}
void gaelco3d_state::tms_m68k_ram_w(offs_t offset, uint32_t data)
{
if (m_m68k_ram_base16)
m_m68k_ram_base16[offset] = data;
else if (offset & 1)
m_m68k_ram_base32[offset >> 1] = (m_m68k_ram_base32[offset >> 1] & 0xffff0000) | (data & 0xffff);
else
m_m68k_ram_base32[offset >> 1] = (m_m68k_ram_base32[offset >> 1] & 0xffff) | (data << 16);
}
void gaelco3d_state::tms_iack_w(offs_t offset, uint8_t data)
{
if (LOG)
logerror("iack_w(%d) - %06X\n", data, offset);
m_tms->set_input_line(0, CLEAR_LINE);
}
/*************************************
*
* TMS32031 control
*
*************************************/
void gaelco3d_state::tms_reset_w(int state)
{
/* this is set to 0 while data is uploaded, then set to $ffff after it is done.
It does not ever appear to be touched after that */
if (LOG)
logerror("%06X:tms_reset_w = %d\n", m_maincpu->pc(), state);
m_tms->set_input_line(INPUT_LINE_RESET, state ? CLEAR_LINE : ASSERT_LINE);
}
void gaelco3d_state::tms_irq_w(int state)
{
/* This is written twice, 0,1, in quick succession.
Done after uploading, and after modifying the comm area */
if (LOG)
logerror("%06X:tms_irq_w = %d\n", m_maincpu->pc(), state);
m_tms->set_input_line(0, state ? CLEAR_LINE : ASSERT_LINE);
}
void gaelco3d_state::tms_control3_w(int state)
{
if (LOG)
logerror("%06X:tms_control3_w = %d\n", m_maincpu->pc(), state);
}
/*************************************
*
* ADSP control registers
*
*************************************/
// These are some of the control registers. We don't use them all
enum
{
S1_AUTOBUF_REG = 15,
S1_RFSDIV_REG,
S1_SCLKDIV_REG,
S1_CONTROL_REG,
S0_AUTOBUF_REG,
S0_RFSDIV_REG,
S0_SCLKDIV_REG,
S0_CONTROL_REG,
S0_MCTXLO_REG,
S0_MCTXHI_REG,
S0_MCRXLO_REG,
S0_MCRXHI_REG,
TIMER_SCALE_REG,
TIMER_COUNT_REG,
TIMER_PERIOD_REG,
WAITSTATES_REG,
SYSCONTROL_REG
};
/*
ADSP control 3FFF W = 0008 (SYSCONTROL_REG)
ADSP control 3FFE W = 1249 (WAITSTATES_REG)
ADSP control 3FEF W = 0D82 (S1_AUTOBUF_REG)
ADSP control 3FF1 W = 0005 (S1_SCLKDIV_REG)
ADSP control 3FF2 W = 4A0F (S1_CONTROL_REG)
ADSP control 3FFF W = 0C08 (SYSCONTROL_REG)
*/
void gaelco3d_state::adsp_control_w(offs_t offset, uint16_t data)
{
if (LOG)
logerror("ADSP control %04X W = %04X\n", 0x3fe0 + offset, data);
m_adsp_control_regs[offset] = data;
switch (offset)
{
case SYSCONTROL_REG:
// See if SPORT1 got disabled
if ((data & 0x0800) == 0)
{
for (uint8_t i = 0; i < SOUND_CHANNELS; i++)
m_dmadac[i]->enable(0);
m_adsp_autobuffer_timer->reset();
}
break;
case S1_AUTOBUF_REG:
// Autobuffer off: nuke the timer, and disable the DAC
if ((data & 0x0002) == 0)
{
for (uint8_t i = 0; i < SOUND_CHANNELS; i++)
m_dmadac[i]->enable(0);
m_adsp_autobuffer_timer->reset();
}
break;
case S1_CONTROL_REG:
if (((data >> 4) & 3) == 2)
logerror("Oh no!, the data is compressed with u-law encoding\n");
if (((data >> 4) & 3) == 3)
logerror("Oh no!, the data is compressed with A-law encoding\n");
break;
}
}
void gaelco3d_state::adsp_rombank_w(offs_t offset, uint16_t data)
{
if (LOG)
logerror("adsp_rombank_w(%d) = %04X\n", offset, data);
m_adsp_bank->set_entry((offset & 1) * 0x80 + (data & 0x7f));
}
/*************************************
*
* ADSP sound generation
*
*************************************/
TIMER_DEVICE_CALLBACK_MEMBER(gaelco3d_state::adsp_autobuffer_irq)
{
// Get the index register
int reg = m_adsp->state_int(ADSP2100_I0 + m_adsp_ireg);
// Copy the current data into the buffer
// logerror("ADSP buffer: I%d=%04X incs=%04X size=%04X\n", m_adsp_ireg, reg, m_adsp_incs, m_adsp_size);
if (m_adsp_incs)
{
for (uint8_t i = 0; i < SOUND_CHANNELS; i++)
m_dmadac[i]->transfer(i, m_adsp_incs, SOUND_CHANNELS * m_adsp_incs, m_adsp_size / (SOUND_CHANNELS * m_adsp_incs), (int16_t *)&m_adsp_fastram_base[(reg - 0x3800) / 2]);
}
// Increment it
reg += m_adsp_size;
// Check for wrapping
if (reg >= m_adsp_ireg_base + m_adsp_size)
{
// Reset the base pointer
reg = m_adsp_ireg_base;
// Generate the (internal, thats why the pulse) IRQ
m_adsp->pulse_input_line(ADSP2105_IRQ1, m_adsp->minimum_quantum_time());
}
// Store it
m_adsp->set_state_int(ADSP2100_I0 + m_adsp_ireg, reg);
}
void gaelco3d_state::adsp_tx_callback(offs_t offset, uint32_t data)
{
// Check if it's for SPORT1
if (offset != 1)
return;
// Check if SPORT1 is enabled
if (m_adsp_control_regs[SYSCONTROL_REG] & 0x0800) // bit 11
{
// We only support autobuffer here (which is what this thing uses), bail if not enabled
if (m_adsp_control_regs[S1_AUTOBUF_REG] & 0x0002) // bit 1
{
// Get the autobuffer registers
int mreg, lreg;
uint16_t source;
attotime sample_period;
m_adsp_ireg = (m_adsp_control_regs[S1_AUTOBUF_REG] >> 9) & 7;
mreg = (m_adsp_control_regs[S1_AUTOBUF_REG] >> 7) & 3;
mreg |= m_adsp_ireg & 0x04; // msb comes from ireg
lreg = m_adsp_ireg;
/* Now get the register contents in a more legible format.
We depend on register indexes to be continuous (which is the case in our core) */
source = m_adsp->state_int(ADSP2100_I0 + m_adsp_ireg);
m_adsp_incs = m_adsp->state_int(ADSP2100_M0 + mreg);
m_adsp_size = m_adsp->state_int(ADSP2100_L0 + lreg);
// Get the base value, since we need to keep it around for wrapping
source -= m_adsp_incs;
// Make it go back one so we don't lose the first sample
m_adsp->set_state_int(ADSP2100_I0 + m_adsp_ireg, source);
// Save it as it is now
m_adsp_ireg_base = source;
// Calculate how long until we generate an interrupt
// Period per each bit sent
sample_period = attotime::from_hz(m_adsp->clock()) * (2 * (m_adsp_control_regs[S1_SCLKDIV_REG] + 1));
// Now put it down to samples, so we know what the channel frequency has to be
sample_period *= 16 * SOUND_CHANNELS;
for (uint8_t i = 0; i < SOUND_CHANNELS; i++)
{
m_dmadac[i]->set_frequency(sample_period.as_hz());
m_dmadac[i]->enable(1);
}
// Fire off a timer which will hit every half-buffer
sample_period = (sample_period * m_adsp_size) / (SOUND_CHANNELS * m_adsp_incs);
m_adsp_autobuffer_timer->adjust(sample_period, 0, sample_period);
return;
}
else
logerror( "ADSP SPORT1: trying to transmit and autobuffer not enabled!\n" );
}
// If we get there, something went wrong. Disable playing
for (uint8_t i = 0; i < SOUND_CHANNELS; i++)
m_dmadac[i]->enable(0);
// Remove timer
m_adsp_autobuffer_timer->reset();
}
/*************************************
*
* Unknown accesses
*
*************************************/
void gaelco3d_state::radikalb_lamp_w(int state)
{
// Arbitrary data written
logerror("%06X:unknown_127_w = %d\n", m_maincpu->pc(), state);
}
void gaelco3d_state::unknown_137_w(int state)
{
// Only written $00 or $ff
logerror("%06X:unknown_137_w = %d\n", m_maincpu->pc(), state);
}
void gaelco3d_state::unknown_13a_w(int state)
{
// Only written $0000 or $0001
logerror("%06X:unknown_13a_w = %04X\n", m_maincpu->pc(), state);
}
/*************************************
*
* Memory maps
*
*************************************/
void gaelco3d_state::main_map(address_map &map)
{
map.unmap_value_high();
map(0x000000, 0x1fffff).rom();
map(0x400000, 0x40ffff).ram().w(FUNC(gaelco3d_state::gaelco3d_paletteram_w)).share("paletteram16");
map(0x51000c, 0x51000d).portr("IN0");
map(0x51001c, 0x51001d).portr("IN1");
map(0x51002c, 0x51002d).portr("IN2");
map(0x51003c, 0x51003d).portr("IN3");
map(0x510041, 0x510041).w(m_soundlatch, FUNC(generic_latch_8_device::write));
map(0x510042, 0x510043).r(FUNC(gaelco3d_state::sound_status_r));
map(0x510044, 0x510045).nopw(); // unknown (cabinet control?)
map(0x510100, 0x510101).rw(FUNC(gaelco3d_state::eeprom_data_r), FUNC(gaelco3d_state::irq_ack_w));
map(0x510103, 0x510103).r(m_serial, FUNC(gaelco_serial_device::data_r));
map(0x510103, 0x510103).select(0x000038).lw8(NAME([this] (offs_t offset, u8 data) { m_mainlatch->write_d0(offset >> 3, data); }));
map(0x510105, 0x510105).w(m_serial, FUNC(gaelco_serial_device::data_w));
map(0x510106, 0x510107).mirror(0x000070).nopr(); // clr.b instructions do dummy reads
map(0x510107, 0x510107).select(0x000070).lw8(NAME([this] (offs_t offset, u8 data) { m_outlatch->write_d0(offset >> 4, data); }));
map(0xfe0000, 0xfeffff).ram().share("m68k_ram_base16");
}
void gaelco3d_state::main020_map(address_map &map)
{
map(0x000000, 0x1fffff).rom();
map(0x400000, 0x40ffff).ram().w(FUNC(gaelco3d_state::gaelco3d_paletteram_020_w)).share("paletteram32");
map(0x51000c, 0x51000f).portr("IN0");
map(0x51001c, 0x51001f).portr("IN1");
map(0x51002c, 0x51002f).portr("IN2");
map(0x51003c, 0x51003f).portr("IN3");
map(0x510041, 0x510041).w(m_soundlatch, FUNC(generic_latch_8_device::write));
map(0x510042, 0x510043).r(FUNC(gaelco3d_state::sound_status_r));
map(0x510100, 0x510101).rw(FUNC(gaelco3d_state::eeprom_data_r), FUNC(gaelco3d_state::irq_ack_w));
map(0x510103, 0x510103).r(m_serial, FUNC(gaelco_serial_device::data_r));
map(0x510103, 0x510103).select(0x000038).lw8(NAME([this] (offs_t offset, u8 data) { m_mainlatch->write_d0(offset >> 3, data); }));
map(0x510105, 0x510105).w(m_serial, FUNC(gaelco_serial_device::data_w));
map(0x510107, 0x510107).select(0x000070).lw8(NAME([this] (offs_t offset, u8 data) { m_outlatch->write_d0(offset >> 4, data); }));
map(0xfe0000, 0xfeffff).ram().share("m68k_ram_base32");
}
void gaelco3d_state::tms_map(address_map &map)
{
map(0x000000, 0x007fff).rw(FUNC(gaelco3d_state::tms_m68k_ram_r), FUNC(gaelco3d_state::tms_m68k_ram_w));
map(0x400000, 0x7fffff).rom().region("user2", 0);
map(0xc00000, 0xc00007).w(FUNC(gaelco3d_state::gaelco3d_render_w));
}
void gaelco3d_state::adsp_program_map(address_map &map)
{
map(0x0000, 0x03ff).ram().share("adsp_ram_base"); // 1k words internal RAM
map(0x37ff, 0x37ff).nopr(); // speedup hammers this for no apparent reason
}
void gaelco3d_state::adsp_data_map(address_map &map)
{
map(0x0000, 0x0001).w(FUNC(gaelco3d_state::adsp_rombank_w));
map(0x0000, 0x1fff).bankr("adspbank");
map(0x2000, 0x2000).r(m_soundlatch, FUNC(generic_latch_8_device::read)).umask16(0x00ff);
map(0x2000, 0x2000).w(FUNC(gaelco3d_state::sound_status_w));
map(0x3800, 0x39ff).ram().share("adsp_fastram"); // 512 words internal RAM
map(0x3fe0, 0x3fff).w(FUNC(gaelco3d_state::adsp_control_w)).share("adsp_regs");
}
/*************************************
*
* Input ports
*
*************************************/
static INPUT_PORTS_START( speedup )
PORT_START("IN0")
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_VOLUME_UP )
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_VOLUME_DOWN )
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON5 )
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_BUTTON4 )
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_CODE(KEYCODE_LSHIFT) // view
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_CODE(KEYCODE_LALT) // brake
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_CODE(KEYCODE_SPACE) PORT_TOGGLE // gear (low=1 high=2)
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START1 ) // start
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("IN1")
PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("IN2")
PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_COIN1 ) // verified
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) // checked after reading analog from port 1
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2) // checked after reading analog from port 2
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2) // checked after reading analog from port 3
PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_CUSTOM) PORT_READ_LINE_MEMBER(gaelco3d_state, analog_bit_r<0>)
PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_CUSTOM) PORT_READ_LINE_MEMBER(gaelco3d_state, analog_bit_r<1>)
PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_CUSTOM) PORT_READ_LINE_MEMBER(gaelco3d_state, analog_bit_r<2>)
PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_CUSTOM) PORT_READ_LINE_MEMBER(gaelco3d_state, analog_bit_r<3>)
PORT_START("IN3")
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_COIN2 ) // verified
PORT_SERVICE_NO_TOGGLE( 0x0200, IP_ACTIVE_LOW ) // verified
PORT_BIT( 0xfc00, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("ANALOG0")
PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_MINMAX(0x10,0xf0) PORT_SENSITIVITY(25) PORT_KEYDELTA(25)
PORT_START("ANALOG1")
PORT_BIT( 0xff, 0x00, IPT_PEDAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(20)
INPUT_PORTS_END
static INPUT_PORTS_START( surfplnt )
PORT_START("IN0")
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_VOLUME_UP ) // low two bits read, compared against 3
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_VOLUME_DOWN ) // low four bits read, compared against f
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN ) // checked
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START1 ) // start
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("IN1")
PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("IN2")
PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_COIN1 ) // coin
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_SERVICE_NO_TOGGLE( 0x0800, IP_ACTIVE_LOW )
PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_CUSTOM) PORT_READ_LINE_MEMBER(gaelco3d_state, analog_bit_r<0>)
PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_CUSTOM) PORT_READ_LINE_MEMBER(gaelco3d_state, analog_bit_r<1>)
PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_CUSTOM) PORT_READ_LINE_MEMBER(gaelco3d_state, analog_bit_r<2>)
PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_CUSTOM) PORT_READ_LINE_MEMBER(gaelco3d_state, analog_bit_r<3>)
PORT_START("IN3")
PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("ANALOG0")
PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_MINMAX(0x10,0xf0) PORT_SENSITIVITY(25) PORT_KEYDELTA(25)
INPUT_PORTS_END
static INPUT_PORTS_START( radikalb )
PORT_START("IN0")
PORT_BIT( 0x0000ffff, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0x00010000, IP_ACTIVE_LOW, IPT_VOLUME_UP )
PORT_BIT( 0x00020000, IP_ACTIVE_LOW, IPT_VOLUME_DOWN )
PORT_BIT( 0x00040000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x00080000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) // handle up
PORT_BIT( 0x00100000, IP_ACTIVE_LOW, IPT_BUTTON3 ) // view
PORT_BIT( 0x00200000, IP_ACTIVE_LOW, IPT_BUTTON2 ) // brake
PORT_BIT( 0x00400000, IP_ACTIVE_LOW, IPT_BUTTON1 ) // accel
PORT_BIT( 0x00800000, IP_ACTIVE_LOW, IPT_START1 ) // start
PORT_BIT( 0xff000000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("IN1")
PORT_BIT( 0x0000ffff, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0xffff0000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("IN2")
PORT_BIT( 0x0000ffff, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0x00ff0000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x01000000, IP_ACTIVE_LOW, IPT_COIN1 ) // coin
PORT_BIT( 0x02000000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x04000000, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_SERVICE_NO_TOGGLE( 0x08000000, IP_ACTIVE_LOW )
PORT_BIT( 0x10000000, IP_ACTIVE_HIGH, IPT_CUSTOM) PORT_READ_LINE_MEMBER(gaelco3d_state, analog_bit_r<0>)
PORT_BIT( 0x20000000, IP_ACTIVE_HIGH, IPT_CUSTOM) PORT_READ_LINE_MEMBER(gaelco3d_state, analog_bit_r<1>)
PORT_BIT( 0x40000000, IP_ACTIVE_HIGH, IPT_CUSTOM) PORT_READ_LINE_MEMBER(gaelco3d_state, analog_bit_r<2>)
PORT_BIT( 0x80000000, IP_ACTIVE_HIGH, IPT_CUSTOM) PORT_READ_LINE_MEMBER(gaelco3d_state, analog_bit_r<3>)
PORT_START("IN3")
PORT_BIT( 0x0000ffff, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0xffff0000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("ANALOG0")
PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_MINMAX(0x10,0xf0) PORT_SENSITIVITY(25) PORT_KEYDELTA(25)
INPUT_PORTS_END
static INPUT_PORTS_START( footbpow )
PORT_START("IN0")
PORT_BIT( 0x0000ffff, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0x00010000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
PORT_BIT( 0x00020000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
PORT_BIT( 0x00040000, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
PORT_BIT( 0x00080000, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
PORT_BIT( 0x00100000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME( "P1 Dribbling" )
PORT_BIT( 0x00200000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME( "P1 Defense" )
PORT_BIT( 0x00400000, IP_ACTIVE_LOW, IPT_VOLUME_DOWN )
PORT_BIT( 0x00800000, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0xff000000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("IN1")
PORT_BIT( 0x0000ffff, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0x00010000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
PORT_BIT( 0x00020000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
PORT_BIT( 0x00040000, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
PORT_BIT( 0x00080000, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
PORT_BIT( 0x00100000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_NAME( "P2 Dribbling" )
PORT_BIT( 0x00200000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) PORT_NAME( "P2 Defense" )
PORT_BIT( 0x00400000, IP_ACTIVE_LOW, IPT_VOLUME_UP )
PORT_BIT( 0x00800000, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0xff000000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("IN2")
PORT_BIT( 0x0000ffff, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0x00ff0000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x01000000, IP_ACTIVE_LOW, IPT_COIN1 ) // coin
PORT_BIT( 0x02000000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x04000000, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_SERVICE_NO_TOGGLE( 0x08000000, IP_ACTIVE_LOW )
PORT_BIT( 0x10000000, IP_ACTIVE_HIGH, IPT_CUSTOM) PORT_READ_LINE_MEMBER(gaelco3d_state, fp_analog_bit_r<1>)
PORT_BIT( 0x20000000, IP_ACTIVE_HIGH, IPT_CUSTOM) PORT_READ_LINE_MEMBER(gaelco3d_state, fp_analog_bit_r<0>)
PORT_BIT( 0xc0000000, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_START("IN3")
PORT_BIT( 0x0000ffff, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0xffff0000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("ANALOG0")
PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0x00, 0xff) PORT_REVERSE PORT_SENSITIVITY(25) PORT_KEYDELTA(50)
PORT_START("ANALOG1")
PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_MINMAX(0x00, 0xff) PORT_SENSITIVITY(25) PORT_KEYDELTA(50)
PORT_START("ANALOG2")
PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0x00, 0xff) PORT_PLAYER(2) PORT_REVERSE PORT_SENSITIVITY(25) PORT_KEYDELTA(50)
PORT_START("ANALOG3")
PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_MINMAX(0x00, 0xff) PORT_PLAYER(2) PORT_SENSITIVITY(25) PORT_KEYDELTA(50)
INPUT_PORTS_END
/*************************************
*
* Machine drivers
*
*************************************/
void gaelco3d_state::gaelco3d(machine_config &config)
{
// Basic machine hardware
M68000(config, m_maincpu, 15000000);
m_maincpu->set_addrmap(AS_PROGRAM, &gaelco3d_state::main_map);
m_maincpu->set_vblank_int("screen", FUNC(gaelco3d_state::vblank_gen));
TMS32031(config, m_tms, 60000000);
m_tms->set_addrmap(AS_PROGRAM, &gaelco3d_state::tms_map);
m_tms->set_mcbl_mode(true);
m_tms->iack().set(FUNC(gaelco3d_state::tms_iack_w));
ADSP2115(config, m_adsp, 16000000);
m_adsp->sport_tx().set(FUNC(gaelco3d_state::adsp_tx_callback));
m_adsp->set_addrmap(AS_PROGRAM, &gaelco3d_state::adsp_program_map);
m_adsp->set_addrmap(AS_DATA, &gaelco3d_state::adsp_data_map);
EEPROM_93C66_16BIT(config, m_eeprom, eeprom_serial_streaming::ENABLE);
config.set_maximum_quantum(attotime::from_hz(6000));
TIMER(config, "adsp_timer").configure_generic(FUNC(gaelco3d_state::adsp_autobuffer_irq));
GAELCO_SERIAL(config, m_serial, 0);
m_serial->irq_handler().set(FUNC(gaelco3d_state::ser_irq));
LS259(config, m_mainlatch); // IC5 on bottom board next to EEPROM
m_mainlatch->q_out_cb<0>().set(m_serial, FUNC(gaelco_serial_device::tr_w));
m_mainlatch->q_out_cb<1>().set(m_serial, FUNC(gaelco_serial_device::rts_w));
m_mainlatch->q_out_cb<2>().set(m_eeprom, FUNC(eeprom_serial_93cxx_device::di_write));
m_mainlatch->q_out_cb<3>().set(m_eeprom, FUNC(eeprom_serial_93cxx_device::clk_write));
m_mainlatch->q_out_cb<4>().set(m_eeprom, FUNC(eeprom_serial_93cxx_device::cs_write));
m_mainlatch->q_out_cb<5>().set(FUNC(gaelco3d_state::tms_reset_w));
m_mainlatch->q_out_cb<6>().set(FUNC(gaelco3d_state::tms_irq_w));
m_mainlatch->q_out_cb<7>().set(FUNC(gaelco3d_state::unknown_13a_w));
LS259(config, m_outlatch); // IC2 on top board near edge connector
m_outlatch->q_out_cb<1>().set(FUNC(gaelco3d_state::tms_control3_w));
m_outlatch->q_out_cb<2>().set(FUNC(gaelco3d_state::radikalb_lamp_w));
m_outlatch->q_out_cb<3>().set(FUNC(gaelco3d_state::unknown_137_w));
m_outlatch->q_out_cb<4>().set(m_serial, FUNC(gaelco_serial_device::irq_enable));
m_outlatch->q_out_cb<5>().set(FUNC(gaelco3d_state::analog_port_clock_w));
m_outlatch->q_out_cb<6>().set(FUNC(gaelco3d_state::analog_port_latch_w));
m_outlatch->q_out_cb<7>().set(m_serial, FUNC(gaelco_serial_device::unknown_w));
GENERIC_LATCH_8(config, m_soundlatch).data_pending_callback().set_inputline(m_adsp, ADSP2115_IRQ2);
// Video hardware
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
m_screen->set_refresh_hz(60);
m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(2500)); // Not accurate
m_screen->set_size(576, 432);
m_screen->set_visarea(0, 575, 0, 431);
m_screen->set_screen_update(FUNC(gaelco3d_state::screen_update));
m_screen->set_palette("palette");
PALETTE(config, "palette", palette_device::RGB_555);
// Sound hardware
SPEAKER(config, "mono").front_center();
DMADAC(config, m_dmadac[0]).add_route(ALL_OUTPUTS, "mono", 0.45); // speedup: front mono
DMADAC(config, m_dmadac[1]).add_route(ALL_OUTPUTS, "mono", 0.45); // speedup: left rear
DMADAC(config, m_dmadac[2]).add_route(ALL_OUTPUTS, "mono", 0.45); // speedup: right rear
DMADAC(config, m_dmadac[3]).add_route(ALL_OUTPUTS, "mono", 0.45); // speedup: seat speaker
}
void gaelco3d_state::gaelco3d2(machine_config &config)
{
gaelco3d(config);
// Basic machine hardware
M68EC020(config.replace(), m_maincpu, 25000000);
m_maincpu->set_addrmap(AS_PROGRAM, &gaelco3d_state::main020_map);
m_maincpu->set_vblank_int("screen", FUNC(gaelco3d_state::vblank_gen));
m_tms->set_clock(50000000);
MCFG_MACHINE_RESET_OVERRIDE(gaelco3d_state,gaelco3d2)
}
void gaelco3d_state::footbpow(machine_config &config)
{
gaelco3d2(config);
m_outlatch->q_out_cb<5>().set(FUNC(gaelco3d_state::fp_analog_clock_w));
}