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mcr.cpp
3122 lines (2545 loc) · 159 KB
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mcr.cpp
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// license:BSD-3-Clause
// copyright-holders:Aaron Giles
/***************************************************************************
Midway MCR systems
driver by Christopher Kirmse, Aaron Giles
Games supported:
* Solar Fox
* Kick
* Draw Poker
* Satan's Hollow
* Tron
* Kozmik Krooz'r
* Domino Man
* Wacko
* Two Tigers
* Journey
* Tapper
* Timber
* Discs of Tron (Squawk n' Talk)
* NFL Football (Squawk n' Talk + laserdisk)
* Demolition Derby (Turbo Cheap Squeak)
****************************************************************************
Early MCR systems have three PCBs, which can be intermixed to a certain
degree:
CPU board contains:
* the main Z80 and program ROMs
* the video sync chain
* the background generation and background graphics ROMs
* the mixing logic and color generation
Video generator board contains:
* the foreground generation and foreground graphics ROMs
Sound I/O board contains:
* the Z80 that drivers the sound
* two AY-8910s for sound generation
* all input/output ports accessed by the main CPU
The layout of the PCB is identified by a five-digit number silkscreened
on the PCB. This number also matches the number in the bottom-right
corner of the schematics. Note, however, that the wiring diagrams in
the schematics are generally a horrible cut and paste job and often
have incorrect board numbers!
Below is the definitive list of MCR games and which boards comprise
their stack. Anything with identical boards should be interchangeable
without problems. If you want to hook up some of the odd boards, you
should look at the board descriptions below to understand the
differences between each type of board:
CPU Video Sound Others
----- ----- ----- ------------
Kick 90009 91399 90908
Solar Fox 90009 91399 90908
Draw Poker 90009 91399 90908 ?
Satan's Hollow 90010 91399 90913
Tron 90010 91399 90913 91418
Kozmik Krooz'r 90010 91399 91483 91458 91482
Domino Man 90010 91399 90913
Wacko 90010 91399 90913
Two Tigers
Journey 91475 91464 90913
Tapper 91490 91464 90913
Timber
Discs of Tron 91490 91464 91657 91660
NFL Football 91490 91464 91657 91660 91695
Demolition Derby 91490 91464 90913
Spy Hunter 91442 91433 91657/90913 91671
Crater Raider 91721 91464 91657
Turbo Tag 91442 91433 91657
****************************************************************************
Detailed CPU board descriptions:
90009 (Kick, Solar Fox, Draw Poker)
* 2.5MHz Z80
* up to 7x2k program EPROMs
* 2x4k background EPROMs
* 32 entry palette RAM
* background colors 0-15
* sprite colors 16-31
* sprite pen 8 shows foreground through
90010 (Satan's Hollow, Tron, Kozmik Krooz'r, Domino Man, Wacko)
* 2.5MHz Z80
* up to 6x8k program EPROMs
* 2x8k background EPROMs
* 64 entry palette RAM
* background colors 0-63, upper two bits come from tile RAM
* sprite colors 0-63, upper two bits come from tile RAM
* sprite pen 8 shows foreground through
91442 (Spy Hunter, Turbo Tag)
* 5MHz Z80
* up to 6x8k program EPROMs
* 4x8k background EPROMs (odd format)
* 1x4k alpha EPROM
* 64 entry palette RAM
* background colors 0-15 on top half of screen, 32-47 on bottom
* sprite colors 16-31 on top half of screen, 48-63 on bottom
* alpha colors hard coded to green, blue, or white
91475 (Journey)
* identical to 90010 except:
* sprite colors 0-63, upper two bits come from video gen
* sprite colors 48-63 have an extra bit for higher grayscale resolution
91490 (Tapper, Discs of Tron, Demolition Derby)
* 5MHz Z80
* up to 3x16k + 1x8k program EPROMs
* 2x16k background EPROMs
* 64 entry palette RAM
* background colors 0-63, upper two bits come from tile RAM
* sprite colors 0-63, upper two bits come from either tile RAM or video gen (select via jumpers)
91721 (Crater Raider)
* unknown, but expected to be identical to 91442 except:
* background colors 0-15 on all scanlines
* sprite colors 0-63, upper two bits come from video gen
****************************************************************************
Detailed Video board descriptions:
91399 (Kick, Solar Fox, Draw Poker, Satan's Hollow, Tron, Kozmik Krooz'r, Domino Man, Wacko)
* 4x8k sprite EPROMs
* data is ORed into linebuffers
* support for hflip, vflip (code bits 6,7)
* output is 4 bits: VID0-3
91442 (Spy Hunter, Turbo Tag)
* 8x32k sprite EPROMs
* data is written to linebuffers if not all F's
* support for hflip, vflip (flags bits 4,5)
* output is 4 bits: VID0-3
91464 (Journey, Tapper, Discs of Tron, Demolition Derby)
* 8x32k sprite EPROMs
* data is written to linebuffers if not all F's
* support for hflip, vflip (flags bits 4,5)
* support for 4 bits of extra data per pixel (flags bits 0-3)
* output is 8 bits: VID0-3, COL0-3
****************************************************************************
Detailed Sound Board descriptions:
90908 (Kick, Solar Fox, Draw Poker)
* 2MHz Z80
* 2x2MHz AY8910
* each AY8910 channel has a duty cycle controlled @ 50kHz by a down counter
* each AY8910 has a 3-to-8 demux that controls the left/right panning
* anecdotal evidence suggests that this was not stuffed
* input port 0 (J4 1-8)
* input port 1 (J4 10-13,14-18)
* input port 2 (J5 1-8)
* DIP switch (10 position, port 3)
* DIP switch (8 position, port 4)
* output port (J5 10-17)
90913 (Satan's Hollow, Tron, Domino Man, Wacko, Journey, Tapper, Demolition Derby)
* 2MHz Z80
* 2x2MHz AY8910
* each AY8910 channel has a duty cycle controlled @ 50kHz by a down counter
* removed the panning controls
* input port 0 (J4 1-8)
* input port 1 (J4 10-13,14-18)
* input port 2 (J5 1-8)
* DIP switch (10 position, port 3), top bit goes to J6 10
* input port 4 (J6 1-7,9)
* output port (J5 10-17)
91483 (Kozmik Krooz'r)
* basically identical to 90913
* input port 4 has a set of jumpers between it and the J6 outputs
91657 (NFL Football, Discs of Tron, Spy Hunter)
* appears to be identical in every way to 90908
* the panning circuitry is stuffed on these boards
****************************************************************************
90009 = CPU Board (Kick, SolarFox, DPoker)
90010 = Super CPU (Kroozr, Tron, SHollow)
90908 = Sound I/O (Kick, SolarFox, DPoker)
90913 = Super Sound I/O (SHollow, Tron)
91399 = Video Gen (Kick, SolarFox, DPoker, SHollow, Tron, Kroozr)
91418 = Optical Encoder (Tron)
91433 = Video Gen III (SpyHunt)
91434 = Optical Sensor PC (Kroozr)
91442 = CPU Board MCR III (SpyHunt)
91458 = Analog Joystick PC (Kroozr)
91464 = Super Video Gen MCR III (Tapper)
91482 = Optical Sensor PC (Kroozr)
91483 = Super Sound I/O (Kroozr)
91490 = 5MHz CPU (Tapper)
91649 = Absolute Position PC (SpyHunt)
91657 = Super Sound I/O with Panning (DOTron)
91658 = Lamp Sequencer (DOTron)
91659 = Flashing Fluorescent Assembly (DOTron)
91660 = Squawk & Talk (DOTron, NFLFoot)
91671 = Cheap Squeak Deluxe (SpyHunt)
91673 = Lamp Driver (SpyHunt)
91695 = IPU laserdisk controller (NFLFoot)
91794 = Optical Encoder Deluxe (DemoDerb)
91799 = Turbo Cheap Squeak (DemoDerb)
****************************************************************************
SSIO outputs:
Output port 4 = J5=10-17
Output port
****************************************************************************
Memory map
****************************************************************************
========================================================================
CPU #1
========================================================================
0000-6FFF R xxxxxxxx Program ROM
7000-77FF R/W xxxxxxxx NVRAM
F000-F1FF R/W xxxxxxxx Sprite RAM
F400-F41F W xxxxxxxx Palette RAM blue/green
F800-F81F W xxxxxxxx Palette RAM red
FC00-FFFF R/W xxxxxxxx Background video RAM
========================================================================
0000 R x-xxxxxx Input ports
R x------- Service switch (active low)
R --x----- Tilt
R ---xxx-- External inputs
R ------x- Right coin
R -------x Left coin
0000 W xxxxxxxx Data latch OP0 (coin meters, 2 led's and cocktail 'flip')
0001 R xxxxxxxx External inputs
0002 R xxxxxxxx External inputs
0003 R xxxxxxxx DIP switches
0004 R xxxxxxxx External inputs
0004 W xxxxxxxx Data latch OP4 (comm. with external hardware)
0007 R xxxxxxxx Audio status
001C-001F W xxxxxxxx Audio latches 1-4
00E0 W -------- Watchdog reset
00E8 W xxxxxxxx Unknown (written at initialization time)
00F0-00F3 W xxxxxxxx CTC communications
========================================================================
Interrupts:
NMI ???
INT generated by CTC
========================================================================
========================================================================
CPU #2 (Super Sound I/O)
========================================================================
0000-3FFF R xxxxxxxx Program ROM
8000-83FF R/W xxxxxxxx Program RAM
9000-9003 R xxxxxxxx Audio latches 1-4
A000 W xxxxxxxx AY-8910 #1 control
A001 R xxxxxxxx AY-8910 #1 status
A002 W xxxxxxxx AY-8910 #1 data
B000 W xxxxxxxx AY-8910 #2 control
B001 R xxxxxxxx AY-8910 #2 status
B002 W xxxxxxxx AY-8910 #2 data
C000 W xxxxxxxx Audio status
E000 W xxxxxxxx Unknown
F000 R xxxxxxxx Audio board switches
========================================================================
Interrupts:
NMI ???
INT generated by external circuitry 780 times/second
========================================================================
***************************************************************************/
#include "emu.h"
#include "mcr.h"
#include "machine/nvram.h"
#include "screen.h"
#include "speaker.h"
#include "dpoker.lh"
void mcr_state::mcr_control_port_w(uint8_t data)
{
/*
Bit layout is as follows:
D7 = n/c
D6 = cocktail flip
D5 = red LED
D4 = green LED
D3 = n/c
D2 = coin meter 3
D1 = coin meter 2
D0 = coin meter 1
*/
machine().bookkeeping().coin_counter_w(0, (data >> 0) & 1);
machine().bookkeeping().coin_counter_w(1, (data >> 1) & 1);
machine().bookkeeping().coin_counter_w(2, (data >> 2) & 1);
m_mcr_cocktail_flip = (data >> 6) & 1;
}
/*************************************
*
* Solar Fox I/O ports
*
*************************************/
uint8_t mcr_state::solarfox_ip0_r()
{
/* This is a kludge; according to the wiring diagram, the player 2 */
/* controls are hooked up as documented below. If you go into test */
/* mode, they will respond. However, if you try it in a 2-player */
/* game in cocktail mode, they don't work at all. So we fake-mux */
/* the controls through player 1's ports */
if (m_mcr_cocktail_flip)
return ioport("ssio:IP0")->read() | 0x08;
else
return ((ioport("ssio:IP0")->read() & ~0x14) | 0x08) | ((ioport("ssio:IP0")->read() & 0x08) >> 1) | ((ioport("ssio:IP2")->read() & 0x01) << 4);
}
uint8_t mcr_state::solarfox_ip1_r()
{
/* same deal as above */
if (m_mcr_cocktail_flip)
return ioport("ssio:IP1")->read() | 0xf0;
else
return (ioport("ssio:IP1")->read() >> 4) | 0xf0;
}
/*************************************
*
* Kick I/O ports
*
*************************************/
uint8_t mcr_state::kick_ip1_r()
{
return (ioport("DIAL2")->read() << 4) & 0xf0;
}
/*************************************
*
* Draw Poker I/O ports
*
*************************************/
TIMER_DEVICE_CALLBACK_MEMBER(mcr_dpoker_state::hopper_callback)
{
if (m_output & 0x40)
{
// hopper timing is a guesstimate
m_coin_status ^= 8;
m_hopper_timer->adjust(attotime::from_msec((m_coin_status & 8) ? 100 : 250));
}
else
{
m_coin_status &= ~8;
}
machine().bookkeeping().coin_counter_w(3, m_coin_status & 8);
}
TIMER_DEVICE_CALLBACK_MEMBER(mcr_dpoker_state::coin_in_callback)
{
m_coin_status &= ~2;
}
INPUT_CHANGED_MEMBER(mcr_dpoker_state::coin_in_hit)
{
if (newval)
{
// The game waits for coin release before it accepts another.
// It probably does this to prevent tampering, good old coin-on-a-string won't work here.
m_coin_status |= 2;
m_coin_in_timer->adjust(attotime::from_msec(100));
}
}
uint8_t mcr_dpoker_state::ip0_r()
{
// d0: Coin-in Hit
// d1: Coin-in Release
// d2: Coin-out Up
// d3: Coin-out Down
// d6: Coin-drop Hit
// d7: Coin-drop Release
uint8_t p0 = ioport("ssio:IP0")->read();
p0 |= (m_coin_status >> 1 & 1);
p0 ^= (p0 << 1 & 0x80) | m_coin_status;
return p0;
}
void mcr_dpoker_state::lamps1_w(uint8_t data)
{
// cpanel button lamps (white)
m_lamps[0] = BIT(data, 0); // hold 1
m_lamps[1] = BIT(data, 4); // hold 2
m_lamps[2] = BIT(data, 5); // hold 3
m_lamps[3] = BIT(data, 6); // hold 4
m_lamps[4] = BIT(data, 7); // hold 5
m_lamps[5] = BIT(data, 1); // deal
m_lamps[6] = BIT(data, 2); // cancel
m_lamps[7] = BIT(data, 3); // stand
}
void mcr_dpoker_state::lamps2_w(uint8_t data)
{
// d5: button lamp: service or change
m_lamps[8] = BIT(data, 5);
// d0-d4: marquee lamps: coin 1 to 5 --> output lamps 9 to 13
for (int i = 0; i < 5; i++)
m_lamps[9 + i] = BIT(data, i);
// d6, d7: unused?
}
void mcr_dpoker_state::output_w(uint8_t data)
{
// d0: ? coin return
// d1: ? divertor (active low)
// d3: coin counter?
// d6: assume hopper coin flow
// d7: assume hopper motor
if (data & 0x40 & ~m_output)
m_hopper_timer->adjust(attotime::from_msec(500));
// other bits: unused?
m_output = data;
}
void mcr_dpoker_state::meters_w(uint8_t data)
{
// meters?
}
/*************************************
*
* Wacko I/O ports
*
*************************************/
void mcr_state::wacko_op4_w(uint8_t data)
{
m_input_mux = data & 1;
}
uint8_t mcr_state::wacko_ip1_r()
{
if (!m_input_mux)
return ioport("ssio:IP1")->read();
else
return ioport("ssio:IP1.ALT")->read();
}
uint8_t mcr_state::wacko_ip2_r()
{
if (!m_input_mux)
return ioport("ssio:IP2")->read();
else
return ioport("ssio:IP2.ALT")->read();
}
/*************************************
*
* Kozmik Krooz'r I/O ports
*
*************************************/
uint8_t mcr_state::kroozr_ip1_r()
{
int dial = ioport("DIAL")->read();
return ((dial & 0x80) >> 1) | ((dial & 0x70) >> 4);
}
void mcr_state::kroozr_op4_w(uint8_t data)
{
/*
bit 2 = ship control
bit 4 = cargo light cntl 1
bit 5 = cargo light cntl 2
*/
}
/*************************************
*
* Journey I/O ports
*
*************************************/
void mcr_state::journey_op4_w(uint8_t data)
{
/* if we're not playing the sample yet, start it */
if (!m_samples->playing(0))
m_samples->start(0, 0, true);
/* bit 0 turns cassette on/off */
m_samples->pause(0, ~data & 1);
}
/*************************************
*
* Two Tigers I/O ports
*
*************************************/
void mcr_state::twotiger_op4_w(uint8_t data)
{
for (int i = 0; i < 2; i++)
{
/* play tape, and loop it */
if (!m_samples->playing(i))
m_samples->start(i, i, true);
/* bit 1 turns cassette on/off */
m_samples->pause(i, ~data & 2);
}
// bit 2: lamp control?
// if (data & 0xfc) printf("%x ",data);
}
/*************************************
*
* Discs of Tron I/O ports
*
*************************************/
void mcr_state::dotron_op4_w(uint8_t data)
{
/*
Flasher Control:
A 555 timer is set up in astable mode with R1=R2=56k and C=1uF giving
a frequency of 8.5714 Hz. The timer is enabled if J1-3 is high (1).
The output of the timer is connected to the input of a D-type flip
flop at 1A, which is clocked by the AC sync (since this is a
fluorescent light fixture).
The J1-4 input is also connected the input of another D-type flip flop
on the same chip at 1A. The output of this directly controls the light
fixture.
Thus:
J1-3 enables a strobe effect at 8.5714 Hz (77.616ms high, 38.808ms low)
J1-4 directly enables/disables the lamp.
The two outputs are wire-ored together.
*/
/* bit 7 = FL1 (J1-3) on flasher control board */
/* bit 6 = FL0 (J1-4) on flasher control board */
m_backlight = BIT(data, 6);
/*
Lamp Sequencer:
A 556 timer is set up in astable mode with two different frequencies,
one using R1=R2=10k and C=10uF giving a frequency of 4.8 Hz, and the
second using R1=R2=5.1k and C=10uF giving a frequency of 9.4118 Hz.
The outputs of these clocks go into a mux at U4, whose input is
selected by the input bit latched from J1-6.
The output of the mux clocks a 16-bit binary counter at U3. The
output of the binary counter becomes the low 4 address bits of the
82S123 PROM at U2. The upper address bit comes from the input bit
latched from J1-5.
Each of the 5 output bits from the 82S123 is inverted and connected
to one of the lamps. The /CE pin on the 82S123 is connected to the
input bit latched from J1-4.
Thus:
J1-4 enables (0) or disables (1) the lamp sequencing.
J1-5 selects one of two 16-entry sequences stored in the 82S123.
J1-6 selects one of two speeds (0=4.8 Hz, 1=9.4118 Hz)
*/
/* bit 5 = SEL1 (J1-1) on the Lamp Sequencer board */
if (((m_last_op4 ^ data) & 0x20) && (data & 0x20))
{
/* bit 2 -> J1-4 = enable */
/* bit 1 -> J1-5 = sequence select */
/* bit 0 -> J1-6 = speed (0=slow, 1=fast) */
logerror("Lamp: en=%d seq=%d speed=%d\n", (data >> 2) & 1, (data >> 1) & 1, data & 1);
}
m_last_op4 = data;
/* bit 4 = SEL0 (J1-8) on squawk n talk board */
/* bits 3-0 = MD3-0 connected to squawk n talk (J1-4,3,2,1) */
m_squawk_n_talk->sound_select(data & 0x0f);
m_squawk_n_talk->sound_int(BIT(data, 4));
}
/*************************************
*
* NFL Football I/O ports
*
*************************************/
uint8_t mcr_nflfoot_state::ip2_r()
{
/* bit 7 = J3-2 on IPU board = TXDA on SIO */
uint8_t val = m_ipu_sio_txda << 7;
return val;
}
void mcr_nflfoot_state::op4_w(uint8_t data)
{
/* bit 7 = J3-7 on IPU board = /RXDA on SIO */
m_ipu_sio->rxa_w(!((data >> 7) & 1));
/* bit 6 = J3-3 on IPU board = CTSA on SIO */
m_ipu_sio->ctsa_w((data >> 6) & 1);
/* bit 4 = SEL0 (J1-8) on squawk n talk board */
/* bits 3-0 = MD3-0 connected to squawk n talk (J1-4,3,2,1) */
m_squawk_n_talk->sound_select(data & 0x0f);
m_squawk_n_talk->sound_int(BIT(data, 4));
}
/*************************************
*
* Demolition Derby I/O ports
*
*************************************/
uint8_t mcr_state::demoderb_ip1_r()
{
return ioport("ssio:IP1")->read() |
(ioport(m_input_mux ? "ssio:IP1.ALT2" : "ssio:IP1.ALT1")->read() << 2);
}
uint8_t mcr_state::demoderb_ip2_r()
{
return ioport("ssio:IP2")->read() |
(ioport(m_input_mux ? "ssio:IP2.ALT2" : "ssio:IP2.ALT1")->read() << 2);
}
void mcr_state::demoderb_op4_w(uint8_t data)
{
if (data & 0x40) m_input_mux = 1;
if (data & 0x80) m_input_mux = 0;
m_turbo_cheap_squeak->write(data);
}
/*************************************
*
* CPU board 90009 memory handlers
*
*************************************/
/* address map verified from schematics */
void mcr_state::cpu_90009_map(address_map &map)
{
map.unmap_value_high();
map(0x0000, 0x6fff).rom();
map(0x7000, 0x77ff).mirror(0x0800).ram().share("nvram");
map(0xf000, 0xf1ff).mirror(0x0200).ram().share("spriteram");
map(0xf400, 0xf41f).mirror(0x03e0).w(m_palette, FUNC(palette_device::write8)).share("palette");
map(0xf800, 0xf81f).mirror(0x03e0).w(m_palette, FUNC(palette_device::write8_ext)).share("palette_ext");
map(0xfc00, 0xffff).ram().w(FUNC(mcr_state::mcr_90009_videoram_w)).share("videoram");
}
/* upper I/O map determined by PAL; only SSIO ports are verified from schematics */
void mcr_state::cpu_90009_portmap(address_map &map)
{
map.unmap_value_high();
map.global_mask(0xff);
midway_ssio_device::ssio_input_ports(map, "ssio");
map(0xe0, 0xe0).w("watchdog", FUNC(watchdog_timer_device::reset_w));
map(0xe8, 0xe8).nopw();
map(0xf0, 0xf3).rw(m_ctc, FUNC(z80ctc_device::read), FUNC(z80ctc_device::write));
}
void mcr_state::cpu_90009_dp_map(address_map &map)
{
cpu_90009_map(map);
map(0x8000, 0x81ff).ram(); // meter ram, is it battery backed?
}
void mcr_state::cpu_90009_dp_portmap(address_map &map)
{
cpu_90009_portmap(map);
map(0x24, 0x24).portr("P24");
map(0x28, 0x28).portr("P28");
map(0x2c, 0x2c).portr("P2C");
map(0x2c, 0x2c).w(FUNC(mcr_dpoker_state::lamps1_w));
map(0x30, 0x30).w(FUNC(mcr_dpoker_state::lamps2_w));
map(0x34, 0x34).w(FUNC(mcr_dpoker_state::output_w));
map(0x3f, 0x3f).w(FUNC(mcr_dpoker_state::meters_w));
}
/*************************************
*
* CPU board 90010 memory handlers
*
*************************************/
/* address map verified from schematics */
void mcr_state::cpu_90010_map(address_map &map)
{
map.unmap_value_high();
map(0x0000, 0xbfff).rom();
map(0xc000, 0xc7ff).mirror(0x1800).ram().share("nvram");
map(0xe000, 0xe1ff).mirror(0x1600).ram().share("spriteram");
map(0xe800, 0xefff).mirror(0x1000).ram().w(FUNC(mcr_state::mcr_90010_videoram_w)).share("videoram");
}
/* upper I/O map determined by PAL; only SSIO ports are verified from schematics */
void mcr_state::cpu_90010_portmap(address_map &map)
{
map.unmap_value_high();
map.global_mask(0xff);
midway_ssio_device::ssio_input_ports(map, "ssio");
map(0xe0, 0xe0).w("watchdog", FUNC(watchdog_timer_device::reset_w));
map(0xe8, 0xe8).nopw();
map(0xf0, 0xf3).rw(m_ctc, FUNC(z80ctc_device::read), FUNC(z80ctc_device::write));
}
/*************************************
*
* CPU board 91490 memory handlers
*
*************************************/
/* address map verified from schematics */
void mcr_state::cpu_91490_map(address_map &map)
{
map.unmap_value_high();
map(0x0000, 0xdfff).rom();
map(0xe000, 0xe7ff).ram().share("nvram");
map(0xe800, 0xe9ff).mirror(0x0200).ram().share("spriteram");
map(0xf000, 0xf7ff).ram().w(FUNC(mcr_state::mcr_91490_videoram_w)).share("videoram");
map(0xf800, 0xf87f).mirror(0x0780).w(FUNC(mcr_state::mcr_paletteram9_w)).share("paletteram");
}
/* upper I/O map determined by PAL; only SSIO ports are verified from schematics */
void mcr_state::cpu_91490_portmap(address_map &map)
{
map.unmap_value_high();
map.global_mask(0xff);
midway_ssio_device::ssio_input_ports(map, "ssio");
map(0xe0, 0xe0).w("watchdog", FUNC(watchdog_timer_device::reset_w));
map(0xe8, 0xe8).nopw();
map(0xf0, 0xf3).rw(m_ctc, FUNC(z80ctc_device::read), FUNC(z80ctc_device::write));
}
/*************************************
*
* IPU board 91695 memory handlers
*
*************************************/
/* address map verified from schematics */
void mcr_nflfoot_state::ipu_91695_map(address_map &map)
{
map.unmap_value_high();
map(0x0000, 0x3fff).rom();
map(0xe000, 0xffff).ram();
}
/* I/O verified from schematics */
void mcr_nflfoot_state::ipu_91695_portmap(address_map &map)
{
map.unmap_value_high();
map.global_mask(0xff);
map(0x00, 0x03).mirror(0xe0).rw(m_ipu_pio0, FUNC(z80pio_device::read), FUNC(z80pio_device::write));
map(0x04, 0x07).mirror(0xe0).rw(m_ipu_sio, FUNC(z80sio_device::cd_ba_r), FUNC(z80sio_device::cd_ba_w));
map(0x08, 0x0b).mirror(0xe0).rw(m_ipu_ctc, FUNC(z80ctc_device::read), FUNC(z80ctc_device::write));
map(0x0c, 0x0f).mirror(0xe0).rw(m_ipu_pio1, FUNC(z80pio_device::read), FUNC(z80pio_device::write));
map(0x10, 0x13).mirror(0xe0).w(FUNC(mcr_nflfoot_state::ipu_laserdisk_w));
map(0x1c, 0x1f).mirror(0xe0).rw(FUNC(mcr_nflfoot_state::ipu_watchdog_r), FUNC(mcr_nflfoot_state::ipu_watchdog_w));
}
/*************************************
*
* Port definitions
*
*************************************/
/* verified from wiring diagram, plus DIP switches from manual */
static INPUT_PORTS_START( solarfox )
PORT_START("ssio:IP0") /* J4 1-8 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_TILT )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
PORT_START("ssio:IP1") /* J4 10-13,15-18 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_COCKTAIL
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_COCKTAIL
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_COCKTAIL
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_COCKTAIL
PORT_START("ssio:IP2") /* J5 1-8 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("ssio:IP3") /* DIPSW @ B3 */
PORT_DIPNAME( 0x03, 0x03, "Bonus" )
PORT_DIPSETTING( 0x02, DEF_STR( None ) )
PORT_DIPSETTING( 0x03, "After 10 racks" )
PORT_DIPSETTING( 0x01, "After 20 racks" )
PORT_BIT( 0x0c, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_DIPNAME( 0x10, 0x00, DEF_STR( Demo_Sounds ))
PORT_DIPSETTING( 0x10, DEF_STR( Off ))
PORT_DIPSETTING( 0x00, DEF_STR( On ))
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_DIPNAME( 0x40, 0x40, "Ignore Hardware Failure" )
PORT_DIPSETTING( 0x40, DEF_STR( Off ))
PORT_DIPSETTING( 0x00, DEF_STR( On ))
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Cabinet ))
PORT_DIPSETTING( 0x80, DEF_STR( Upright ))
PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ))
PORT_START("ssio:IP4") /* J6 1-8 */
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("ssio:DIP")
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
INPUT_PORTS_END
/* verified from wiring diagram, plus DIP switches from manual */
static INPUT_PORTS_START( kick )
PORT_START("ssio:IP0") /* J4 1-8 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_TILT )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
PORT_START("ssio:IP1") /* J4 10-13,15-18 */
PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(3) PORT_KEYDELTA(50) PORT_REVERSE
PORT_START("ssio:IP2") /* J5 1-8 */
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("ssio:IP3") /* DIPSW @ B3 */
PORT_DIPNAME( 0x01, 0x00, "Music" )
PORT_DIPSETTING( 0x01, DEF_STR( Off ))
PORT_DIPSETTING( 0x00, DEF_STR( On ))
PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("ssio:IP4") /* J6 1-8 */
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("ssio:DIP")
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("DIAL2")
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
INPUT_PORTS_END
/* verified from wiring diagram, plus DIP switches from manual */
static INPUT_PORTS_START( kickc )
PORT_START("ssio:IP0") /* J4 1-8 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_TILT )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
PORT_START("ssio:IP1") /* J4 10-13,15-18 */
PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(3) PORT_KEYDELTA(50) PORT_REVERSE
PORT_START("ssio:IP2") /* J5 1-8 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("ssio:IP3") /* DIPSW @ B3 */
PORT_DIPNAME( 0x01, 0x00, "Music" )
PORT_DIPSETTING( 0x01, DEF_STR( Off ))
PORT_DIPSETTING( 0x00, DEF_STR( On ))
PORT_BIT( 0x3e, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_DIPNAME( 0x40, 0x00, DEF_STR( Cabinet ))
PORT_DIPSETTING( 0x00, DEF_STR( Upright ))
PORT_DIPSETTING( 0x40, DEF_STR( Cocktail ))
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("ssio:IP4") /* J6 1-8 */
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("ssio:DIP")
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("DIAL2")
PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(3) PORT_KEYDELTA(50) PORT_REVERSE PORT_COCKTAIL
INPUT_PORTS_END
static INPUT_PORTS_START( dpoker )
PORT_START("ssio:IP0")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, mcr_dpoker_state, coin_in_hit, 0)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_CUSTOM ) // see ip0_r
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_CUSTOM ) // "
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_CUSTOM ) // "
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_NAME("Coin-drop")
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_CUSTOM ) // "
PORT_START("ssio:IP1")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_POKER_HOLD1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_HOLD3 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_POKER_HOLD4 )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_HOLD5 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_POKER_CANCEL )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_STAND )
PORT_START("ssio:IP2")
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN ) // only in test mode input test
// 10-position DIP switch on the sound pcb
// settings and defaults are verified from a sticker inside the cabinet, I don't know where 9 or 10 are connected
PORT_START("ssio:IP3")
PORT_DIPNAME( 0x01, 0x01, "Hopper" ) PORT_DIPLOCATION("B3:1")
PORT_DIPSETTING( 0x01, "Relay Pulse" )
PORT_DIPSETTING( 0x00, "Miser On" ) // what is this? - the game locks up if it's enabled
PORT_DIPNAME( 0x02, 0x02, "Music" ) PORT_DIPLOCATION("B3:2")
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPNAME( 0x04, 0x04, "Novelty" ) PORT_DIPLOCATION("B3:3")
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unused ) ) PORT_DIPLOCATION("B3:4")
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unused ) ) PORT_DIPLOCATION("B3:5")
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPNAME( 0x20, 0x20, "Cards After 5th Coin" ) PORT_DIPLOCATION("B3:6")