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  • Salvador
  • 02:03 (UTC -03:00)
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Pinned

  1. ENGG56_PROJETO_CIRCUITOS_INTEGRADOS_DIGITAIS ENGG56_PROJETO_CIRCUITOS_INTEGRADOS_DIGITAIS Public

    PROVA_01_MODULE_SENDER_RECEIVER

    Verilog

  2. Introducao-ao-Aprendizado-de-Maquina-ENGG67 Introducao-ao-Aprendizado-de-Maquina-ENGG67 Public

    Jupyter Notebook

  3. oliveiraop/verilog-mic1 oliveiraop/verilog-mic1 Public

    Implementation of mic-1 cpu with verilog for altera de2-115 fpga

    Verilog 3

  4. danrcarneiro/Lab3Problema1 danrcarneiro/Lab3Problema1 Public

    FAZ O SAMPLEY DE GUITARRA

    C

  5. leon-ufba/lab3-problema2 leon-ufba/lab3-problema2 Public

    C