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soc: mtk-svs: mt8183: Move thermal parsing in new function
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We jumpt to lable remove_mt8183_svsb_mon_mode from different error path
in the code. Move the thermal parsing in a new function will allow us to
refactor the code in a subsequent patch. No behavioural changes from
this commit.

Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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@mbgg
mbgg committed Sep 6, 2022
1 parent 27b50cd commit 4fd7359
Showing 1 changed file with 95 additions and 88 deletions.
183 changes: 95 additions & 88 deletions drivers/soc/mediatek/mtk-svs-mt8183.c
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Expand Up @@ -2,94 +2,14 @@

#include "mtk-svs.h"

bool svs_mt8183_efuse_parsing(struct svs_platform *svsp)
int svs_mt8183_efuse_thermal_parsing(struct svs_platform *svsp)
{
struct svs_bank *svsb;
int format[6], x_roomt[6], o_vtsmcu[5], o_vtsabb, tb_roomt = 0;
int adc_ge_t, adc_oe_t, ge, oe, gain, degc_cali, adc_cali_en_t;
int o_slope, o_slope_sign, ts_id;
u32 idx, i, ft_pgm, mts, temp0, temp1, temp2;
int ret;

for (i = 0; i < svsp->efuse_max; i++)
if (svsp->efuse[i])
dev_info(svsp->dev, "M_HW_RES%d: 0x%08x\n",
i, svsp->efuse[i]);

if (!svsp->efuse[2]) {
dev_notice(svsp->dev, "svs_efuse[2] = 0x0?\n");
return false;
}

/* Svs efuse parsing */
ft_pgm = (svsp->efuse[0] >> 4) & GENMASK(3, 0);

for (idx = 0; idx < svsp->bank_max; idx++) {
svsb = &svsp->banks[idx];

if (ft_pgm <= 1)
svsb->volt_flags |= SVSB_INIT01_VOLT_IGNORE;
u32 idx, i, mts, temp0, temp1, temp2;

switch (svsb->sw_id) {
case SVSB_CPU_LITTLE:
svsb->bdes = svsp->efuse[16] & GENMASK(7, 0);
svsb->mdes = (svsp->efuse[16] >> 8) & GENMASK(7, 0);
svsb->dcbdet = (svsp->efuse[16] >> 16) & GENMASK(7, 0);
svsb->dcmdet = (svsp->efuse[16] >> 24) & GENMASK(7, 0);
svsb->mtdes = (svsp->efuse[17] >> 16) & GENMASK(7, 0);

if (ft_pgm <= 3)
svsb->volt_od += 10;
else
svsb->volt_od += 2;
break;
case SVSB_CPU_BIG:
svsb->bdes = svsp->efuse[18] & GENMASK(7, 0);
svsb->mdes = (svsp->efuse[18] >> 8) & GENMASK(7, 0);
svsb->dcbdet = (svsp->efuse[18] >> 16) & GENMASK(7, 0);
svsb->dcmdet = (svsp->efuse[18] >> 24) & GENMASK(7, 0);
svsb->mtdes = svsp->efuse[17] & GENMASK(7, 0);

if (ft_pgm <= 3)
svsb->volt_od += 15;
else
svsb->volt_od += 12;
break;
case SVSB_CCI:
svsb->bdes = svsp->efuse[4] & GENMASK(7, 0);
svsb->mdes = (svsp->efuse[4] >> 8) & GENMASK(7, 0);
svsb->dcbdet = (svsp->efuse[4] >> 16) & GENMASK(7, 0);
svsb->dcmdet = (svsp->efuse[4] >> 24) & GENMASK(7, 0);
svsb->mtdes = (svsp->efuse[5] >> 16) & GENMASK(7, 0);

if (ft_pgm <= 3)
svsb->volt_od += 10;
else
svsb->volt_od += 2;
break;
case SVSB_GPU:
svsb->bdes = svsp->efuse[6] & GENMASK(7, 0);
svsb->mdes = (svsp->efuse[6] >> 8) & GENMASK(7, 0);
svsb->dcbdet = (svsp->efuse[6] >> 16) & GENMASK(7, 0);
svsb->dcmdet = (svsp->efuse[6] >> 24) & GENMASK(7, 0);
svsb->mtdes = svsp->efuse[5] & GENMASK(7, 0);

if (ft_pgm >= 2) {
svsb->freq_base = 800000000; /* 800MHz */
svsb->dvt_fixed = 2;
}
break;
default:
dev_err(svsb->dev, "unknown sw_id: %u\n", svsb->sw_id);
return false;
}
}

ret = svs_thermal_efuse_get_data(svsp);
if (ret)
return false;

/* Thermal efuse parsing */
adc_ge_t = (svsp->tefuse[1] >> 22) & GENMASK(9, 0);
adc_oe_t = (svsp->tefuse[1] >> 12) & GENMASK(9, 0);

Expand Down Expand Up @@ -121,11 +41,11 @@ bool svs_mt8183_efuse_parsing(struct svs_platform *svsp)
o_vtsabb < -8 || o_vtsabb > 484 ||
degc_cali < 1 || degc_cali > 63) {
dev_err(svsp->dev, "bad thermal efuse, no mon mode\n");
goto remove_mt8183_svsb_mon_mode;
return -1;
}
} else {
dev_err(svsp->dev, "no thermal efuse, no mon mode\n");
goto remove_mt8183_svsb_mon_mode;
return -1;
}

ge = ((adc_ge_t - 512) * 10000) / 4096;
Expand Down Expand Up @@ -168,7 +88,7 @@ bool svs_mt8183_efuse_parsing(struct svs_platform *svsp)
break;
default:
dev_err(svsb->dev, "unknown sw_id: %u\n", svsb->sw_id);
goto remove_mt8183_svsb_mon_mode;
return -1;
}

temp0 = (degc_cali * 10 / 2);
Expand All @@ -183,12 +103,99 @@ bool svs_mt8183_efuse_parsing(struct svs_platform *svsp)
svsb->bts = (temp0 + temp2 - 250) * 4 / 10;
}

return true;
return 0;
}

bool svs_mt8183_efuse_parsing(struct svs_platform *svsp)
{
struct svs_bank *svsb;
u32 idx, i, ft_pgm;
int ret;

for (i = 0; i < svsp->efuse_max; i++)
if (svsp->efuse[i])
dev_info(svsp->dev, "M_HW_RES%d: 0x%08x\n",
i, svsp->efuse[i]);

if (!svsp->efuse[2]) {
dev_notice(svsp->dev, "svs_efuse[2] = 0x0?\n");
return false;
}

/* Svs efuse parsing */
ft_pgm = (svsp->efuse[0] >> 4) & GENMASK(3, 0);

remove_mt8183_svsb_mon_mode:
for (idx = 0; idx < svsp->bank_max; idx++) {
svsb = &svsp->banks[idx];
svsb->mode_support &= ~SVSB_MODE_MON;

if (ft_pgm <= 1)
svsb->volt_flags |= SVSB_INIT01_VOLT_IGNORE;

switch (svsb->sw_id) {
case SVSB_CPU_LITTLE:
svsb->bdes = svsp->efuse[16] & GENMASK(7, 0);
svsb->mdes = (svsp->efuse[16] >> 8) & GENMASK(7, 0);
svsb->dcbdet = (svsp->efuse[16] >> 16) & GENMASK(7, 0);
svsb->dcmdet = (svsp->efuse[16] >> 24) & GENMASK(7, 0);
svsb->mtdes = (svsp->efuse[17] >> 16) & GENMASK(7, 0);

if (ft_pgm <= 3)
svsb->volt_od += 10;
else
svsb->volt_od += 2;
break;
case SVSB_CPU_BIG:
svsb->bdes = svsp->efuse[18] & GENMASK(7, 0);
svsb->mdes = (svsp->efuse[18] >> 8) & GENMASK(7, 0);
svsb->dcbdet = (svsp->efuse[18] >> 16) & GENMASK(7, 0);
svsb->dcmdet = (svsp->efuse[18] >> 24) & GENMASK(7, 0);
svsb->mtdes = svsp->efuse[17] & GENMASK(7, 0);

if (ft_pgm <= 3)
svsb->volt_od += 15;
else
svsb->volt_od += 12;
break;
case SVSB_CCI:
svsb->bdes = svsp->efuse[4] & GENMASK(7, 0);
svsb->mdes = (svsp->efuse[4] >> 8) & GENMASK(7, 0);
svsb->dcbdet = (svsp->efuse[4] >> 16) & GENMASK(7, 0);
svsb->dcmdet = (svsp->efuse[4] >> 24) & GENMASK(7, 0);
svsb->mtdes = (svsp->efuse[5] >> 16) & GENMASK(7, 0);

if (ft_pgm <= 3)
svsb->volt_od += 10;
else
svsb->volt_od += 2;
break;
case SVSB_GPU:
svsb->bdes = svsp->efuse[6] & GENMASK(7, 0);
svsb->mdes = (svsp->efuse[6] >> 8) & GENMASK(7, 0);
svsb->dcbdet = (svsp->efuse[6] >> 16) & GENMASK(7, 0);
svsb->dcmdet = (svsp->efuse[6] >> 24) & GENMASK(7, 0);
svsb->mtdes = svsp->efuse[5] & GENMASK(7, 0);

if (ft_pgm >= 2) {
svsb->freq_base = 800000000; /* 800MHz */
svsb->dvt_fixed = 2;
}
break;
default:
dev_err(svsb->dev, "unknown sw_id: %u\n", svsb->sw_id);
return false;
}
}

ret = svs_thermal_efuse_get_data(svsp);
if (ret)
return false;

ret = svs_mt8183_efuse_thermal_parsing(svsp);
if (ret) {
for (idx = 0; idx < svsp->bank_max; idx++) {
svsb = &svsp->banks[idx];
svsb->mode_support &= ~SVSB_MODE_MON;
}
}

return true;
Expand Down

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