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soc: mediatek: mtk-svs: Move SoC specific functions to new files
With every SoC added to the driver, it grows. Move SoC specific callbacks to a new source files. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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/* SPDX-License-Identifier: GPL-2.0-only */ | ||
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#ifndef __DRV_SVS_MT8183_H | ||
#define __DRV_SVS_MT8183_H | ||
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static struct svs_bank svs_mt8183_banks[] = { | ||
{ | ||
.sw_id = SVSB_CPU_LITTLE, | ||
.set_freq_pct = svs_set_bank_freq_pct_v2, | ||
.get_volts = svs_get_bank_volts_v2, | ||
.cpu_id = 0, | ||
.buck_name = "proc", | ||
.volt_flags = SVSB_INIT01_VOLT_INC_ONLY, | ||
.mode_support = SVSB_MODE_INIT01 | SVSB_MODE_INIT02, | ||
.opp_count = MAX_OPP_ENTRIES, | ||
.freq_base = 1989000000, | ||
.vboot = 0x30, | ||
.volt_step = 6250, | ||
.volt_base = 500000, | ||
.vmax = 0x64, | ||
.vmin = 0x18, | ||
.age_config = 0x555555, | ||
.dc_config = 0x555555, | ||
.dvt_fixed = 0x7, | ||
.vco = 0x10, | ||
.chk_shift = 0x77, | ||
.core_sel = 0x8fff0000, | ||
.int_st = BIT(0), | ||
.ctl0 = 0x00010001, | ||
}, | ||
{ | ||
.sw_id = SVSB_CPU_BIG, | ||
.set_freq_pct = svs_set_bank_freq_pct_v2, | ||
.get_volts = svs_get_bank_volts_v2, | ||
.cpu_id = 4, | ||
.buck_name = "proc", | ||
.volt_flags = SVSB_INIT01_VOLT_INC_ONLY, | ||
.mode_support = SVSB_MODE_INIT01 | SVSB_MODE_INIT02, | ||
.opp_count = MAX_OPP_ENTRIES, | ||
.freq_base = 1989000000, | ||
.vboot = 0x30, | ||
.volt_step = 6250, | ||
.volt_base = 500000, | ||
.vmax = 0x58, | ||
.vmin = 0x10, | ||
.age_config = 0x555555, | ||
.dc_config = 0x555555, | ||
.dvt_fixed = 0x7, | ||
.vco = 0x10, | ||
.chk_shift = 0x77, | ||
.core_sel = 0x8fff0001, | ||
.int_st = BIT(1), | ||
.ctl0 = 0x00000001, | ||
}, | ||
{ | ||
.sw_id = SVSB_CCI, | ||
.set_freq_pct = svs_set_bank_freq_pct_v2, | ||
.get_volts = svs_get_bank_volts_v2, | ||
.buck_name = "proc", | ||
.volt_flags = SVSB_INIT01_VOLT_INC_ONLY, | ||
.mode_support = SVSB_MODE_INIT01 | SVSB_MODE_INIT02, | ||
.opp_count = MAX_OPP_ENTRIES, | ||
.freq_base = 1196000000, | ||
.vboot = 0x30, | ||
.volt_step = 6250, | ||
.volt_base = 500000, | ||
.vmax = 0x64, | ||
.vmin = 0x18, | ||
.age_config = 0x555555, | ||
.dc_config = 0x555555, | ||
.dvt_fixed = 0x7, | ||
.vco = 0x10, | ||
.chk_shift = 0x77, | ||
.core_sel = 0x8fff0002, | ||
.int_st = BIT(2), | ||
.ctl0 = 0x00100003, | ||
}, | ||
{ | ||
.sw_id = SVSB_GPU, | ||
.set_freq_pct = svs_set_bank_freq_pct_v2, | ||
.get_volts = svs_get_bank_volts_v2, | ||
.buck_name = "mali", | ||
.tzone_name = "tzts2", | ||
.volt_flags = SVSB_INIT01_PD_REQ | | ||
SVSB_INIT01_VOLT_INC_ONLY, | ||
.mode_support = SVSB_MODE_INIT01 | SVSB_MODE_INIT02 | | ||
SVSB_MODE_MON, | ||
.opp_count = MAX_OPP_ENTRIES, | ||
.freq_base = 900000000, | ||
.vboot = 0x30, | ||
.volt_step = 6250, | ||
.volt_base = 500000, | ||
.vmax = 0x40, | ||
.vmin = 0x14, | ||
.age_config = 0x555555, | ||
.dc_config = 0x555555, | ||
.dvt_fixed = 0x3, | ||
.vco = 0x10, | ||
.chk_shift = 0x77, | ||
.core_sel = 0x8fff0003, | ||
.int_st = BIT(3), | ||
.ctl0 = 0x00050001, | ||
.tzone_htemp = 85000, | ||
.tzone_htemp_voffset = 0, | ||
.tzone_ltemp = 25000, | ||
.tzone_ltemp_voffset = 3, | ||
}, | ||
}; | ||
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bool svs_mt8183_efuse_parsing(struct svs_platform *svsp); | ||
int svs_mt8183_platform_probe(struct svs_platform *svsp); | ||
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#endif |
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/* SPDX-License-Identifier: GPL-2.0-only */ | ||
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#ifndef __DRV_SVS_MT8192_H | ||
#define __DRV_SVS_MT8192_H | ||
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static struct svs_bank svs_mt8192_banks[] = { | ||
{ | ||
.sw_id = SVSB_GPU, | ||
.type = SVSB_LOW, | ||
.set_freq_pct = svs_set_bank_freq_pct_v3, | ||
.get_volts = svs_get_bank_volts_v3, | ||
.volt_flags = SVSB_REMOVE_DVTFIXED_VOLT, | ||
.mode_support = SVSB_MODE_INIT02, | ||
.opp_count = MAX_OPP_ENTRIES, | ||
.freq_base = 688000000, | ||
.turn_freq_base = 688000000, | ||
.volt_step = 6250, | ||
.volt_base = 400000, | ||
.vmax = 0x60, | ||
.vmin = 0x1a, | ||
.age_config = 0x555555, | ||
.dc_config = 0x1, | ||
.dvt_fixed = 0x1, | ||
.vco = 0x18, | ||
.chk_shift = 0x87, | ||
.core_sel = 0x0fff0100, | ||
.int_st = BIT(0), | ||
.ctl0 = 0x00540003, | ||
}, | ||
{ | ||
.sw_id = SVSB_GPU, | ||
.type = SVSB_HIGH, | ||
.set_freq_pct = svs_set_bank_freq_pct_v3, | ||
.get_volts = svs_get_bank_volts_v3, | ||
.tzone_name = "gpu1", | ||
.volt_flags = SVSB_REMOVE_DVTFIXED_VOLT | | ||
SVSB_MON_VOLT_IGNORE, | ||
.mode_support = SVSB_MODE_INIT02 | SVSB_MODE_MON, | ||
.opp_count = MAX_OPP_ENTRIES, | ||
.freq_base = 902000000, | ||
.turn_freq_base = 688000000, | ||
.volt_step = 6250, | ||
.volt_base = 400000, | ||
.vmax = 0x60, | ||
.vmin = 0x1a, | ||
.age_config = 0x555555, | ||
.dc_config = 0x1, | ||
.dvt_fixed = 0x6, | ||
.vco = 0x18, | ||
.chk_shift = 0x87, | ||
.core_sel = 0x0fff0101, | ||
.int_st = BIT(1), | ||
.ctl0 = 0x00540003, | ||
.tzone_htemp = 85000, | ||
.tzone_htemp_voffset = 0, | ||
.tzone_ltemp = 25000, | ||
.tzone_ltemp_voffset = 7, | ||
}, | ||
}; | ||
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bool svs_mt8192_efuse_parsing(struct svs_platform *svsp); | ||
int svs_mt8192_platform_probe(struct svs_platform *svsp); | ||
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#endif |
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