Merge pull request #29 from meringu/refactor

Added adder

lib/circuits/component/full_adder.rb

@@ -0,0 +1,71 @@
+require 'circuits/component/base'
+require 'circuits/component/and'
+require 'circuits/component/or'
+require 'circuits/component/xor'
+
+module Circuits
+  module Component
+    # Full 1-bit Adder
+    class FullAdder < Base
+      def initialize
+        sub_components = create_sub_components
+        super(inputs: [:a, :b, :c_in],
+              outputs: [:s, :c_out],
+              sub_components: sub_components.map { |_, v| v },
+              ticks: 3)
+        link sub_components
+      end
+
+      private
+
+      def create_sub_components
+        {
+          and_in: And.new,
+          and_carry: And.new,
+          or_gate: Or.new,
+          xor_in: Xor.new,
+          xor_out: Xor.new
+        }
+      end
+
+      def link(sub_components)
+        link_and_in sub_components
+        link_and_carry sub_components
+        link_or_gate sub_components
+        link_xor_in sub_components
+        link_xor_out sub_components
+        link_outputs sub_components
+      end
+
+      def link_and_in(sub_components)
+        sub_components[:and_in].a.set a
+        sub_components[:and_in].b.set b
+      end
+
+      def link_and_carry(sub_components)
+        sub_components[:and_carry].a.set sub_components[:xor_in].out
+        sub_components[:and_carry].b.set c_in
+      end
+
+      def link_or_gate(sub_components)
+        sub_components[:or_gate].a.set sub_components[:and_in].out
+        sub_components[:or_gate].b.set sub_components[:and_carry].out
+      end
+
+      def link_xor_in(sub_components)
+        sub_components[:xor_in].a.set a
+        sub_components[:xor_in].b.set b
+      end
+
+      def link_xor_out(sub_components)
+        sub_components[:xor_out].a.set sub_components[:xor_in].out
+        sub_components[:xor_out].b.set c_in
+      end
+
+      def link_outputs(sub_components)
+        s.set sub_components[:xor_out].out
+        c_out.set sub_components[:or_gate].out
+      end
+    end
+  end
+end

lib/circuits/component/half_adder.rb

@@ -0,0 +1,35 @@
+require 'circuits/component/base'
+require 'circuits/component/and'
+require 'circuits/component/xor'
+
+module Circuits
+  module Component
+    # Half 1-bit Adder
+    class HalfAdder < Base
+      def initialize
+        and_gate = And.new
+        xor_gate = Xor.new
+        super(inputs: 2,
+              outputs: [:s, :c],
+              sub_components: [and_gate, xor_gate],
+              ticks: 1)
+        link_internals and_gate, xor_gate
+        link_outputs and_gate, xor_gate
+      end
+
+      private
+
+      def link_internals(and_gate, xor_gate)
+        and_gate.a.set a
+        and_gate.b.set b
+        xor_gate.a.set a
+        xor_gate.b.set b
+      end
+
+      def link_outputs(and_gate, xor_gate)
+        s.set xor_gate.out
+        c.set and_gate.out
+      end
+    end
+  end
+end

lib/circuits/version.rb

@@ -1,5 +1,5 @@
 # Circuits allows you to express logical circuits in code
 module Circuits
   # The version of the Circuits gem
-  VERSION = '0.11.1'
+  VERSION = '0.11.2'
 end

spec/unit/circuits/component/full_adder_spec.rb

@@ -0,0 +1,104 @@
+require 'spec_helper'
+require 'circuits/component/full_adder'
+
+describe Circuits::Component::FullAdder do
+  describe '#tick' do
+    subject { Circuits::Component::FullAdder.new }
+
+    context 'no overflow' do
+      context '0 + 0' do
+        it '= 0' do
+          subject.a.set false
+          subject.b.set false
+          subject.tick
+          subject.tock
+          expect(subject.s.get).to eq false
+          expect(subject.c_out.get).to eq false
+        end
+      end
+
+      context '0 + 1' do
+        it '= 1' do
+          subject.a.set false
+          subject.b.set true
+          subject.tick
+          subject.tock
+          expect(subject.s.get).to eq true
+          expect(subject.c_out.get).to eq false
+        end
+      end
+
+      context '1 + 0' do
+        it '= 1' do
+          subject.a.set true
+          subject.b.set false
+          subject.tick
+          subject.tock
+          expect(subject.s.get).to eq true
+          expect(subject.c_out.get).to eq false
+        end
+      end
+
+      context '1 + 1' do
+        it '= 10' do
+          subject.a.set true
+          subject.b.set true
+          subject.tick
+          subject.tock
+          expect(subject.s.get).to eq false
+          expect(subject.c_out.get).to eq true
+        end
+      end
+    end
+
+    context 'overflow' do
+      context '0 + 0 (+ 1)' do
+        it '= 1' do
+          subject.a.set false
+          subject.b.set false
+          subject.c_in.set true
+          subject.tick
+          subject.tock
+          expect(subject.s.get).to eq true
+          expect(subject.c_out.get).to eq false
+        end
+      end
+
+      context '0 + 1 (+ 1)' do
+        it '= 10' do
+          subject.a.set false
+          subject.b.set true
+          subject.c_in.set true
+          subject.tick
+          subject.tock
+          expect(subject.s.get).to eq false
+          expect(subject.c_out.get).to eq true
+        end
+      end
+
+      context '1 + 0 (+ 1)' do
+        it '= 10' do
+          subject.a.set true
+          subject.b.set false
+          subject.c_in.set true
+          subject.tick
+          subject.tock
+          expect(subject.s.get).to eq false
+          expect(subject.c_out.get).to eq true
+        end
+      end
+
+      context '1 + 1 (+ 1)' do
+        it '= 11' do
+          subject.a.set true
+          subject.b.set true
+          subject.c_in.set true
+          subject.tick
+          subject.tock
+          expect(subject.s.get).to eq true
+          expect(subject.c_out.get).to eq true
+        end
+      end
+    end
+  end
+end

spec/unit/circuits/component/half_adder_spec.rb

@@ -0,0 +1,52 @@
+require 'spec_helper'
+require 'circuits/component/half_adder'
+
+describe Circuits::Component::HalfAdder do
+  describe '#tick' do
+    subject { Circuits::Component::HalfAdder.new }
+
+    context '0 + 0' do
+      it '= 0' do
+        subject.a.set false
+        subject.b.set false
+        subject.tick
+        subject.tock
+        expect(subject.s.get).to eq false
+        expect(subject.c.get).to eq false
+      end
+    end
+
+    context '0 + 1' do
+      it '= 1' do
+        subject.a.set false
+        subject.b.set true
+        subject.tick
+        subject.tock
+        expect(subject.s.get).to eq true
+        expect(subject.c.get).to eq false
+      end
+    end
+
+    context '1 + 0' do
+      it '= 1' do
+        subject.a.set true
+        subject.b.set false
+        subject.tick
+        subject.tock
+        expect(subject.s.get).to eq true
+        expect(subject.c.get).to eq false
+      end
+    end
+
+    context '1 + 1' do
+      it '= 10' do
+        subject.a.set true
+        subject.b.set true
+        subject.tick
+        subject.tock
+        expect(subject.s.get).to eq false
+        expect(subject.c.get).to eq true
+      end
+    end
+  end
+end