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Merge 54caf34 into 1b10caf
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meringu committed Jun 7, 2021
2 parents 1b10caf + 54caf34 commit b2ceea1
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Showing 37 changed files with 1,467 additions and 1,363 deletions.
2 changes: 1 addition & 1 deletion .travis.yml
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
language: ruby
rvm:
- 2.1.7
- 3.0.1
deploy:
provider: rubygems
api_key:
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2 changes: 2 additions & 0 deletions Gemfile
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@@ -1,3 +1,5 @@
# frozen_string_literal: true

source 'https://rubygems.org'

# Specify your gem's dependencies in circuits.gemspec
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13 changes: 3 additions & 10 deletions Rakefile
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@@ -1,22 +1,15 @@
# frozen_string_literal: true

require 'bundler/gem_tasks'
require 'rspec/core/rake_task'
require 'rubocop/rake_task'
require 'reek/rake/task'
require 'yard'

RSpec::Core::RakeTask.new(:spec)

task default: :spec

RuboCop::RakeTask.new(:rubocop) do |task|
task.patterns = ['lib/**/*.rb']
# only show the files with failures
task.formatters = ['files']
end

Reek::Rake::Task.new

task lint: [:rubocop, :reek]
RuboCop::RakeTask.new(:lint)

YARD::Rake::YardocTask.new(:yard) do |t|
t.stats_options = ['--list-undoc']
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31 changes: 16 additions & 15 deletions circuits.gemspec
Original file line number Diff line number Diff line change
@@ -1,27 +1,28 @@
# coding: utf-8
lib = File.expand_path('../lib', __FILE__)
# frozen_string_literal: true

lib = File.expand_path('lib', __dir__)
$LOAD_PATH.unshift(lib) unless $LOAD_PATH.include?(lib)
require 'circuits/version'

Gem::Specification.new do |spec|
spec.name = 'circuits'
spec.version = Circuits::VERSION
spec.authors = ['Henry Muru Paenga']
spec.email = ['meringu@gmail.com']
spec.summary = 'Express logical circuits in code'
spec.homepage = 'https://github.com/meringu/circuits'
spec.license = 'MIT'
spec.name = 'circuits'
spec.version = Circuits::VERSION
spec.authors = ['Henry Muru Paenga']
spec.email = ['meringu@gmail.com']
spec.summary = 'Express logical circuits in code'
spec.homepage = 'https://github.com/meringu/circuits'
spec.license = 'MIT'
spec.required_ruby_version = '~> 3.0'

spec.files = `git ls-files -z`.split("\x0")
spec.executables = spec.files.grep(%r{^bin/}) { |f| File.basename(f) }
spec.test_files = spec.files.grep(%r{^(test|spec|features)/})
spec.require_paths = ['lib']

spec.add_development_dependency 'bundler', '~> 1.7'
spec.add_development_dependency 'bundler', '~> 2'
spec.add_development_dependency 'coveralls', '~> 0.8'
spec.add_development_dependency 'rake', '~> 10.0'
spec.add_development_dependency 'rspec', '~> 3.3'
spec.add_development_dependency 'rubocop', '~> 0.34'
spec.add_development_dependency 'reek', '~> 3.6'
spec.add_development_dependency 'yard', '~> 0.8.7'
spec.add_development_dependency 'rake', '~> 13'
spec.add_development_dependency 'rspec', '~> 3'
spec.add_development_dependency 'rubocop', '~> 1'
spec.add_development_dependency 'yard', '~> 0.9.26'
end
2 changes: 2 additions & 0 deletions lib/circuits.rb
Original file line number Diff line number Diff line change
@@ -1,3 +1,5 @@
# frozen_string_literal: true

require 'circuits/component/and'
require 'circuits/component/d'
require 'circuits/component/nand'
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2 changes: 2 additions & 0 deletions lib/circuits/component/and.rb
Original file line number Diff line number Diff line change
@@ -1,3 +1,5 @@
# frozen_string_literal: true

require 'circuits/component/base'

module Circuits
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17 changes: 12 additions & 5 deletions lib/circuits/component/base.rb
Original file line number Diff line number Diff line change
@@ -1,3 +1,5 @@
# frozen_string_literal: true

require 'circuits/terminal/input'
require 'circuits/terminal/output'

Expand Down Expand Up @@ -49,6 +51,7 @@ def tock
def [](port)
port_mapping = @port_mappings[port]
return nil if port_mapping.nil?

port_number = port_mapping[:number]
case port_mapping[:type]
when :input
Expand All @@ -61,12 +64,12 @@ def [](port)
private

def create_inputs(inputs)
input_count = inputs.class == Fixnum ? inputs : inputs.length
input_count = inputs.instance_of?(Integer) ? inputs : inputs.length
input_count.times.map { Circuits::Terminal::Input.new }
end

def create_outputs(outputs)
output_count = outputs.class == Fixnum ? outputs : outputs.length
output_count = outputs.instance_of?(Integer) ? outputs : outputs.length
output_count.times.map { Circuits::Terminal::Output.new }
end

Expand All @@ -90,7 +93,8 @@ def declare_ports_as_methods
end

def input_mappings(input_names)
return default_input_mappings unless input_names.class == Array
return default_input_mappings unless input_names.instance_of?(Array)

input_names.map.each_with_index do |input_name, num|
{ input_name => { type: :input, number: num } }
end
Expand All @@ -99,21 +103,24 @@ def input_mappings(input_names)
def default_input_mappings
input_count = inputs.length
return [{ in: { type: :input, number: 0 } }] if input_count == 1

input_count.times.collect do |num|
{ num_to_port(num) => { type: :input, number: num } }
end
end

def output_mappings(output_names)
return default_output_mappings unless output_names.class == Array
return default_output_mappings unless output_names.instance_of?(Array)

output_names.map.each_with_index do |output_name, num|
{ output_name => { type: :output, number: num } }
end
end

def default_output_mappings
output_count = outputs.length
return[{ out: { type: :output, number: 0 } }] if output_count == 1
return [{ out: { type: :output, number: 0 } }] if output_count == 1

output_count.times.collect do |num|
{ num_to_port(num + inputs.length) => { type: :output, number: num } }
end
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28 changes: 15 additions & 13 deletions lib/circuits/component/d.rb
Original file line number Diff line number Diff line change
@@ -1,3 +1,5 @@
# frozen_string_literal: true

require 'circuits/component/base'
require 'circuits/component/and'
require 'circuits/component/sr_nand'
Expand All @@ -8,7 +10,7 @@ module Component
class D < Base
def initialize
sub_components = create_sub_components
super(inputs: [:d, :clk], outputs: [:q, :not_q],
super(inputs: %i[d clk], outputs: %i[q not_q],
sub_components: sub_components.map { |_, v| v },
ticks: 4)
link sub_components
Expand All @@ -35,24 +37,24 @@ def link(sub_components)
not_q.set sub_components[:sr_nand_out].not_q
end

def link_and_gate(sc)
sc[:and_gate].a.set sc[:sr_nand_clk].not_q
sc[:and_gate].b.set clk
def link_and_gate(scs)
scs[:and_gate].a.set scs[:sr_nand_clk].not_q
scs[:and_gate].b.set clk
end

def link_sr_nand_clk(sc)
sc[:sr_nand_clk].not_s.set sc[:sr_nand_d].not_q
sc[:sr_nand_clk].not_r.set clk
def link_sr_nand_clk(scs)
scs[:sr_nand_clk].not_s.set scs[:sr_nand_d].not_q
scs[:sr_nand_clk].not_r.set clk
end

def link_sr_nand_d(sc)
sc[:sr_nand_d].not_s.set sc[:and_gate].out
sc[:sr_nand_d].not_r.set d
def link_sr_nand_d(scs)
scs[:sr_nand_d].not_s.set scs[:and_gate].out
scs[:sr_nand_d].not_r.set d
end

def link_sr_nand_out(sc)
sc[:sr_nand_out].not_s.set sc[:sr_nand_clk].not_q
sc[:sr_nand_out].not_r.set sc[:sr_nand_d].q
def link_sr_nand_out(scs)
scs[:sr_nand_out].not_s.set scs[:sr_nand_clk].not_q
scs[:sr_nand_out].not_r.set scs[:sr_nand_d].q
end

def reset
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8 changes: 5 additions & 3 deletions lib/circuits/component/full_adder.rb
Original file line number Diff line number Diff line change
@@ -1,3 +1,5 @@
# frozen_string_literal: true

require 'circuits/component/base'
require 'circuits/component/half_adder'
require 'circuits/component/or'
Expand All @@ -8,8 +10,8 @@ module Component
class FullAdder < Base
def initialize
sub_components = create_sub_components
super(inputs: [:a, :b, :c_in],
outputs: [:s, :c_out],
super(inputs: %i[a b c_in],
outputs: %i[s c_out],
sub_components: sub_components.map { |_, v| v },
ticks: 3)
link sub_components
Expand All @@ -21,7 +23,7 @@ def create_sub_components
{
half_adder_in: HalfAdder.new,
half_adder_carry: HalfAdder.new,
or_gate: Or.new,
or_gate: Or.new
}
end

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4 changes: 3 additions & 1 deletion lib/circuits/component/half_adder.rb
Original file line number Diff line number Diff line change
@@ -1,3 +1,5 @@
# frozen_string_literal: true

require 'circuits/component/base'
require 'circuits/component/and'
require 'circuits/component/xor'
Expand All @@ -10,7 +12,7 @@ def initialize
and_gate = And.new
xor_gate = Xor.new
super(inputs: 2,
outputs: [:s, :c_out],
outputs: %i[s c_out],
sub_components: [and_gate, xor_gate],
ticks: 1)
link_internals and_gate, xor_gate
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2 changes: 2 additions & 0 deletions lib/circuits/component/nand.rb
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@@ -1,3 +1,5 @@
# frozen_string_literal: true

require 'circuits/component/base'

module Circuits
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2 changes: 2 additions & 0 deletions lib/circuits/component/nor.rb
Original file line number Diff line number Diff line change
@@ -1,3 +1,5 @@
# frozen_string_literal: true

require 'circuits/component/base'

module Circuits
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2 changes: 2 additions & 0 deletions lib/circuits/component/not.rb
Original file line number Diff line number Diff line change
@@ -1,3 +1,5 @@
# frozen_string_literal: true

require 'circuits/component/base'

module Circuits
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2 changes: 2 additions & 0 deletions lib/circuits/component/or.rb
Original file line number Diff line number Diff line change
@@ -1,3 +1,5 @@
# frozen_string_literal: true

require 'circuits/component/base'

module Circuits
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6 changes: 4 additions & 2 deletions lib/circuits/component/sr_nand.rb
Original file line number Diff line number Diff line change
@@ -1,3 +1,5 @@
# frozen_string_literal: true

require 'circuits/component/base'
require 'circuits/component/nand'

Expand All @@ -8,8 +10,8 @@ class SrNand < Base
def initialize
nand_s = Nand.new
nand_r = Nand.new
super(inputs: [:not_s, :not_r],
outputs: [:q, :not_q],
super(inputs: %i[not_s not_r],
outputs: %i[q not_q],
sub_components: [nand_s, nand_r],
ticks: 2)
link nand_s, nand_r
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6 changes: 4 additions & 2 deletions lib/circuits/component/sr_nor.rb
Original file line number Diff line number Diff line change
@@ -1,3 +1,5 @@
# frozen_string_literal: true

require 'circuits/component/base'
require 'circuits/component/nor'

Expand All @@ -8,8 +10,8 @@ class SrNor < Base
def initialize
nor_s = Nor.new
nor_r = Nor.new
super(inputs: [:r, :s],
outputs: [:q, :not_q],
super(inputs: %i[r s],
outputs: %i[q not_q],
sub_components: [nor_s, nor_r],
ticks: 2)
link nor_s, nor_r
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2 changes: 2 additions & 0 deletions lib/circuits/component/xnor.rb
Original file line number Diff line number Diff line change
@@ -1,3 +1,5 @@
# frozen_string_literal: true

require 'circuits/component/base'

module Circuits
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2 changes: 2 additions & 0 deletions lib/circuits/component/xor.rb
Original file line number Diff line number Diff line change
@@ -1,3 +1,5 @@
# frozen_string_literal: true

require 'circuits/component/base'

module Circuits
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12 changes: 7 additions & 5 deletions lib/circuits/terminal/input.rb
Original file line number Diff line number Diff line change
@@ -1,3 +1,5 @@
# frozen_string_literal: true

require 'circuits/terminal/output'

module Circuits
Expand All @@ -21,11 +23,11 @@ def get
# Output to use or state to make a dummy output with
# @param [Output, Boolean] output The output to read from, or state
def set(output)
if [Input, Output].include? output.class
@terminal = output
else
@terminal = Output.new(state: output)
end
@terminal = if [Input, Output].include? output.class
output
else
Output.new(state: output)
end
end
end
end
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12 changes: 7 additions & 5 deletions lib/circuits/terminal/output.rb
Original file line number Diff line number Diff line change
@@ -1,3 +1,5 @@
# frozen_string_literal: true

module Circuits
# An input or an output to read from and set
module Terminal
Expand Down Expand Up @@ -26,11 +28,11 @@ def set(state)

# Sets the state what was last set
def tock
if [Input, Output].include? @next_state.class
@state = @next_state.get
else
@state = @next_state
end
@state = if [Input, Output].include? @next_state.class
@next_state.get
else
@next_state
end
end
end
end
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2 changes: 2 additions & 0 deletions lib/circuits/version.rb
Original file line number Diff line number Diff line change
@@ -1,3 +1,5 @@
# frozen_string_literal: true

# Circuits allows you to express logical circuits in code
module Circuits
# The version of the Circuits gem
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12 changes: 7 additions & 5 deletions spec/spec_helper.rb
Original file line number Diff line number Diff line change
@@ -1,5 +1,7 @@
require 'coveralls'
require 'simplecov'

SimpleCov.start
Coveralls.wear!
# frozen_string_literal: true

require 'coveralls'
require 'simplecov'

SimpleCov.start
Coveralls.wear!

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