add lenet-Fpga version and CPU

mfarhadi · May 18, 2018 · 1bc66ac · 1bc66ac
1 parent 41a31e6
commit 1bc66ac
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Showing 223 changed files with 478,369 additions and 6,666 deletions.
diff --git a/.idea/CNNIOT.iml b/.idea/CNNIOT.iml
diff --git a/.idea/inspectionProfiles/profiles_settings.xml b/.idea/inspectionProfiles/profiles_settings.xml
diff --git a/.idea/misc.xml b/.idea/misc.xml
diff --git a/.idea/modules.xml b/.idea/modules.xml
diff --git a/.idea/vcs.xml b/.idea/vcs.xml
diff --git a/.idea/workspace.xml b/.idea/workspace.xml
diff --git a/D1.bit → Bitstream.bit b/D1.bit → Bitstream.bit
diff --git a/D1.tcl → Bitstream.tcl b/D1.tcl → Bitstream.tcl
@@ -127,8 +127,8 @@ if { $bCheckIPs == 1 } {
 xilinx.com:ip:smartconnect:1.0\
 xilinx.com:ip:processing_system7:5.5\
 xilinx.com:ip:proc_sys_reset:5.0\
-xilinx.com:hls:cnn:1.0\
 xilinx.com:ip:axi_dma:7.1\
+xilinx.com:hls:cnn:1.0\
 "
 
    set list_ips_missing ""
@@ -158,13 +158,13 @@ if { $bCheckIPsPassed != 1 } {
 ##################################################################
 
 
-# Hierarchical cell: const_multiply
-proc create_hier_cell_const_multiply { parentCell nameHier } {
+# Hierarchical cell: CNNIOT
+proc create_hier_cell_CNNIOT { parentCell nameHier } {
 
   variable script_folder
 
   if { $parentCell eq "" || $nameHier eq "" } {
-     catch {common::send_msg_id "BD_TCL-102" "ERROR" "create_hier_cell_const_multiply() - Empty argument(s)!"}
+     catch {common::send_msg_id "BD_TCL-102" "ERROR" "create_hier_cell_CNNIOT() - Empty argument(s)!"}
      return
   }
 
@@ -201,11 +201,8 @@ proc create_hier_cell_const_multiply { parentCell nameHier } {
   create_bd_pin -dir I -type rst axi_resetn
   create_bd_pin -dir I -type clk m_axi_mm2s_aclk
 
-  # Create instance: cnn_0, and set properties
-  set cnn_0 [ create_bd_cell -type ip -vlnv xilinx.com:hls:cnn:1.0 cnn_0 ]
-
-  # Create instance: multiply_dma, and set properties
-  set multiply_dma [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_dma:7.1 multiply_dma ]
+  # Create instance: CNN_dma, and set properties
+  set CNN_dma [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_dma:7.1 CNN_dma ]
   set_property -dict [ list \
    CONFIG.c_addr_width {32} \
    CONFIG.c_include_mm2s_dre {1} \
@@ -215,18 +212,21 @@ proc create_hier_cell_const_multiply { parentCell nameHier } {
    CONFIG.c_mm2s_burst_size {2} \
    CONFIG.c_sg_include_stscntrl_strm {0} \
    CONFIG.c_sg_length_width {23} \
- ] $multiply_dma
+ ] $CNN_dma
+
+  # Create instance: Main, and set properties
+  set Main [ create_bd_cell -type ip -vlnv xilinx.com:hls:cnn:1.0 Main ]
 
   # Create interface connections
-  connect_bd_intf_net -intf_net cnn_0_out_data [get_bd_intf_pins cnn_0/out_data] [get_bd_intf_pins multiply_dma/S_AXIS_S2MM]
-  connect_bd_intf_net -intf_net multiply_dma_M_AXIS_MM2S [get_bd_intf_pins cnn_0/in_data] [get_bd_intf_pins multiply_dma/M_AXIS_MM2S]
-  connect_bd_intf_net -intf_net multiply_dma_M_AXI_MM2S [get_bd_intf_pins M_AXI_MM2S] [get_bd_intf_pins multiply_dma/M_AXI_MM2S]
-  connect_bd_intf_net -intf_net multiply_dma_M_AXI_S2MM [get_bd_intf_pins M_AXI_S2MM] [get_bd_intf_pins multiply_dma/M_AXI_S2MM]
-  connect_bd_intf_net -intf_net ps7_0_axi_periph_M02_AXI [get_bd_intf_pins S_AXI_LITE] [get_bd_intf_pins multiply_dma/S_AXI_LITE]
+  connect_bd_intf_net -intf_net CNN_dma_M_AXIS_MM2S [get_bd_intf_pins CNN_dma/M_AXIS_MM2S] [get_bd_intf_pins Main/in_data]
+  connect_bd_intf_net -intf_net cnn_0_out_data [get_bd_intf_pins CNN_dma/S_AXIS_S2MM] [get_bd_intf_pins Main/out_data]
+  connect_bd_intf_net -intf_net multiply_dma_M_AXI_MM2S [get_bd_intf_pins M_AXI_MM2S] [get_bd_intf_pins CNN_dma/M_AXI_MM2S]
+  connect_bd_intf_net -intf_net multiply_dma_M_AXI_S2MM [get_bd_intf_pins M_AXI_S2MM] [get_bd_intf_pins CNN_dma/M_AXI_S2MM]
+  connect_bd_intf_net -intf_net ps7_0_axi_periph_M02_AXI [get_bd_intf_pins S_AXI_LITE] [get_bd_intf_pins CNN_dma/S_AXI_LITE]
 
   # Create port connections
-  connect_bd_net -net processing_system7_0_FCLK_CLK0 [get_bd_pins m_axi_mm2s_aclk] [get_bd_pins cnn_0/ap_clk] [get_bd_pins multiply_dma/m_axi_mm2s_aclk] [get_bd_pins multiply_dma/m_axi_s2mm_aclk] [get_bd_pins multiply_dma/s_axi_lite_aclk]
-  connect_bd_net -net rst_ps7_0_100M_peripheral_aresetn [get_bd_pins axi_resetn] [get_bd_pins cnn_0/ap_rst_n] [get_bd_pins multiply_dma/axi_resetn]
+  connect_bd_net -net processing_system7_0_FCLK_CLK0 [get_bd_pins m_axi_mm2s_aclk] [get_bd_pins CNN_dma/m_axi_mm2s_aclk] [get_bd_pins CNN_dma/m_axi_s2mm_aclk] [get_bd_pins CNN_dma/s_axi_lite_aclk] [get_bd_pins Main/ap_clk]
+  connect_bd_net -net rst_ps7_0_100M_peripheral_aresetn [get_bd_pins axi_resetn] [get_bd_pins CNN_dma/axi_resetn] [get_bd_pins Main/ap_rst_n]
 
   # Restore current instance
   current_bd_instance $oldCurInst
@@ -271,15 +271,15 @@ proc create_root_design { parentCell } {
 
   # Create ports
 
+  # Create instance: CNNIOT
+  create_hier_cell_CNNIOT [current_bd_instance .] CNNIOT
+
   # Create instance: axi_smc, and set properties
   set axi_smc [ create_bd_cell -type ip -vlnv xilinx.com:ip:smartconnect:1.0 axi_smc ]
   set_property -dict [ list \
    CONFIG.NUM_SI {2} \
  ] $axi_smc
 
-  # Create instance: const_multiply
-  create_hier_cell_const_multiply [current_bd_instance .] const_multiply
-
   # Create instance: processing_system7_0, and set properties
   set processing_system7_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:processing_system7:5.5 processing_system7_0 ]
   set_property -dict [ list \
@@ -1064,23 +1064,23 @@ proc create_root_design { parentCell } {
 
   # Create interface connections
   connect_bd_intf_net -intf_net axi_smc_M00_AXI [get_bd_intf_pins axi_smc/M00_AXI] [get_bd_intf_pins processing_system7_0/S_AXI_HP0]
-  connect_bd_intf_net -intf_net multiply_dma_M_AXI_MM2S [get_bd_intf_pins axi_smc/S00_AXI] [get_bd_intf_pins const_multiply/M_AXI_MM2S]
-  connect_bd_intf_net -intf_net multiply_dma_M_AXI_S2MM [get_bd_intf_pins axi_smc/S01_AXI] [get_bd_intf_pins const_multiply/M_AXI_S2MM]
+  connect_bd_intf_net -intf_net multiply_dma_M_AXI_MM2S [get_bd_intf_pins CNNIOT/M_AXI_MM2S] [get_bd_intf_pins axi_smc/S00_AXI]
+  connect_bd_intf_net -intf_net multiply_dma_M_AXI_S2MM [get_bd_intf_pins CNNIOT/M_AXI_S2MM] [get_bd_intf_pins axi_smc/S01_AXI]
   connect_bd_intf_net -intf_net processing_system7_0_DDR [get_bd_intf_ports DDR] [get_bd_intf_pins processing_system7_0/DDR]
   connect_bd_intf_net -intf_net processing_system7_0_FIXED_IO [get_bd_intf_ports FIXED_IO] [get_bd_intf_pins processing_system7_0/FIXED_IO]
   connect_bd_intf_net -intf_net processing_system7_0_M_AXI_GP0 [get_bd_intf_pins processing_system7_0/M_AXI_GP0] [get_bd_intf_pins ps7_0_axi_periph/S00_AXI]
-  connect_bd_intf_net -intf_net ps7_0_axi_periph_M02_AXI [get_bd_intf_pins const_multiply/S_AXI_LITE] [get_bd_intf_pins ps7_0_axi_periph/M02_AXI]
+  connect_bd_intf_net -intf_net ps7_0_axi_periph_M02_AXI [get_bd_intf_pins CNNIOT/S_AXI_LITE] [get_bd_intf_pins ps7_0_axi_periph/M02_AXI]
 
   # Create port connections
-  connect_bd_net -net processing_system7_0_FCLK_CLK0 [get_bd_pins axi_smc/aclk] [get_bd_pins const_multiply/m_axi_mm2s_aclk] [get_bd_pins processing_system7_0/FCLK_CLK0] [get_bd_pins processing_system7_0/M_AXI_GP0_ACLK] [get_bd_pins processing_system7_0/S_AXI_HP0_ACLK] [get_bd_pins ps7_0_axi_periph/ACLK] [get_bd_pins ps7_0_axi_periph/M00_ACLK] [get_bd_pins ps7_0_axi_periph/M01_ACLK] [get_bd_pins ps7_0_axi_periph/M02_ACLK] [get_bd_pins ps7_0_axi_periph/M03_ACLK] [get_bd_pins ps7_0_axi_periph/M04_ACLK] [get_bd_pins ps7_0_axi_periph/M05_ACLK] [get_bd_pins ps7_0_axi_periph/M06_ACLK] [get_bd_pins ps7_0_axi_periph/M07_ACLK] [get_bd_pins ps7_0_axi_periph/M08_ACLK] [get_bd_pins ps7_0_axi_periph/M09_ACLK] [get_bd_pins ps7_0_axi_periph/M10_ACLK] [get_bd_pins ps7_0_axi_periph/M11_ACLK] [get_bd_pins ps7_0_axi_periph/M12_ACLK] [get_bd_pins ps7_0_axi_periph/M13_ACLK] [get_bd_pins ps7_0_axi_periph/M14_ACLK] [get_bd_pins ps7_0_axi_periph/M15_ACLK] [get_bd_pins ps7_0_axi_periph/M16_ACLK] [get_bd_pins ps7_0_axi_periph/M17_ACLK] [get_bd_pins ps7_0_axi_periph/M18_ACLK] [get_bd_pins ps7_0_axi_periph/M19_ACLK] [get_bd_pins ps7_0_axi_periph/M20_ACLK] [get_bd_pins ps7_0_axi_periph/M21_ACLK] [get_bd_pins ps7_0_axi_periph/M22_ACLK] [get_bd_pins ps7_0_axi_periph/M23_ACLK] [get_bd_pins ps7_0_axi_periph/M24_ACLK] [get_bd_pins ps7_0_axi_periph/M25_ACLK] [get_bd_pins ps7_0_axi_periph/M26_ACLK] [get_bd_pins ps7_0_axi_periph/M27_ACLK] [get_bd_pins ps7_0_axi_periph/M28_ACLK] [get_bd_pins ps7_0_axi_periph/M29_ACLK] [get_bd_pins ps7_0_axi_periph/M30_ACLK] [get_bd_pins ps7_0_axi_periph/M31_ACLK] [get_bd_pins ps7_0_axi_periph/M32_ACLK] [get_bd_pins ps7_0_axi_periph/M33_ACLK] [get_bd_pins ps7_0_axi_periph/S00_ACLK] [get_bd_pins rst_ps7_0_100M/slowest_sync_clk]
+  connect_bd_net -net processing_system7_0_FCLK_CLK0 [get_bd_pins CNNIOT/m_axi_mm2s_aclk] [get_bd_pins axi_smc/aclk] [get_bd_pins processing_system7_0/FCLK_CLK0] [get_bd_pins processing_system7_0/M_AXI_GP0_ACLK] [get_bd_pins processing_system7_0/S_AXI_HP0_ACLK] [get_bd_pins ps7_0_axi_periph/ACLK] [get_bd_pins ps7_0_axi_periph/M00_ACLK] [get_bd_pins ps7_0_axi_periph/M01_ACLK] [get_bd_pins ps7_0_axi_periph/M02_ACLK] [get_bd_pins ps7_0_axi_periph/M03_ACLK] [get_bd_pins ps7_0_axi_periph/M04_ACLK] [get_bd_pins ps7_0_axi_periph/M05_ACLK] [get_bd_pins ps7_0_axi_periph/M06_ACLK] [get_bd_pins ps7_0_axi_periph/M07_ACLK] [get_bd_pins ps7_0_axi_periph/M08_ACLK] [get_bd_pins ps7_0_axi_periph/M09_ACLK] [get_bd_pins ps7_0_axi_periph/M10_ACLK] [get_bd_pins ps7_0_axi_periph/M11_ACLK] [get_bd_pins ps7_0_axi_periph/M12_ACLK] [get_bd_pins ps7_0_axi_periph/M13_ACLK] [get_bd_pins ps7_0_axi_periph/M14_ACLK] [get_bd_pins ps7_0_axi_periph/M15_ACLK] [get_bd_pins ps7_0_axi_periph/M16_ACLK] [get_bd_pins ps7_0_axi_periph/M17_ACLK] [get_bd_pins ps7_0_axi_periph/M18_ACLK] [get_bd_pins ps7_0_axi_periph/M19_ACLK] [get_bd_pins ps7_0_axi_periph/M20_ACLK] [get_bd_pins ps7_0_axi_periph/M21_ACLK] [get_bd_pins ps7_0_axi_periph/M22_ACLK] [get_bd_pins ps7_0_axi_periph/M23_ACLK] [get_bd_pins ps7_0_axi_periph/M24_ACLK] [get_bd_pins ps7_0_axi_periph/M25_ACLK] [get_bd_pins ps7_0_axi_periph/M26_ACLK] [get_bd_pins ps7_0_axi_periph/M27_ACLK] [get_bd_pins ps7_0_axi_periph/M28_ACLK] [get_bd_pins ps7_0_axi_periph/M29_ACLK] [get_bd_pins ps7_0_axi_periph/M30_ACLK] [get_bd_pins ps7_0_axi_periph/M31_ACLK] [get_bd_pins ps7_0_axi_periph/M32_ACLK] [get_bd_pins ps7_0_axi_periph/M33_ACLK] [get_bd_pins ps7_0_axi_periph/S00_ACLK] [get_bd_pins rst_ps7_0_100M/slowest_sync_clk]
   connect_bd_net -net processing_system7_0_FCLK_RESET0_N [get_bd_pins processing_system7_0/FCLK_RESET0_N] [get_bd_pins rst_ps7_0_100M/ext_reset_in]
   connect_bd_net -net rst_ps7_0_100M_interconnect_aresetn [get_bd_pins ps7_0_axi_periph/ARESETN] [get_bd_pins rst_ps7_0_100M/interconnect_aresetn]
-  connect_bd_net -net rst_ps7_0_100M_peripheral_aresetn [get_bd_pins axi_smc/aresetn] [get_bd_pins const_multiply/axi_resetn] [get_bd_pins ps7_0_axi_periph/M00_ARESETN] [get_bd_pins ps7_0_axi_periph/M01_ARESETN] [get_bd_pins ps7_0_axi_periph/M02_ARESETN] [get_bd_pins ps7_0_axi_periph/M03_ARESETN] [get_bd_pins ps7_0_axi_periph/M04_ARESETN] [get_bd_pins ps7_0_axi_periph/M05_ARESETN] [get_bd_pins ps7_0_axi_periph/M06_ARESETN] [get_bd_pins ps7_0_axi_periph/M07_ARESETN] [get_bd_pins ps7_0_axi_periph/M08_ARESETN] [get_bd_pins ps7_0_axi_periph/M09_ARESETN] [get_bd_pins ps7_0_axi_periph/M10_ARESETN] [get_bd_pins ps7_0_axi_periph/M11_ARESETN] [get_bd_pins ps7_0_axi_periph/M12_ARESETN] [get_bd_pins ps7_0_axi_periph/M13_ARESETN] [get_bd_pins ps7_0_axi_periph/M14_ARESETN] [get_bd_pins ps7_0_axi_periph/M15_ARESETN] [get_bd_pins ps7_0_axi_periph/M16_ARESETN] [get_bd_pins ps7_0_axi_periph/M17_ARESETN] [get_bd_pins ps7_0_axi_periph/M18_ARESETN] [get_bd_pins ps7_0_axi_periph/M19_ARESETN] [get_bd_pins ps7_0_axi_periph/M20_ARESETN] [get_bd_pins ps7_0_axi_periph/M21_ARESETN] [get_bd_pins ps7_0_axi_periph/M22_ARESETN] [get_bd_pins ps7_0_axi_periph/M23_ARESETN] [get_bd_pins ps7_0_axi_periph/M24_ARESETN] [get_bd_pins ps7_0_axi_periph/M25_ARESETN] [get_bd_pins ps7_0_axi_periph/M26_ARESETN] [get_bd_pins ps7_0_axi_periph/M27_ARESETN] [get_bd_pins ps7_0_axi_periph/M28_ARESETN] [get_bd_pins ps7_0_axi_periph/M29_ARESETN] [get_bd_pins ps7_0_axi_periph/M30_ARESETN] [get_bd_pins ps7_0_axi_periph/M31_ARESETN] [get_bd_pins ps7_0_axi_periph/M32_ARESETN] [get_bd_pins ps7_0_axi_periph/M33_ARESETN] [get_bd_pins ps7_0_axi_periph/S00_ARESETN] [get_bd_pins rst_ps7_0_100M/peripheral_aresetn]
+  connect_bd_net -net rst_ps7_0_100M_peripheral_aresetn [get_bd_pins CNNIOT/axi_resetn] [get_bd_pins axi_smc/aresetn] [get_bd_pins ps7_0_axi_periph/M00_ARESETN] [get_bd_pins ps7_0_axi_periph/M01_ARESETN] [get_bd_pins ps7_0_axi_periph/M02_ARESETN] [get_bd_pins ps7_0_axi_periph/M03_ARESETN] [get_bd_pins ps7_0_axi_periph/M04_ARESETN] [get_bd_pins ps7_0_axi_periph/M05_ARESETN] [get_bd_pins ps7_0_axi_periph/M06_ARESETN] [get_bd_pins ps7_0_axi_periph/M07_ARESETN] [get_bd_pins ps7_0_axi_periph/M08_ARESETN] [get_bd_pins ps7_0_axi_periph/M09_ARESETN] [get_bd_pins ps7_0_axi_periph/M10_ARESETN] [get_bd_pins ps7_0_axi_periph/M11_ARESETN] [get_bd_pins ps7_0_axi_periph/M12_ARESETN] [get_bd_pins ps7_0_axi_periph/M13_ARESETN] [get_bd_pins ps7_0_axi_periph/M14_ARESETN] [get_bd_pins ps7_0_axi_periph/M15_ARESETN] [get_bd_pins ps7_0_axi_periph/M16_ARESETN] [get_bd_pins ps7_0_axi_periph/M17_ARESETN] [get_bd_pins ps7_0_axi_periph/M18_ARESETN] [get_bd_pins ps7_0_axi_periph/M19_ARESETN] [get_bd_pins ps7_0_axi_periph/M20_ARESETN] [get_bd_pins ps7_0_axi_periph/M21_ARESETN] [get_bd_pins ps7_0_axi_periph/M22_ARESETN] [get_bd_pins ps7_0_axi_periph/M23_ARESETN] [get_bd_pins ps7_0_axi_periph/M24_ARESETN] [get_bd_pins ps7_0_axi_periph/M25_ARESETN] [get_bd_pins ps7_0_axi_periph/M26_ARESETN] [get_bd_pins ps7_0_axi_periph/M27_ARESETN] [get_bd_pins ps7_0_axi_periph/M28_ARESETN] [get_bd_pins ps7_0_axi_periph/M29_ARESETN] [get_bd_pins ps7_0_axi_periph/M30_ARESETN] [get_bd_pins ps7_0_axi_periph/M31_ARESETN] [get_bd_pins ps7_0_axi_periph/M32_ARESETN] [get_bd_pins ps7_0_axi_periph/M33_ARESETN] [get_bd_pins ps7_0_axi_periph/S00_ARESETN] [get_bd_pins rst_ps7_0_100M/peripheral_aresetn]
 
   # Create address segments
-  create_bd_addr_seg -range 0x00010000 -offset 0x40400000 [get_bd_addr_spaces processing_system7_0/Data] [get_bd_addr_segs const_multiply/multiply_dma/S_AXI_LITE/Reg] SEG_multiply_dma_Reg
-  create_bd_addr_seg -range 0x20000000 -offset 0x00000000 [get_bd_addr_spaces const_multiply/multiply_dma/Data_MM2S] [get_bd_addr_segs processing_system7_0/S_AXI_HP0/HP0_DDR_LOWOCM] SEG_processing_system7_0_HP0_DDR_LOWOCM
-  create_bd_addr_seg -range 0x20000000 -offset 0x00000000 [get_bd_addr_spaces const_multiply/multiply_dma/Data_S2MM] [get_bd_addr_segs processing_system7_0/S_AXI_HP0/HP0_DDR_LOWOCM] SEG_processing_system7_0_HP0_DDR_LOWOCM
+  create_bd_addr_seg -range 0x00010000 -offset 0x40400000 [get_bd_addr_spaces processing_system7_0/Data] [get_bd_addr_segs CNNIOT/CNN_dma/S_AXI_LITE/Reg] SEG_multiply_dma_Reg
+  create_bd_addr_seg -range 0x20000000 -offset 0x00000000 [get_bd_addr_spaces CNNIOT/CNN_dma/Data_MM2S] [get_bd_addr_segs processing_system7_0/S_AXI_HP0/HP0_DDR_LOWOCM] SEG_processing_system7_0_HP0_DDR_LOWOCM
+  create_bd_addr_seg -range 0x20000000 -offset 0x00000000 [get_bd_addr_spaces CNNIOT/CNN_dma/Data_S2MM] [get_bd_addr_segs processing_system7_0/S_AXI_HP0/HP0_DDR_LOWOCM] SEG_processing_system7_0_HP0_DDR_LOWOCM
 
 
   # Restore current instance