Skip to content

Latest commit

 

History

History
8 lines (5 loc) · 387 Bytes

File metadata and controls

8 lines (5 loc) · 387 Bytes

Freelance_SDR_FPGA_2019

Open Source HDLC(High Level Data Link Layer Control) and fault tolerant frame syncronization IPs using VHDL. Frame syncronization IP can also detect spectrum inversion.

Testbenches could have been much readable. But I didn't know about it at that time.

Written by Ahmet Kaan Büyükkaya

https://www.linkedin.com/in/ahmet-kaan-b%C3%BCy%C3%BCkkaya-516684145/