fixed bug in set WP reg

micropython-Chinese-Community · Mar 24, 2018 · 599eab1 · 599eab1
1 parent 38c9e29
commit 599eab1
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/misc/DS1302/DS1302.py b/misc/DS1302/DS1302.py
@@ -65,7 +65,7 @@ def setReg(self, reg, dat):
     def wr(self, reg, dat):
         self.setReg(DS1302_REG_WP, 0)
         self.setReg(reg, dat)
-        self.setReg(DS1302_REG_WP, 0)
+        self.setReg(DS1302_REG_WP, 0x80)
 
     def start(self):
         t = self.getReg(DS1302_REG_SECOND + 1)