gpu/mali: add dt bindings

Currently, setting CLK_G3D fails. This patch fixes its granparent, CLK_FOUT_VPLL, to 480MHz, the frequency that fits the default regulator voltage set on boot (1V). Signed-off-by: memeka <mihailescu2m@gmail.com>
mihailescu2m · Nov 8, 2016 · b635210 · b635210
1 parent 44ad8f1
commit b635210
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diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
@@ -1289,6 +1289,37 @@
 		};
 	};
 
+        mali: mali@11800000 {
+                compatible = "arm,malit628", "arm,malit62x", "arm,malit6xx", "arm,mali-midgard";
+                reg = <0x11800000 0x5000>;
+                interrupts = <0 219 0>, <0 74 0>, <0 117 0>;
+                interrupt-names = "JOB", "MMU", "GPU";
+
+                clocks = <&clock CLK_G3D>;
+                clock-names = "clk_mali";
+
+                assigned-clocks = <&clock CLK_FOUT_VPLL>;
+                assigned-clock-rates = <480000000>;
+
+                operating-points = <
+                        /* KHz   uV */
+/*
+                        600000 1150000
+                        543000 1037500
+*/
+                        480000 1000000
+/*
+                        420000  962500
+                        350000  912500
+                        266000  862500
+                        177000  812500
+*/
+                >;
+
+                status = "disabled";
+        };
+
+
 	thermal-zones {
 		cpu0_thermal: cpu0-thermal {
 			thermal-sensors = <&tmu_cpu0>;

diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
@@ -642,3 +642,9 @@
 	vdd33-supply = <&ldo9_reg>;
 	vdd10-supply = <&ldo11_reg>;
 };
+
+&mali {
+        mali-supply = <&buck4_reg>;
+        status = "okay";
+};
+