Merge pull request f4pga#1643 from antmicro/allow-xdc-place-constrain…

…t-files

toolchain: remove necessity of PCF file

xc/xc7/toolchain_wrappers/symbiflow_generate_constraints

@@ -4,12 +4,16 @@ set -e
 MYPATH=`realpath $0`
 MYPATH=`dirname ${MYPATH}`
 
-PCF=$1
-EBLIF=$2
-NET=$3
-PART=$4
-DEVICE=$5
-ARCH_DEF=$6
+EBLIF=$1
+NET=$2
+PART=$3
+DEVICE=$4
+ARCH_DEF=$5
+PCF=$6
+
+if [ ! -z $PCF ]; then
+    PCF_OPTS="--pcf $PCF"
+fi
 
 VPR_GRID_MAP=`realpath ${MYPATH}/../share/symbiflow/arch/${DEVICE}/vpr_grid_map.csv`
 PINMAP=`realpath ${MYPATH}/../share/symbiflow/arch/${DEVICE}/${PART}/pinmap.csv`
@@ -18,6 +22,6 @@ CONSTR_GEN=`realpath ${MYPATH}/python/prjxray_create_place_constraints.py`
 PROJECT=$(basename -- "$EBLIF")
 IOPLACE_FILE="${PROJECT%.*}.ioplace"
 
-python3 ${IOGEN} --pcf $PCF --blif $EBLIF --map $PINMAP --net $NET > ${IOPLACE_FILE}
+python3 ${IOGEN} --blif $EBLIF --map $PINMAP --net $NET $PCF_OPTS > ${IOPLACE_FILE}
 python3 ${CONSTR_GEN} --net $NET --arch ${ARCH_DEF} --blif $EBLIF --vpr_grid_map ${VPR_GRID_MAP} --input ${IOPLACE_FILE} > constraints.place
 

xc/xc7/toolchain_wrappers/symbiflow_place

@@ -10,8 +10,7 @@ source ${MYPATH}/vpr_common
 parse_args $@
 
 if [ -z $PCF ]; then
-     echo "Please provide pcf file name"
-     exit 1
+    PCF=""
 fi
 
 if [ -z $NET ]; then
@@ -22,7 +21,7 @@ fi
 OUT_NOISY_WARNINGS=noisy_warnings-${DEVICE}_place.log
 
 echo "Generating coinstrains ..."
-symbiflow_generate_constraints $PCF $EBLIF $NET $PART $DEVICE $ARCH_DEF
+symbiflow_generate_constraints $EBLIF $NET $PART $DEVICE $ARCH_DEF $PCF
 
 run_vpr --fix_pins constraints.place --place