Merge pull request f4pga#1816 from litghost/test_upstream_yosys

Use upstream packages directly

.github/kokoro/common.sh

@@ -27,6 +27,7 @@ exec 2>&1
 cd github/$KOKORO_DIR/
 
 # Run the common setup steps
+source ./.github/kokoro/steps/movehome.sh
 source ./.github/kokoro/steps/hostsetup.sh
 source ./.github/kokoro/steps/hostinfo.sh
 source ./.github/kokoro/steps/git.sh

.github/kokoro/steps/movehome.sh

@@ -0,0 +1,14 @@
+#!/bin/bash
+
+echo
+echo "========================================"
+echo "Moving home directory."
+echo "----------------------------------------"
+echo
+echo "Old home directory: ${HOME}"
+echo
+mkdir home
+cp -r $HOME/. home/
+export HOME=$(pwd)/home
+echo "New home directory: ${HOME}"
+echo "                    $(echo ~/)"

environment.yml

@@ -1,20 +1,19 @@
 name: symbiflow_arch_def_base
 channels:
   - defaults
-  - symbiflow
   - litex-hub
 dependencies:
-  - symbiflow::symbiflow-yosys=0.8_6021_gd8b2d1a2=20200708_083630
-  - symbiflow::symbiflow-yosys-plugins=1.0.0.7_0234_g40efa51=20201105_181012
-  - symbiflow::symbiflow-vtr=8.0.0.rc2_5415_gd6d69ff92=20201120_180018
-  - symbiflow::prjxray-tools=0.1_2697_g0f939808=20201120_091524
-  - symbiflow::prjxray-db=0.0_0236_g2ddf99b=20201105_181012
-  - symbiflow::zachjs-sv2v=0.0.5_0018_ga170536
-  - symbiflow::openocd
-  - symbiflow::iverilog
-  - symbiflow::icestorm
-  - symbiflow::capnproto-java
-  - litex-hub::gcc-riscv64-elf-newlib
+  - litex-hub::capnproto-java=0.1.5_0012_g44a8c1e=20201104_165332
+  - litex-hub::gcc-riscv64-elf-newlib=9.2.0=20201119_154229
+  - litex-hub::icestorm=0.0_0719_g792cef0=20201120_145821
+  - litex-hub::iverilog=s20150603_0957_gad862020=20201120_145821
+  - litex-hub::openocd=0.10.0_1514_ga8edbd020=20201119_154304
+  - litex-hub::symbiflow-yosys-plugins=1.0.0_7_g59ff1e6_23_g3a95697_17_g00b887b_0194_g40efa51=20201120_145821
+  - litex-hub::prjxray-tools=0.1_2697_g0f939808=20201120_145821
+  - litex-hub::prjxray-db=0.0_0239_gd87c844=20201120_145821
+  - litex-hub::vtr=v8.0.0_3011_gb0223dc59=20201202_112618
+  - litex-hub::yosys=0.9_5007_g2116c585=20201202_112618
+  - litex-hub::zachjs-sv2v=0.0.5_0025_ge9f9696=20201120_205532
   - cmake
   - make
   - flake8

testarch/CMakeLists.txt

@@ -6,6 +6,7 @@ define_arch(
   ARCH testarch
   YOSYS_SYNTH_SCRIPT ${symbiflow-arch-defs_SOURCE_DIR}/testarch/yosys/synth.tcl
   YOSYS_CONV_SCRIPT ${symbiflow-arch-defs_SOURCE_DIR}/testarch/yosys/conv.tcl
+  YOSYS_TECHMAP ${symbiflow-arch-defs_SOURCE_DIR}/testarch/techmap
   DEVICE_FULL_TEMPLATE \${DEVICE}
   VPR_ARCH_ARGS " \
     --router_init_wirelength_abort_threshold 20 \

testarch/primitives/ff/ff.sim.v

@@ -1,4 +1,3 @@
-(* whitebox *) (* CLASS="flipflop" *)
 module FF(clk, D, Q);
 
 	(* PORT_CLASS = "clock" *)

testarch/techmap/ff_map.v

@@ -0,0 +1,2 @@
+module  \$_DFF_N_ (input D, C, output Q); FF _TECHMAP_REPLACE_ (.D(D), .Q(Q), .clk(C)); endmodule
+module  \$_DFF_P_ (input D, C, output Q); FF _TECHMAP_REPLACE_ (.D(D), .Q(Q), .clk(C)); endmodule

testarch/yosys/synth.tcl

@@ -1,8 +1,13 @@
 yosys -import
 
+read_verilog -lib $::env(TECHMAP_PATH)/../primitives/ff/ff.sim.v
+
 synth -top top -flatten
 abc -lut 4
 opt_clean
 
+dfflegalize -cell \$_DFF_?_ 0
+techmap -map  $::env(TECHMAP_PATH)/ff_map.v
+
 write_json $::env(OUT_JSON)
 write_verilog $::env(OUT_SYNTH_V)