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Merge pull request f4pga#1515 from tcal-x/staging100T
Initial support for Artix 100t parts
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@@ -1,3 +1,4 @@ | ||
add_subdirectory(artix7) | ||
add_subdirectory(artix7_100t) | ||
add_subdirectory(artix7_200t) | ||
add_subdirectory(zynq7) |
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project_ray_prepare_database( | ||
PRJRAY_ARCH artix7 | ||
PRJRAY_DIR ${PRJXRAY_DIR} | ||
PRJRAY_DB_DIR ${PRJXRAY_DB_DIR} | ||
PROTOTYPE_PART xc7a100tfgg676-1 | ||
PARTS xc7a100tfgg676-1 xc7a100tcsg324-1 | ||
) | ||
|
||
add_xc_arch_define( | ||
ARCH artix7_100t | ||
FAMILY xc7 | ||
PRJRAY_DIR ${PRJXRAY_DIR} | ||
PRJRAY_DB_DIR ${PRJXRAY_DB_DIR} | ||
PRJRAY_NAME prjxray | ||
PRJRAY_ARCH artix7 | ||
PROTOTYPE_PART xc7a100tfgg676-1 | ||
YOSYS_SYNTH_SCRIPT ${symbiflow-arch-defs_SOURCE_DIR}/xc/xc7/yosys/synth.tcl | ||
YOSYS_CONV_SCRIPT ${symbiflow-arch-defs_SOURCE_DIR}/xc/xc7/yosys/conv.tcl | ||
) | ||
|
||
add_subdirectory(tiles) | ||
add_subdirectory(devices) |
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add_xc_device_define( | ||
ARCH artix7_100t | ||
PART xc7a100tfgg676-1 | ||
DEVICES xc7a100t | ||
) |
31 changes: 31 additions & 0 deletions
31
xc/xc7/archs/artix7_100t/devices/xc7a100t-virt/CMakeLists.txt
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add_xc_device_define_type( | ||
ARCH artix7_100t | ||
DEVICE xc7a100t | ||
TILE_TYPES | ||
CLBLL_L | ||
CLBLL_R | ||
CLBLM_L | ||
CLBLM_R | ||
BRAM_L | ||
LIOPAD_M | ||
LIOPAD_S | ||
LIOPAD_SING | ||
RIOPAD_M | ||
RIOPAD_S | ||
RIOPAD_SING | ||
CLK_BUFG_BOT_R | ||
CLK_BUFG_TOP_R | ||
CMT_TOP_L_UPPER_T | ||
CMT_TOP_R_UPPER_T | ||
HCLK_IOI3 | ||
PB_TYPES | ||
SLICEL | ||
SLICEM | ||
BRAM_L | ||
IOPAD | ||
IOPAD_M | ||
IOPAD_S | ||
BUFGCTRL | ||
PLLE2_ADV | ||
HCLK_IOI3 | ||
) |
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@@ -0,0 +1,33 @@ | ||
add_subdirectory(bram_l) | ||
add_subdirectory(bram_r) | ||
add_subdirectory(clbll_l) | ||
add_subdirectory(clbll_r) | ||
add_subdirectory(clblm_l) | ||
add_subdirectory(clblm_r) | ||
add_subdirectory(slicel) | ||
add_subdirectory(slicem) | ||
add_subdirectory(clk_bufg_top_r) | ||
add_subdirectory(clk_bufg_bot_r) | ||
add_subdirectory(bufgctrl) | ||
add_subdirectory(hclk_ioi3) | ||
|
||
set(IOPAD_SITES IOB33 IDELAYE2 ILOGICE3 OLOGICE3) | ||
set(IOPAD_S_SITES IOB33S IDELAYE2 ILOGICE3 OLOGICE3) | ||
set(IOPAD_M_SITES IOB33M IDELAYE2 ILOGICE3 OLOGICE3) | ||
|
||
project_ray_equiv_tile( | ||
ARCH artix7_100t | ||
TILES RIOPAD_M RIOPAD_S RIOPAD_SING LIOPAD_M LIOPAD_S LIOPAD_SING | ||
PB_TYPES IOPAD IOPAD_S IOPAD_M | ||
PB_TYPE_SITES IOPAD_SITES IOPAD_S_SITES IOPAD_M_SITES | ||
SITE_EQUIV IOB33M=IOB33 IOB33S=IOB33 | ||
) | ||
|
||
set(PLLE2_ADV_SITES PLLE2_ADV) | ||
|
||
project_ray_equiv_tile( | ||
ARCH artix7_100t | ||
TILES CMT_TOP_L_UPPER_T CMT_TOP_R_UPPER_T | ||
PB_TYPES PLLE2_ADV | ||
PB_TYPE_SITES PLLE2_ADV_SITES | ||
) |
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@@ -0,0 +1,7 @@ | ||
project_ray_tile( | ||
ARCH artix7_100t | ||
TILE BRAM_L | ||
SITE_TYPES BRAM_L/BRAM_L | ||
FUSED_SITES | ||
EQUIVALENT_SITES BRAM_L | ||
) |
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project_ray_tile( | ||
ARCH artix7_100t | ||
TILE BRAM_R | ||
SITE_TYPES BRAM_R/BRAM_R | ||
FUSED_SITES | ||
EQUIVALENT_SITES BRAM_R | ||
) |
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set(DEPS "") | ||
append_file_dependency(DEPS ${symbiflow-arch-defs_SOURCE_DIR}/xc/common/primitives/bufgctrl/bufgctrl.pb_type.xml) | ||
get_file_location(BUFGCTRL_PB_TYPE ${symbiflow-arch-defs_SOURCE_DIR}/xc/common/primitives/bufgctrl/bufgctrl.pb_type.xml) | ||
|
||
add_custom_command( | ||
OUTPUT bufgctrl.pb_type.xml | ||
COMMAND ${CMAKE_COMMAND} -E copy ${BUFGCTRL_PB_TYPE} ${CMAKE_CURRENT_BINARY_DIR} | ||
DEPENDS ${DEPS} | ||
) | ||
add_file_target(FILE bufgctrl.pb_type.xml GENERATED) | ||
|
||
set(DEPS "") | ||
append_file_dependency(DEPS ${symbiflow-arch-defs_SOURCE_DIR}/xc/common/primitives/bufgctrl/bufgctrl.model.xml) | ||
get_file_location(BUFGCTRL_MODEL ${symbiflow-arch-defs_SOURCE_DIR}/xc/common/primitives/bufgctrl/bufgctrl.model.xml) | ||
|
||
add_custom_command( | ||
OUTPUT bufgctrl.model.xml | ||
COMMAND ${CMAKE_COMMAND} -E copy ${BUFGCTRL_MODEL} ${CMAKE_CURRENT_BINARY_DIR} | ||
DEPENDS ${DEPS} | ||
) | ||
add_file_target(FILE bufgctrl.model.xml GENERATED) |
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,5 @@ | ||
project_ray_tile_capacity( | ||
ARCH artix7_100t | ||
TILE CLBLL_L | ||
SITE_TYPES SLICEL | ||
) |
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@@ -0,0 +1,6 @@ | ||
project_ray_tile_capacity( | ||
ARCH artix7_100t | ||
TILE CLBLL_R | ||
SITE_TYPES SLICEL | ||
) | ||
|
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,5 @@ | ||
project_ray_tile_capacity( | ||
ARCH artix7_100t | ||
TILE CLBLM_L | ||
SITE_TYPES SLICEM/SLICEL SLICEL | ||
) |
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,5 @@ | ||
project_ray_tile_capacity( | ||
ARCH artix7_100t | ||
TILE CLBLM_R | ||
SITE_TYPES SLICEM/SLICEL SLICEL | ||
) |
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@@ -0,0 +1,5 @@ | ||
project_ray_tile_capacity( | ||
ARCH artix7_100t | ||
TILE CLK_BUFG_BOT_R | ||
SITE_TYPES BUFGCTRL | ||
) |
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,5 @@ | ||
project_ray_tile_capacity( | ||
ARCH artix7_100t | ||
TILE CLK_BUFG_TOP_R | ||
SITE_TYPES BUFGCTRL | ||
) |
7 changes: 7 additions & 0 deletions
7
xc/xc7/archs/artix7_100t/tiles/cmt_top_l_upper_t/CMakeLists.txt
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@@ -0,0 +1,7 @@ | ||
project_ray_tile( | ||
ARCH artix7_100t | ||
TILE CMT_TOP_L_UPPER_T | ||
SITE_TYPES PLLE2_ADV/PLLE2_ADV | ||
EQUIVALENT_SITES CMT_TOP_L_UPPER_T | ||
NO_FASM_PREFIX | ||
) |
7 changes: 7 additions & 0 deletions
7
xc/xc7/archs/artix7_100t/tiles/cmt_top_r_upper_t/CMakeLists.txt
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,7 @@ | ||
project_ray_tile( | ||
ARCH artix7_100t | ||
TILE CMT_TOP_R_UPPER_T | ||
SITE_TYPES PLLE2_ADV/PLLE2_ADV | ||
EQUIVALENT_SITES CMT_TOP_R_UPPER_T | ||
NO_FASM_PREFIX | ||
) |
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,7 @@ | ||
project_ray_tile( | ||
ARCH artix7_100t | ||
TILE HCLK_IOI3 | ||
SITE_TYPES IDELAYCTRL/IDELAYCTRL | ||
EQUIVALENT_SITES HCLK_IOI3 | ||
SITE_COORDS Y | ||
) |
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,5 @@ | ||
project_ray_tile( | ||
ARCH artix7_100t | ||
TILE LIOB33_SING | ||
SITE_TYPES IOB33 | ||
) |
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@@ -0,0 +1,7 @@ | ||
project_ray_tile( | ||
ARCH artix7_100t | ||
TILE RIOPAD_M | ||
SITE_TYPES IOB33M/IOB33M ILOGICE3/ILOGICE3 OLOGICE3/OLOGICE3 IDELAYE2/IDELAYE2 | ||
USE_DATABASE | ||
EQUIVALENT_SITES RIOPAD_M | ||
) |
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,7 @@ | ||
project_ray_tile( | ||
ARCH artix7_100t | ||
TILE SLICEL | ||
SITE_AS_TILE | ||
SITE_TYPES SLICEL/SLICEL0 | ||
EQUIVALENT_SITES SLICEL | ||
) |
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,7 @@ | ||
project_ray_tile( | ||
ARCH artix7_100t | ||
TILE SLICEM | ||
SITE_AS_TILE | ||
SITE_TYPES SLICEM/SLICEM | ||
EQUIVALENT_SITES SLICEM SLICEL | ||
) |
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Original file line number | Diff line number | Diff line change |
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module top ( | ||
input wire clk, | ||
|
||
input wire [7:0] sw, | ||
output wire [7:0] led | ||
); | ||
|
||
localparam BITS = 8; | ||
localparam LOG2DELAY = 28; | ||
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reg [BITS+LOG2DELAY-1:0] counter = 0; | ||
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IBUF clk_ibuf(.I(clk), .O(clk_ibuf)); | ||
BUFG clk_bufg(.I(clk_ibuf), .O(clk_b)); | ||
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always @(posedge clk_b) begin | ||
counter <= counter + 1; | ||
end | ||
|
||
assign led = counter >> LOG2DELAY; | ||
endmodule |
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