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Merge pull request f4pga#1787 from antmicro/install-200t-with-other-d…
…evices Install 200t with other devices
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Original file line number | Diff line number | Diff line change |
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@@ -1,23 +1,18 @@ | ||
set(INSTALLATION_DIR_BIN "${CMAKE_INSTALL_PREFIX}/bin") | ||
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if(${INSTALL_DEVICE} STREQUAL "xc7a200t") | ||
add_test(NAME binary_toolchain_test | ||
COMMAND ${CMAKE_COMMAND} -E env | ||
PATH=${INSTALLATION_DIR_BIN}:$ENV{PATH} | ||
${CMAKE_COMMAND} -E env | ||
PYTHONPATH=${PRJXRAY_DIR}:${PRJXRAY_DIR}/third_party/fasm | ||
DATABASE_DIR=${PRJXRAY_DB_DIR} | ||
FRAMES2BIT=$<TARGET_FILE:xc7frames2bit> | ||
make PARTNAME=xc7a200tsbg484-1 DEVICE=xc7a200t_test BOARD=nexys_video | ||
WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}) | ||
else() | ||
add_test(NAME binary_toolchain_test | ||
COMMAND ${CMAKE_COMMAND} -E env | ||
PATH=${INSTALLATION_DIR_BIN}:$ENV{PATH} | ||
${CMAKE_COMMAND} -E env | ||
PYTHONPATH=${PRJXRAY_DIR}:${PRJXRAY_DIR}/third_party/fasm | ||
DATABASE_DIR=${PRJXRAY_DB_DIR} | ||
FRAMES2BIT=$<TARGET_FILE:xc7frames2bit> | ||
make | ||
WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}) | ||
endif() | ||
function(add_binary_test test_name part_name device board) | ||
add_test(NAME ${test_name} | ||
COMMAND ${CMAKE_COMMAND} -E env | ||
PATH=${INSTALLATION_DIR_BIN}:$ENV{PATH} | ||
${CMAKE_COMMAND} -E env | ||
PYTHONPATH=${PRJXRAY_DIR}:${PRJXRAY_DIR}/third_party/fasm | ||
DATABASE_DIR=${PRJXRAY_DB_DIR} | ||
FRAMES2BIT=$<TARGET_FILE:xc7frames2bit> | ||
make PARTNAME=${part_name} DEVICE=${device} BOARD=${board} | ||
WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}) | ||
endfunction() | ||
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add_binary_test(binary_toolchain_test_50t xc7a35tcpg236-1 xc7a50t_test basys3) | ||
add_binary_test(binary_toolchain_test_100t xc7a100tcsg324-1 xc7a100t_test arty-100t) | ||
add_binary_test(binary_toolchain_test_200t xc7a200tsbg484-1 xc7a200t_test nexys_video) |
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# Pin IOSTANDARDs | ||
set_property IOSTANDARD LVCMOS33 [get_ports clk] | ||
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set_property IOSTANDARD LVCMOS25 [get_ports {led[0]}] | ||
set_property IOSTANDARD LVCMOS25 [get_ports {led[1]}] | ||
set_property IOSTANDARD LVCMOS25 [get_ports {led[2]}] | ||
set_property IOSTANDARD LVCMOS25 [get_ports {led[3]}] | ||
set_property IOSTANDARD LVCMOS25 [get_ports {led[4]}] | ||
set_property IOSTANDARD LVCMOS25 [get_ports {led[5]}] | ||
set_property IOSTANDARD LVCMOS25 [get_ports {led[6]}] | ||
set_property IOSTANDARD LVCMOS25 [get_ports {led[7]}] | ||
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set_property IOSTANDARD LVCMOS12 [get_ports {sw[0]}] | ||
set_property IOSTANDARD LVCMOS12 [get_ports {sw[1]}] | ||
set_property IOSTANDARD LVCMOS12 [get_ports {sw[2]}] | ||
set_property IOSTANDARD LVCMOS12 [get_ports {sw[3]}] | ||
set_property IOSTANDARD LVCMOS12 [get_ports {sw[4]}] | ||
set_property IOSTANDARD LVCMOS12 [get_ports {sw[5]}] | ||
set_property IOSTANDARD LVCMOS12 [get_ports {sw[6]}] | ||
set_property IOSTANDARD LVCMOS12 [get_ports {sw[7]}] | ||
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set_property IOSTANDARD LVCMOS12 [get_ports {tx}] | ||
set_property IOSTANDARD LVCMOS12 [get_ports {rx}] | ||
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# Pin Locations | ||
set_property PACKAGE_PIN E3 [get_ports {clk}] | ||
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set_property PACKAGE_PIN F6 [get_ports {led[0]}] | ||
set_property PACKAGE_PIN J4 [get_ports {led[1]}] | ||
set_property PACKAGE_PIN J2 [get_ports {led[2]}] | ||
set_property PACKAGE_PIN H6 [get_ports {led[3]}] | ||
set_property PACKAGE_PIN H5 [get_ports {led[4]}] | ||
set_property PACKAGE_PIN J5 [get_ports {led[5]}] | ||
set_property PACKAGE_PIN T9 [get_ports {led[6]}] | ||
set_property PACKAGE_PIN T10 [get_ports {led[7]}] | ||
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set_property PACKAGE_PIN A8 [get_ports {sw[0]}] | ||
set_property PACKAGE_PIN C11 [get_ports {sw[1]}] | ||
set_property PACKAGE_PIN C10 [get_ports {sw[2]}] | ||
set_property PACKAGE_PIN A10 [get_ports {sw[3]}] | ||
set_property PACKAGE_PIN D9 [get_ports {sw[4]}] | ||
set_property PACKAGE_PIN C9 [get_ports {sw[5]}] | ||
set_property PACKAGE_PIN B9 [get_ports {sw[6]}] | ||
set_property PACKAGE_PIN B8 [get_ports {sw[7]}] | ||
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set_property PACKAGE_PIN D10 [get_ports {tx}] | ||
set_property PACKAGE_PIN A9 [get_ports {rx}] | ||
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create_clock -period 10.0 clk |
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,49 @@ | ||
# Pin IOSTANDARDs | ||
set_property IOSTANDARD LVCMOS33 [get_ports clk] | ||
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set_property IOSTANDARD LVCMOS25 [get_ports {led[0]}] | ||
set_property IOSTANDARD LVCMOS25 [get_ports {led[1]}] | ||
set_property IOSTANDARD LVCMOS25 [get_ports {led[2]}] | ||
set_property IOSTANDARD LVCMOS25 [get_ports {led[3]}] | ||
set_property IOSTANDARD LVCMOS25 [get_ports {led[4]}] | ||
set_property IOSTANDARD LVCMOS25 [get_ports {led[5]}] | ||
set_property IOSTANDARD LVCMOS25 [get_ports {led[6]}] | ||
set_property IOSTANDARD LVCMOS25 [get_ports {led[7]}] | ||
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set_property IOSTANDARD LVCMOS12 [get_ports {sw[0]}] | ||
set_property IOSTANDARD LVCMOS12 [get_ports {sw[1]}] | ||
set_property IOSTANDARD LVCMOS12 [get_ports {sw[2]}] | ||
set_property IOSTANDARD LVCMOS12 [get_ports {sw[3]}] | ||
set_property IOSTANDARD LVCMOS12 [get_ports {sw[4]}] | ||
set_property IOSTANDARD LVCMOS12 [get_ports {sw[5]}] | ||
set_property IOSTANDARD LVCMOS12 [get_ports {sw[6]}] | ||
set_property IOSTANDARD LVCMOS12 [get_ports {sw[7]}] | ||
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set_property IOSTANDARD LVCMOS12 [get_ports {tx}] | ||
set_property IOSTANDARD LVCMOS12 [get_ports {rx}] | ||
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# Pin Locations | ||
set_property PACKAGE_PIN W5 [get_ports {clk}] | ||
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set_property PACKAGE_PIN U16 [get_ports {led[0]}] | ||
set_property PACKAGE_PIN E19 [get_ports {led[1]}] | ||
set_property PACKAGE_PIN U19 [get_ports {led[2]}] | ||
set_property PACKAGE_PIN V19 [get_ports {led[3]}] | ||
set_property PACKAGE_PIN W18 [get_ports {led[4]}] | ||
set_property PACKAGE_PIN U15 [get_ports {led[5]}] | ||
set_property PACKAGE_PIN U14 [get_ports {led[6]}] | ||
set_property PACKAGE_PIN V14 [get_ports {led[7]}] | ||
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set_property PACKAGE_PIN V17 [get_ports {sw[0]}] | ||
set_property PACKAGE_PIN V16 [get_ports {sw[1]}] | ||
set_property PACKAGE_PIN W16 [get_ports {sw[2]}] | ||
set_property PACKAGE_PIN W17 [get_ports {sw[3]}] | ||
set_property PACKAGE_PIN W15 [get_ports {sw[4]}] | ||
set_property PACKAGE_PIN V15 [get_ports {sw[5]}] | ||
set_property PACKAGE_PIN W14 [get_ports {sw[6]}] | ||
set_property PACKAGE_PIN W13 [get_ports {sw[7]}] | ||
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set_property PACKAGE_PIN A18 [get_ports {tx}] | ||
set_property PACKAGE_PIN B18 [get_ports {rx}] | ||
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create_clock -period 10.0 clk |
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