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MIPS backend fixes, #3 #86

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MIPS backend fixes, #3 #86

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d51c3c2
MIPS: Adjust offset by alloc2_size to support split frame initialization
ztzg Mar 20, 2011
0cf62d7
MIPS: Do not lower {LOAD,STORE}*_MEMBASE ops which can handle non-imm…
ztzg Mar 20, 2011
3678c1b
MIPS: Make sure callee-saved registers end up on word boundaries
ztzg Apr 14, 2011
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37 changes: 15 additions & 22 deletions mono/mini/mini-mips.c
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Expand Up @@ -1328,6 +1328,8 @@ mono_arch_allocate_vars (MonoCompile *cfg)
* args or return vals. Extra stack space avoids this in a lot of cases.
*/
offset += EXTRA_STACK_SPACE;
offset += SIZEOF_REGISTER - 1;
offset &= ~(SIZEOF_REGISTER - 1);

/* Space for saved registers */
cfg->arch.iregs_offset = offset;
Expand Down Expand Up @@ -2625,21 +2627,8 @@ mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb)
ins->opcode = OP_LOCALLOC;
break;

case OP_LOAD_MEMBASE:
case OP_LOADI4_MEMBASE:
case OP_LOADU4_MEMBASE:
case OP_LOADI2_MEMBASE:
case OP_LOADU2_MEMBASE:
case OP_LOADI1_MEMBASE:
case OP_LOADU1_MEMBASE:
case OP_LOADR4_MEMBASE:
case OP_LOADR8_MEMBASE:
case OP_STORE_MEMBASE_REG:
case OP_STOREI4_MEMBASE_REG:
case OP_STOREI2_MEMBASE_REG:
case OP_STOREI1_MEMBASE_REG:
case OP_STORER4_MEMBASE_REG:
case OP_STORER8_MEMBASE_REG:
/* we can do two things: load the immed in a register
* and use an indexed load, or see if the immed can be
* represented as an ad_imm + a load with a smaller offset
Expand Down Expand Up @@ -4760,7 +4749,7 @@ mono_arch_emit_prolog (MonoCompile *cfg)
/* save used registers in own stack frame (at pos) */
for (i = MONO_MAX_IREGS-1; i >= 0; --i) {
if (iregs_to_save & (1 << i)) {
g_assert (pos < cfg->stack_usage - sizeof(gpointer));
g_assert (pos < (int)(cfg->stack_usage - sizeof(gpointer)));
g_assert (mips_is_imm16(pos));
MIPS_SW (code, i, mips_sp, pos);
pos += SIZEOF_REGISTER;
Expand Down Expand Up @@ -4865,28 +4854,32 @@ mono_arch_emit_prolog (MonoCompile *cfg)
} else {
/* Argument ends up on the stack */
if (ainfo->regtype == RegTypeGeneral) {
int basereg_offset;
/* Incoming parameters should be above this frame */
if (cfg->verbose_level > 2)
g_print ("stack slot at %d of %d\n", inst->inst_offset, alloc_size);
g_print ("stack slot at %d of %d+%d\n",
inst->inst_offset, alloc_size, alloc2_size);
/* g_assert (inst->inst_offset >= alloc_size); */
g_assert (mips_is_imm16 (inst->inst_offset));
g_assert (inst->inst_basereg == mips_fp);
basereg_offset = inst->inst_offset - alloc2_size;
g_assert (mips_is_imm16 (basereg_offset));
switch (ainfo->size) {
case 1:
mips_sb (code, ainfo->reg, inst->inst_basereg, inst->inst_offset);
mips_sb (code, ainfo->reg, inst->inst_basereg, basereg_offset);
break;
case 2:
mips_sh (code, ainfo->reg, inst->inst_basereg, inst->inst_offset);
mips_sh (code, ainfo->reg, inst->inst_basereg, basereg_offset);
break;
case 0: /* XXX */
case 4:
mips_sw (code, ainfo->reg, inst->inst_basereg, inst->inst_offset);
mips_sw (code, ainfo->reg, inst->inst_basereg, basereg_offset);
break;
case 8:
#if (SIZEOF_REGISTER == 4)
mips_sw (code, ainfo->reg, inst->inst_basereg, inst->inst_offset);
mips_sw (code, ainfo->reg + 1, inst->inst_basereg, inst->inst_offset + 4);
mips_sw (code, ainfo->reg, inst->inst_basereg, basereg_offset);
mips_sw (code, ainfo->reg + 1, inst->inst_basereg, basereg_offset + 4);
#elif (SIZEOF_REGISTER == 8)
mips_sd (code, ainfo->reg, inst->inst_basereg, inst->inst_offset);
mips_sd (code, ainfo->reg, inst->inst_basereg, basereg_offset);
#endif
break;
default:
Expand Down