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Merge pull request #547 from tgiphil/factoring-1
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WIP - x64 and External Symbols
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@tgiphil
tgiphil committed Jan 1, 2019
2 parents bd9f504 + fda0877 commit cf27f7e
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Showing 318 changed files with 2,623 additions and 2,931 deletions.
68 changes: 53 additions & 15 deletions Source/Data/X64Instructions.json
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Original file line number Diff line number Diff line change
Expand Up @@ -2,12 +2,12 @@
"Encoding": [
"[x64]=[instruction-prefix]|[address-prefix]|[operand-prefix]|[opcode]|[opcode2]|[opcode3]|[opcode4]|[mod]|[reg]|[rm]|[scale]|[index]|[base]|[displacement]|[immediate]",
"[x64-rex]=[instruction-prefix]|[address-prefix]|[operand-prefix]|supress8:0x40|[rex.opcode]|[rex.w]|[rex.r]|[rex.x]|[rex.b]|[opcode]|[opcode2]|[opcode3]|[opcode4]|[mod]|[reg]|[rm]|[scale]|[index]|[base]|[displacement]|[immediate],rex.opcode=0100",
"[x64-rex-32]=[instruction-prefix]|[address-prefix]|[operand-prefix]|supress8:0x40|[rex.opcode]|[rex.w]|[rex.r]|[rex.x]|[rex.b]|[opcode]|[opcode2]|[opcode3]|[opcode4]|[mod]|[reg]|[rm]|[scale]|[index]|[base]|[displacement]|[immediate],rex.opcode=0100,rex.w=0",
"[x64-rex-64]=[instruction-prefix]|[address-prefix]|[operand-prefix]|supress8:0x40|[rex.opcode]|[rex.w]|[rex.r]|[rex.x]|[rex.b]|[opcode]|[opcode2]|[opcode3]|[opcode4]|[mod]|[reg]|[rm]|[scale]|[index]|[base]|[displacement]|[immediate],rex.opcode=0100,rex.w=1",
"[x64-rex-32]=[x64-rex],rex.w=0",
"[x64-rex-64]=[x64-rex],rex.w=1",

"[x64-branch]=[x64],opcode=0x0F,opcode2=[opcode-branch],immediate=rel32:label",
"[x64-setbyteif]=[x64],opcode=0x0F,opcode2=[opcode-setbyteif],mod=11,reg=000,rm=reg3:r",
"[x64-cmov]=[x64],opcode=0x0F,opcode2=[opcode-cmov],mod=11,reg=reg3:r,rm=reg3:o1",
"[x64-branch]=[x64],operand-prefix=0x0F,opcode=[opcode-branch],immediate=rel32:label",
"[x64-setbyteif]=[x64],operand-prefixoperand-prefix=0x0F,opcode=[opcode-setbyteif],mod=11,reg=000,rm=reg3:r",
"[x64-cmov]=[x64],operand-prefix=0x0F,opcode=[opcode-cmov],mod=11,reg=reg3:r,rm=reg3:o1",

"[x64-base-load-ebp+zero]=[x64],mod=01,reg=reg3:[dest],rm=101,immediate=0x00",
"[x64-base-load-ebp+register]=[x64],mod=01,reg=reg3:[dest],rm=100,scale=00,index=reg3:[membase],base=101,immediate=0x00",
Expand Down Expand Up @@ -144,11 +144,11 @@
"OpcodeEncoding": [
{
"Condition": "[#register][register]",
"Encoding": "[x64],opcode=0x03,mod=11,reg=reg3:r,rm=reg3:o2"
"Encoding": "[x64-rex-32],opcode=0x03,mod=11,reg=reg3:r,rm=reg3:o2,rex.r=regx4:r,rex.x=0,rex.b=regx4:o2"
},
{
"Condition": "[#register][constant]",
"Encoding": "[x64],opcode=0x81,mod=11,reg=000,rm=reg3:r,immediate=imm32:o2"
"Encoding": "[x64-rex-32],opcode=0x81,mod=11,reg=000,rm=reg3:r,immediate=imm32:o2,rex.r=regx4:r,rex.x=0,rex.b=0"
}
]
},
Expand All @@ -168,11 +168,11 @@
"OpcodeEncoding": [
{
"Condition": "[#register][register]",
"Encoding": "[x64],opcode=0x03,mod=11,reg=reg3:r,rm=reg3:o2"
"Encoding": "[x64-rex-64],opcode=0x03,mod=11,reg=reg3:r,rm=reg3:o2,rex.r=regx4:r,rex.x=0,rex.b=regx4:o2"
},
{
"Condition": "[#register][constant]",
"Encoding": "[x64],opcode=0x81,mod=11,reg=000,rm=reg3:r,immediate=imm32:o2"
"Encoding": "[x64-rex-64],opcode=0x81,mod=11,reg=000,rm=reg3:r,immediate=imm32:o2,rex.r=regx4:r,rex.x=0,rex.b=0"
}
]
},
Expand All @@ -192,7 +192,7 @@
"OpcodeEncoding": [
{
"Condition": "",
"Encoding": "[x64],opcode=0xF2,opcode2=0x0F,opcode3=0x58,mod=11,reg=reg3:r,rm=reg3:o2"
"Encoding": "[x64-rex-32],opcode=0xF2,opcode2=0x0F,opcode3=0x58,mod=11,reg=reg3:r,rm=reg3:o2,rex.r=regx4:r,rex.x=0,rex.b=regx4:o2"
}
]
},
Expand All @@ -212,7 +212,7 @@
"OpcodeEncoding": [
{
"Condition": "",
"Encoding": "[x64],opcode=0xF3,opcode2=0x0F,opcode3=0x58,mod=11,reg=reg3:r,rm=reg3:o2"
"Encoding": "[x64-rex-32],opcode=0xF3,opcode2=0x0F,opcode3=0x58,mod=11,reg=reg3:r,rm=reg3:o2,rex.r=regx4:r,rex.x=0,rex.b=regx4:o2"
}
]
},
Expand All @@ -232,11 +232,11 @@
"OpcodeEncoding": [
{
"Condition": "[#register][register]",
"Encoding": "[x64],opcode=0x23,mod=11,reg=reg3:r,rm=reg3:o2"
"Encoding": "[x64-rex-32],opcode=0x23,mod=11,reg=reg3:r,rm=reg3:o2,rex.r=regx4:r,rex.x=0,rex.b=regx4:o2"
},
{
"Condition": "[#register][constant]",
"Encoding": "[x64],opcode=0x81,mod=11,reg=100,rm=reg3:r,immediate=imm32:o2"
"Encoding": "[x64-rex-32],opcode=0x81,mod=11,reg=100,rm=reg3:r,immediate=imm32:o2,rex.r=regx4:r,rex.x=0,rex.b=0"
}
]
},
Expand All @@ -256,11 +256,11 @@
"OpcodeEncoding": [
{
"Condition": "[#register][register]",
"Encoding": "[x64],opcode=0x23,mod=11,reg=reg3:r,rm=reg3:o2"
"Encoding": "[x64-rex-64],opcode=0x23,mod=11,reg=reg3:r,rm=reg3:o2,rex.r=regx4:r,rex.x=0,rex.b=regx4:o2"
},
{
"Condition": "[#register][constant]",
"Encoding": "[x64],opcode=0x81,mod=11,reg=100,rm=reg3:r,immediate=imm32:o2"
"Encoding": "[x64-rex-64],opcode=0x81,mod=11,reg=100,rm=reg3:r,immediate=imm32:o2,rex.r=regx4:r,rex.x=0,rex.b=0"
}
]
},
Expand Down Expand Up @@ -6540,6 +6540,44 @@
"Encoding": "[x64],operand-prefix=0x66,opcode=0x87,opcode2=0xdb"
}
]
},
{
"Name": "RdMSR",
"FamilyName": "X64",
"FlagsCleared": "",
"FlagsModified": "",
"FlagsSet": "",
"FlagsUnchanged": "ZCSOP",
"FlagsUndefined": "",
"FlagsUsed": "",
"OperandCount": 1,
"ResultCount": 1,
"ThreeTwoAddressConversion": "false",
"OpcodeEncoding": [
{
"Condition": "",
"Encoding": "[x64],operand-prefix=0x0F,opcode=0x32"
}
]
},
{
"Name": "WrMSR",
"FamilyName": "X64",
"FlagsCleared": "",
"FlagsModified": "",
"FlagsSet": "",
"FlagsUnchanged": "ZCSOP",
"FlagsUndefined": "",
"FlagsUsed": "",
"OperandCount": 1,
"ResultCount": 1,
"ThreeTwoAddressConversion": "false",
"OpcodeEncoding": [
{
"Condition": "",
"Encoding": "[x64],operand-prefix=0x0F,opcode=0x30"
}
]
}
]
}
44 changes: 41 additions & 3 deletions Source/Data/X86Instructions.json
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Expand Up @@ -3,9 +3,9 @@
"[x86]=[instruction-prefix]|[address-prefix]|[operand-prefix]|[opcode]|[opcode2]|[opcode3]|[opcode4]|[mod]|[reg]|[rm]|[scale]|[index]|[base]|[displacement]|[immediate]",
"[x64]=[instruction-prefix]|[address-prefix]|[operand-prefix]|[rex.opcode]|[rex.w]|[rex.r]|[rex.x]|[rex.b]|[opcode]|[opcode2]|[opcode3]|[opcode4]|[mod]|[reg]|[rm]|[scale]|[index]|[base]|[displacement]|[immediate]",

"[x86-branch]=[x86],opcode=0x0F,opcode2=[opcode-branch],immediate=rel32:label",
"[x86-setbyteif]=[x86],opcode=0x0F,opcode2=[opcode-setbyteif],mod=11,reg=000,rm=reg3:r",
"[x86-cmov]=[x86],opcode=0x0F,opcode2=[opcode-cmov],mod=11,reg=reg3:r,rm=reg3:o1",
"[x86-branch]=[x86],operand-prefix=0x0F,opcode=[opcode-branch],immediate=rel32:label",
"[x86-setbyteif]=[x86],operand-prefix=0x0F,opcode=[opcode-setbyteif],mod=11,reg=000,rm=reg3:r",
"[x86-cmov]=[x86],operand-prefix=0x0F,opcode=[opcode-cmov],mod=11,reg=reg3:r,rm=reg3:o1",

"[x86-base-load-ebp+zero]=[x86],mod=01,reg=reg3:[dest],rm=101,immediate=0x00",
"[x86-base-load-ebp+register]=[x86],mod=01,reg=reg3:[dest],rm=100,scale=00,index=reg3:[membase],base=101,immediate=0x00",
Expand Down Expand Up @@ -4738,6 +4738,44 @@
"Encoding": "[x86],operand-prefix=0x66,opcode=0x87,opcode2=0xdb"
}
]
},
{
"Name": "RdMSR",
"FamilyName": "X86",
"FlagsCleared": "",
"FlagsModified": "",
"FlagsSet": "",
"FlagsUnchanged": "ZCSOP",
"FlagsUndefined": "",
"FlagsUsed": "",
"OperandCount": 1,
"ResultCount": 1,
"ThreeTwoAddressConversion": "false",
"OpcodeEncoding": [
{
"Condition": "",
"Encoding": "[x86],operand-prefix=0x0F,opcode=0x32"
}
]
},
{
"Name": "WrMSR",
"FamilyName": "X86",
"FlagsCleared": "",
"FlagsModified": "",
"FlagsSet": "",
"FlagsUnchanged": "ZCSOP",
"FlagsUndefined": "",
"FlagsUsed": "",
"OperandCount": 1,
"ResultCount": 1,
"ThreeTwoAddressConversion": "false",
"OpcodeEncoding": [
{
"Condition": "",
"Encoding": "[x86],operand-prefix=0x0F,opcode=0x30"
}
]
}
]
}
2 changes: 1 addition & 1 deletion Source/Mosa.ClassLib/Math.cs
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Expand Up @@ -3,7 +3,7 @@
namespace Mosa.ClassLib
{
/// <summary>
///
/// Math
/// </summary>
public static class Math
{
Expand Down
2 changes: 1 addition & 1 deletion Source/Mosa.ClassLib/RedBlackTree.cs
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Expand Up @@ -15,7 +15,7 @@ public class RedBlackTree<K, T> where K : System.IComparable
protected enum Color { Red = 1, Black = 0 };

/// <summary>
///
/// RedBlackTreeNode
/// </summary>
/// <typeparam name="X"></typeparam>
/// <typeparam name="Y"></typeparam>
Expand Down
6 changes: 5 additions & 1 deletion Source/Mosa.Compiler.Common/EndianAwareBinaryWriterExtensions.cs
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Expand Up @@ -8,9 +8,13 @@ public static class EndianAwareBinaryWriterExtensions
{
public static void Write(this EndianAwareBinaryWriter writer, byte[] value, int nativeSize)
{
byte[] bytesToWrite = new byte[nativeSize];
var bytesToWrite = new byte[nativeSize];

for (int i = 0; i < nativeSize && i < value.Length; i++)
{
bytesToWrite[i] = value[i];
}

writer.Write(bytesToWrite);
}

Expand Down
81 changes: 58 additions & 23 deletions Source/Mosa.Compiler.Framework/BaseArchitecture.cs
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Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,9 @@

using Mosa.Compiler.Common;
using Mosa.Compiler.Framework.Linker.Elf;
using System;
using System.Collections.Generic;
using System.Reflection;

namespace Mosa.Compiler.Framework
{
Expand All @@ -16,17 +18,11 @@ public abstract class BaseArchitecture
/// <summary>
/// Gets the endianness of the target architecture.
/// </summary>
/// <value>
/// The endianness.
/// </value>
public abstract Endianness Endianness { get; }

/// <summary>
/// Gets the type of the elf machine.
/// </summary>
/// <value>
/// The type of the elf machine.
/// </value>
public abstract MachineType MachineType { get; }

/// <summary>
Expand All @@ -50,12 +46,12 @@ public abstract class BaseArchitecture
public abstract PhysicalRegister ScratchRegister { get; }

/// <summary>
/// Gets the return32 bit register.
/// Gets the return register.
/// </summary>
public abstract PhysicalRegister ReturnRegister { get; }

/// <summary>
/// Gets the return64 bit register.
/// Gets the return register for the high portion of the 64bit result.
/// </summary>
public abstract PhysicalRegister ReturnHighRegister { get; }

Expand Down Expand Up @@ -97,9 +93,6 @@ public abstract class BaseArchitecture
/// <summary>
/// Gets the size of the native instruction.
/// </summary>
/// <value>
/// The size of the native instruction.
/// </value>
public virtual InstructionSize NativeInstructionSize { get { return NativePointerSize == 4 ? InstructionSize.Size32 : InstructionSize.Size64; } }

/// <summary>
Expand All @@ -113,37 +106,40 @@ public abstract class BaseArchitecture
/// <summary>
/// Is the platform is 64 bit
/// </summary>
/// <value>
/// <c>true</c> if [is64 bit]; otherwise, <c>false</c>.
/// </value>
public virtual bool Is64BitPlatform { get { return NativePointerSize == 8; } }

/// <summary>
/// Gets the offset of first local.
/// </summary>
/// <value>
/// The offset of first local.
/// </value>
public virtual int OffsetOfFirstLocal { get { return 0; } }

/// <summary>
/// Gets the offset of first parameter.
/// </summary>
/// <value>
/// The offset of first parameter.
/// </value>
public virtual int OffsetOfFirstParameter { get { return NativePointerSize * 2; } }

/// <summary>
/// Gets the instructions.
/// </summary>
/// <value>
/// The instructions.
/// </value>
public virtual List<BaseInstruction> Instructions { get; }

#endregion Properties

#region Members

protected Dictionary<string, InstrinsicMethodDelegate> PlatformIntrinsicMethods { get; }

#endregion Members

#region Constructor

public BaseArchitecture()
{
PlatformIntrinsicMethods = GetPlatformIntrinsicMethods();
}

#endregion Constructor

#region Methods

/// <summary>
Expand Down Expand Up @@ -219,6 +215,45 @@ public abstract class BaseArchitecture
/// <returns></returns>
public abstract bool IsInstructionMove(BaseInstruction instruction);

/// <summary>
/// Gets the platform intrinsic method.
/// </summary>
/// <param name="name">The name.</param>
/// <returns></returns>
public InstrinsicMethodDelegate GetInstrinsicMethod(string name)
{
PlatformIntrinsicMethods.TryGetValue(name, out InstrinsicMethodDelegate value);

return value;
}

protected Dictionary<string, InstrinsicMethodDelegate> GetPlatformIntrinsicMethods()
{
var platformIntrinsicMethods = new Dictionary<string, InstrinsicMethodDelegate>();

foreach (var type in GetType().Assembly.GetTypes())
{
if (!type.IsClass)
continue;

foreach (var method in type.GetRuntimeMethods())
{
// Now get all the IntrinsicMethodAttribute attributes
var attributes = (IntrinsicMethodAttribute[])method.GetCustomAttributes(typeof(IntrinsicMethodAttribute), true);

for (int i = 0; i < attributes.Length; i++)
{
var d = (InstrinsicMethodDelegate)Delegate.CreateDelegate(typeof(InstrinsicMethodDelegate), method);

// Finally add the dictionary entry mapping the target name and the delegate
platformIntrinsicMethods.Add(attributes[i].Target, d);
}
}
}

return platformIntrinsicMethods;
}

#endregion Methods
}
}

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