Logisim circuits of the Computer System Organisation (CSO-211N) Lab | IIT (BHU) Varanasi | Odd semester 2019-20
Guided By: Dr. Sanjay Kumar Singh, Professor, CSE, IIT (BHU) Varanasi.
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Lab1
- NOT, AND, OR, NOR, XOR gates using NAND Gates
- Half Adder - Both normally and using minimum gates
- Full Adder - Both normally and using minimum gates
- Full Adder using Half Adder
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Lab2
- 4-bit Adder
- 4-bit Subtractor
- 4-bit Parallel Adder-Subtractor
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Lab3
- Mod-8 Counter (Sync & Async)
- Mod-16 Counter (Sync & Async)
- Mod-10 Counter (Sync & Async)
- 2-10 Counter (Sync & Async)
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Lab 4
- 16:1 MUX using 2:1 MUX
- 7 Segment Display Decoder
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Lab 5
- Left Shift (Arithmetic & Logical)
- Right Shift (Arithmetic & Logical)
- Universal Shift