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Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6
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* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6:
  sh: SH-4A UBC support
  sh: interrupt exception handling rework
  sh: Default enable R7780RP IRQs.
  sh: Zero-out coherent buffer in consistent_alloc().
  sh: Convert IPR-IRQ to IRQ chip.
  sh: Convert INTC2 IRQ handler to irq_chip.
  sh: Fix pr_debug statements for sh4
  sh: Convert r7780rp IRQ handler to IRQ chip.
  sh: Updates for IRQ handler changes.
  sh: Kill off timer_ops get_frequency().
  sh: First step at generic timeofday support.
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Linus Torvalds committed Oct 12, 2006
2 parents 8770c01 + 8ae91b9 commit 9eb2007
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Showing 32 changed files with 249 additions and 1,100 deletions.
4 changes: 4 additions & 0 deletions arch/sh/Kconfig
Expand Up @@ -45,6 +45,9 @@ config GENERIC_CALIBRATE_DELAY
config GENERIC_IOMAP
bool

config GENERIC_TIME
def_bool n

config ARCH_MAY_HAVE_PC_FDC
bool

Expand Down Expand Up @@ -357,6 +360,7 @@ config CPU_HAS_SR_RB
endmenu

menu "Timer support"
depends on !GENERIC_TIME

config SH_TMU
bool "TMU timer support"
Expand Down
4 changes: 2 additions & 2 deletions arch/sh/boards/hp6xx/hp6xx_apm.c
Expand Up @@ -83,7 +83,7 @@ static int hp6x0_apm_get_info(char *buf, char **start, off_t fpos, int length)
return p - buf;
}

static irqreturn_t hp6x0_apm_interrupt(int irq, void *dev, struct pt_regs *regs)
static irqreturn_t hp6x0_apm_interrupt(int irq, void *dev)
{
if (!apm_suspended)
apm_queue_event(APM_USER_SUSPEND);
Expand All @@ -96,7 +96,7 @@ static int __init hp6x0_apm_init(void)
int ret;

ret = request_irq(HP680_BTN_IRQ, hp6x0_apm_interrupt,
SA_INTERRUPT, MODNAME, 0);
IRQF_DISABLED, MODNAME, 0);
if (unlikely(ret < 0)) {
printk(KERN_ERR MODNAME ": IRQ %d request failed\n",
HP680_BTN_IRQ);
Expand Down
2 changes: 1 addition & 1 deletion arch/sh/boards/landisk/landisk_pwb.c
Expand Up @@ -135,7 +135,7 @@ static int swdrv_write(struct file *filp, const char *buff, size_t count,
return count;
}

static irqreturn_t sw_interrupt(int irq, void *dev_id, struct pt_regs *regs)
static irqreturn_t sw_interrupt(int irq, void *dev_id)
{
landisk_btn = (0x0ff & (~ctrl_inb(PA_STATUS)));
disable_irq(IRQ_BUTTON);
Expand Down
5 changes: 2 additions & 3 deletions arch/sh/boards/mpc1211/setup.c
Expand Up @@ -69,7 +69,6 @@ static void __init pci_write_config(unsigned long busNo,

static unsigned char m_irq_mask = 0xfb;
static unsigned char s_irq_mask = 0xff;
volatile unsigned long irq_err_count;

static void disable_mpc1211_irq(unsigned int irq)
{
Expand Down Expand Up @@ -118,7 +117,7 @@ static void mask_and_ack_mpc1211(unsigned int irq)
if(irq < 8) {
if(m_irq_mask & (1<<irq)){
if(!mpc1211_irq_real(irq)){
irq_err_count++;
atomic_inc(&irq_err_count)
printk("spurious 8259A interrupt: IRQ %x\n",irq);
}
} else {
Expand All @@ -131,7 +130,7 @@ static void mask_and_ack_mpc1211(unsigned int irq)
} else {
if(s_irq_mask & (1<<(irq - 8))){
if(!mpc1211_irq_real(irq)){
irq_err_count++;
atomic_inc(&irq_err_count);
printk("spurious 8259A interrupt: IRQ %x\n",irq);
}
} else {
Expand Down
105 changes: 22 additions & 83 deletions arch/sh/boards/renesas/r7780rp/irq.c
@@ -1,115 +1,54 @@
/*
* linux/arch/sh/boards/renesas/r7780rp/irq.c
*
* Copyright (C) 2000 Kazumoto Kojima
*
* Renesas Solutions Highlander R7780RP-1 Support.
*
* Modified for R7780RP-1 by
* Atom Create Engineering Co., Ltd. 2002.
* Copyright (C) 2002 Atom Create Engineering Co., Ltd.
* Copyright (C) 2006 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/r7780rp/r7780rp.h>

#ifdef CONFIG_SH_R7780MP
static int mask_pos[] = {12, 11, 9, 14, 15, 8, 13, 6, 5, 4, 3, 2, 0, 0, 1, 0};
#else
static int mask_pos[] = {15, 14, 13, 12, 11, 10, 9, 8, 7, 5, 6, 4, 0, 1, 2, 0};
#endif

static void enable_r7780rp_irq(unsigned int irq);
static void disable_r7780rp_irq(unsigned int irq);

/* shutdown is same as "disable" */
#define shutdown_r7780rp_irq disable_r7780rp_irq

static void ack_r7780rp_irq(unsigned int irq);
static void end_r7780rp_irq(unsigned int irq);

static unsigned int startup_r7780rp_irq(unsigned int irq)
{
enable_r7780rp_irq(irq);
return 0; /* never anything pending */
}

static void disable_r7780rp_irq(unsigned int irq)
{
unsigned short val;
unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]);

/* Set the priority in IPR to 0 */
val = ctrl_inw(IRLCNTR1);
val &= mask;
ctrl_outw(val, IRLCNTR1);
}

static void enable_r7780rp_irq(unsigned int irq)
{
unsigned short val;
unsigned short value = (0x0001 << mask_pos[irq]);

/* Set priority in IPR back to original value */
val = ctrl_inw(IRLCNTR1);
val |= value;
ctrl_outw(val, IRLCNTR1);
}

static void ack_r7780rp_irq(unsigned int irq)
{
disable_r7780rp_irq(irq);
ctrl_outw(ctrl_inw(IRLCNTR1) | (1 << mask_pos[irq]), IRLCNTR1);
}

static void end_r7780rp_irq(unsigned int irq)
static void disable_r7780rp_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
enable_r7780rp_irq(irq);
/* Set the priority in IPR to 0 */
ctrl_outw(ctrl_inw(IRLCNTR1) & (0xffff ^ (1 << mask_pos[irq])),
IRLCNTR1);
}

static struct hw_interrupt_type r7780rp_irq_type = {
.typename = "R7780RP-IRQ",
.startup = startup_r7780rp_irq,
.shutdown = shutdown_r7780rp_irq,
.enable = enable_r7780rp_irq,
.disable = disable_r7780rp_irq,
.ack = ack_r7780rp_irq,
.end = end_r7780rp_irq,
static struct irq_chip r7780rp_irq_chip __read_mostly = {
.name = "r7780rp",
.mask = disable_r7780rp_irq,
.unmask = enable_r7780rp_irq,
.mask_ack = disable_r7780rp_irq,
};

static void make_r7780rp_irq(unsigned int irq)
{
disable_irq_nosync(irq);
irq_desc[irq].chip = &r7780rp_irq_type;
disable_r7780rp_irq(irq);
}

/*
* Initialize IRQ setting
*/
void __init init_r7780rp_IRQ(void)
{
int i;

/* IRL0=PCI Slot #A
* IRL1=PCI Slot #B
* IRL2=PCI Slot #C
* IRL3=PCI Slot #D
* IRL4=CF Card
* IRL5=CF Card Insert
* IRL6=M66596
* IRL7=SD Card
* IRL8=Touch Panel
* IRL9=SCI
* IRL10=Serial
* IRL11=Extention #A
* IRL11=Extention #B
* IRL12=Debug LAN
* IRL13=Push Switch
* IRL14=ZiggBee IO
*/

for (i=0; i<15; i++)
make_r7780rp_irq(i);
for (i = 0; i < 15; i++) {
disable_irq_nosync(i);
set_irq_chip_and_handler(i, &r7780rp_irq_chip,
handle_level_irq);
enable_r7780rp_irq(i);
}
}
2 changes: 1 addition & 1 deletion arch/sh/boards/snapgear/setup.c
Expand Up @@ -33,7 +33,7 @@ extern void pcibios_init(void);
* EraseConfig handling functions
*/

static irqreturn_t eraseconfig_interrupt(int irq, void *dev_id, struct pt_regs *regs)
static irqreturn_t eraseconfig_interrupt(int irq, void *dev_id)
{
volatile char dummy __attribute__((unused)) = * (volatile char *) 0xb8000000;

Expand Down
2 changes: 1 addition & 1 deletion arch/sh/cchips/hd6446x/hd64461/setup.c
Expand Up @@ -71,7 +71,7 @@ static struct hw_interrupt_type hd64461_irq_type = {
.end = end_hd64461_irq,
};

static irqreturn_t hd64461_interrupt(int irq, void *dev_id, struct pt_regs *regs)
static irqreturn_t hd64461_interrupt(int irq, void *dev_id)
{
printk(KERN_INFO
"HD64461: spurious interrupt, nirr: 0x%x nimr: 0x%x\n",
Expand Down
2 changes: 1 addition & 1 deletion arch/sh/cchips/hd6446x/hd64465/gpio.c
Expand Up @@ -85,7 +85,7 @@ static struct {
void *dev;
} handlers[GPIO_NPORTS * 8];

static irqreturn_t hd64465_gpio_interrupt(int irq, void *dev, struct pt_regs *regs)
static irqreturn_t hd64465_gpio_interrupt(int irq, void *dev)
{
unsigned short port, pin, isr, mask, portpin;

Expand Down
2 changes: 1 addition & 1 deletion arch/sh/cchips/hd6446x/hd64465/setup.c
Expand Up @@ -84,7 +84,7 @@ static struct hw_interrupt_type hd64465_irq_type = {
};


static irqreturn_t hd64465_interrupt(int irq, void *dev_id, struct pt_regs *regs)
static irqreturn_t hd64465_interrupt(int irq, void *dev_id)
{
printk(KERN_INFO
"HD64465: spurious interrupt, nirr: 0x%x nimr: 0x%x\n",
Expand Down
3 changes: 1 addition & 2 deletions arch/sh/cchips/voyagergx/irq.c
Expand Up @@ -88,8 +88,7 @@ static struct hw_interrupt_type voyagergx_irq_type = {
.end = end_voyagergx_irq,
};

static irqreturn_t voyagergx_interrupt(int irq, void *dev_id,
struct pt_regs *regs)
static irqreturn_t voyagergx_interrupt(int irq, void *dev_id)
{
printk(KERN_INFO
"VoyagerGX: spurious interrupt, status: 0x%x\n",
Expand Down
2 changes: 1 addition & 1 deletion arch/sh/drivers/dma/dma-g2.c
Expand Up @@ -51,7 +51,7 @@ static volatile struct g2_dma_info *g2_dma = (volatile struct g2_dma_info *)0xa0
((g2_dma->channel[i].size - \
g2_dma->status[i].size) & 0x0fffffff)

static irqreturn_t g2_dma_interrupt(int irq, void *dev_id, struct pt_regs *regs)
static irqreturn_t g2_dma_interrupt(int irq, void *dev_id)
{
int i;

Expand Down
2 changes: 1 addition & 1 deletion arch/sh/drivers/dma/dma-pvr2.c
Expand Up @@ -21,7 +21,7 @@
static unsigned int xfer_complete;
static int count;

static irqreturn_t pvr2_dma_interrupt(int irq, void *dev_id, struct pt_regs *regs)
static irqreturn_t pvr2_dma_interrupt(int irq, void *dev_id)
{
if (get_dma_residue(PVR2_CASCADE_CHAN)) {
printk(KERN_WARNING "DMA: SH DMAC did not complete transfer "
Expand Down
6 changes: 3 additions & 3 deletions arch/sh/drivers/dma/dma-sh.c
Expand Up @@ -60,9 +60,9 @@ static inline unsigned int calc_xmit_shift(struct dma_channel *chan)
* Besides that it needs to waken any waiting process, which should handle
* setting up the next transfer.
*/
static irqreturn_t dma_tei(int irq, void *dev_id, struct pt_regs *regs)
static irqreturn_t dma_tei(int irq, void *dev_id)
{
struct dma_channel *chan = (struct dma_channel *)dev_id;
struct dma_channel *chan = dev_id;
u32 chcr;

chcr = ctrl_inl(CHCR[chan->chan]);
Expand Down Expand Up @@ -228,7 +228,7 @@ static inline int dmaor_reset(void)
}

#if defined(CONFIG_CPU_SH4)
static irqreturn_t dma_err(int irq, void *dev_id, struct pt_regs *regs)
static irqreturn_t dma_err(int irq, void *dummy)
{
dmaor_reset();
disable_irq(irq);
Expand Down
4 changes: 2 additions & 2 deletions arch/sh/drivers/pci/pci-sh7751.c
Expand Up @@ -155,15 +155,15 @@ int __init sh7751_pcic_init(struct sh4_pci_address_map *map)
*/
pr_debug("PCI: Mapping IO address 0x%x - 0x%x to base 0x%x\n",
PCIBIOS_MIN_IO, (64 << 10),
SH4_PCI_IO_BASE + PCIBIOS_MIN_IO);
SH7751_PCI_IO_BASE + PCIBIOS_MIN_IO);

/*
* XXX: For now, leave this board-specific. In the event we have other
* boards that need to do similar work, this can be wrapped.
*/
#ifdef CONFIG_SH_BIGSUR
bigsur_port_map(PCIBIOS_MIN_IO, (64 << 10),
SH4_PCI_IO_BASE + PCIBIOS_MIN_IO, 0);
SH7751_PCI_IO_BASE + PCIBIOS_MIN_IO, 0);
#endif

/* Make sure the MSB's of IO window are set to access PCI space
Expand Down
2 changes: 1 addition & 1 deletion arch/sh/drivers/pci/pci-st40.c
Expand Up @@ -161,7 +161,7 @@ static char * pci_commands[16]={
"Memory Write-and-Invalidate"
};

static irqreturn_t st40_pci_irq(int irq, void *dev_instance, struct pt_regs *regs)
static irqreturn_t st40_pci_irq(int irq, void *dev_instance)
{
unsigned pci_int, pci_air, pci_cir, pci_aint;
static int count=0;
Expand Down

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