vr9_avm_fritz7362sl.dts

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "vr9_avm_fritz736x.dtsi"

/ {
	compatible = "avm,fritz7362sl", "avm,fritz736x", "lantiq,xway", "lantiq,vr9";
	model = "AVM FRITZ!Box 7362 SL";
};

&state_default {
	pcie-rst {
		lantiq,pins = "io21";
		lantiq,open-drain = <1>;
		lantiq,output = <1>;
	};
};

&spi {
	status = "okay";

	flash@4 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "jedec,spi-nor";
		reg = <4>;
		spi-max-frequency = <1000000>;

		urlader: partition@0 {
			reg = <0x0 0x40000>;
			label = "urlader";
			read-only;
		};

		partition@40000 {
			reg = <0x40000 0x60000>;
			label = "tffs (1)";
			read-only;
		};

		partition@A0000 {
			reg = <0xA0000 0x60000>;
			label = "tffs (2)";
			read-only;
		};
	};
};

&localbus {
	flash1: flash@1 {
		compatible = "lantiq,nand-xway";
		lantiq,cs1 = <1>;
		bank-width = <1>;
		reg = <1 0x0 0x2000000>;

		pinctrl-0 = <&nand_pins>, <&nand_cs1_pins>;
		pinctrl-names = "default";

		nand-ecc-engine = <&flash1>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "kernel";
				reg = <0x0 0x400000>;
			};

			partition@400000 {
				label = "ubi";
				reg = <0x400000 0x7c00000>;
			};
		};
	};
};

&pcie0 {
	gpio-reset = <&gpio 21 GPIO_ACTIVE_LOW>;

	pcie@0 {
		#size-cells = <1>;
		#address-cells = <2>;
	};
};

&eth0 {
	nvmem-cells = <&macaddr_urlader_a91>;
	nvmem-cell-names = "mac-address";
	mac-address-increment = <(-2)>;
};

&urlader {
	compatible = "nvmem-cells";
	#address-cells = <1>;
	#size-cells = <1>;

	macaddr_urlader_a91: macaddr@a91 {
		reg = <0xa91 0x6>;
	};
};