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arm-trusted-firmware-mvebu: update to v2.5
Revert to using the checked in `tbb_linux` image tool binary since building it drags in the rather big Crypto++ project. Cherry-pick the post-release UART fixes. Switch to AUTORELEASE while at it. Signed-off-by: Andre Heider <a.heider@gmail.com>
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package/boot/arm-trusted-firmware-mvebu/patches/001-imagetool.patch
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@@ -0,0 +1,20 @@ | ||
--- a/plat/marvell/armada/a3k/common/a3700_common.mk | ||
+++ b/plat/marvell/armada/a3k/common/a3700_common.mk | ||
@@ -76,7 +76,7 @@ $(if $(wildcard $(value WTP)/*),,$(error | ||
$(if $(shell test -s "$(value WTP)/branch.txt" || git -C $(value WTP) rev-parse --show-cdup 2>&1),$(error "'WTP=$(value WTP)' was specified, but '$(value WTP)' does not contain valid Marvell a3700_utils release tarball nor git repository")) | ||
|
||
DOIMAGEPATH := $(WTP) | ||
-DOIMAGETOOL := $(DOIMAGEPATH)/wtptp/src/TBB_Linux/release/TBB_linux | ||
+DOIMAGETOOL := $(DOIMAGEPATH)/wtptp/linux/tbb_linux | ||
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BUILD_UART := uart-images | ||
UART_IMAGE := $(BUILD_UART).tgz.bin | ||
@@ -132,7 +132,7 @@ TIMBLDUARTARGS := $(MARVELL_SECURE_BOOT | ||
CRYPTOPP_LIBDIR ?= $(CRYPTOPP_PATH) | ||
CRYPTOPP_INCDIR ?= $(CRYPTOPP_PATH) | ||
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||
-$(DOIMAGETOOL): FORCE | ||
+$(DOIMAGETOOL): | ||
$(if $(CRYPTOPP_LIBDIR),,$(error "Platform '$(PLAT)' for WTP image tool requires CRYPTOPP_PATH or CRYPTOPP_LIBDIR. Please set CRYPTOPP_PATH or CRYPTOPP_LIBDIR to point to the right directory")) | ||
$(if $(CRYPTOPP_INCDIR),,$(error "Platform '$(PLAT)' for WTP image tool requires CRYPTOPP_PATH or CRYPTOPP_INCDIR. Please set CRYPTOPP_PATH or CRYPTOPP_INCDIR to point to the right directory")) | ||
$(if $(wildcard $(CRYPTOPP_LIBDIR)/*),,$(error "Either 'CRYPTOPP_PATH' or 'CRYPTOPP_LIB' was set to '$(CRYPTOPP_LIBDIR)', but '$(CRYPTOPP_LIBDIR)' does not exist")) |
60 changes: 60 additions & 0 deletions
60
...ted-firmware-mvebu/patches/100-fix-plat-marvell-a3720-uart-fix-UART-clock-rate-valu.patch
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From 66a7752834382595d26214783ae4698fd1f00bd6 Mon Sep 17 00:00:00 2001 | ||
From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org> | ||
Date: Thu, 13 May 2021 14:53:44 +0200 | ||
Subject: [PATCH] fix(plat/marvell/a3720/uart): fix UART clock rate value and | ||
divisor calculation | ||
MIME-Version: 1.0 | ||
Content-Type: text/plain; charset=UTF-8 | ||
Content-Transfer-Encoding: 8bit | ||
|
||
UART parent clock is by default the platform's xtal clock, which is | ||
25 MHz. | ||
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||
The value defined in the driver, though, is 25.8048 MHz. This is a hack | ||
for the suboptimal divisor calculation | ||
Divisor = UART clock / (16 * baudrate) | ||
which does not use rounding division, resulting in a suboptimal value | ||
for divisor if the correct parent clock rate was used. | ||
|
||
Change the code for divisor calculation to | ||
Divisor = Round(UART clock / (16 * baudrate)) | ||
and change the parent clock rate value to 25 MHz. | ||
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||
The final UART divisor for default baudrate 115200 is not affected by | ||
this change. | ||
|
||
(Note that the parent clock rate should not be defined via a macro, | ||
since the xtal clock can also be 40 MHz. This is outside of the scope of | ||
this fix, though.) | ||
|
||
Signed-off-by: Pali Rohár <pali@kernel.org> | ||
Change-Id: Iaa401173df87aec94f2dd1b38a90fb6ed0bf0ec6 | ||
--- | ||
drivers/marvell/uart/a3700_console.S | 3 ++- | ||
plat/marvell/armada/a3k/common/include/platform_def.h | 2 +- | ||
2 files changed, 3 insertions(+), 2 deletions(-) | ||
|
||
--- a/drivers/marvell/uart/a3700_console.S | ||
+++ b/drivers/marvell/uart/a3700_console.S | ||
@@ -45,8 +45,9 @@ func console_a3700_core_init | ||
cbz w2, init_fail | ||
|
||
/* Program the baudrate */ | ||
- /* Divisor = Uart clock / (16 * baudrate) */ | ||
+ /* Divisor = Round(Uartclock / (16 * baudrate)) */ | ||
lsl w2, w2, #4 | ||
+ add w1, w1, w2, lsr #1 | ||
udiv w2, w1, w2 | ||
and w2, w2, #0x3ff | ||
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||
--- a/plat/marvell/armada/a3k/common/include/platform_def.h | ||
+++ b/plat/marvell/armada/a3k/common/include/platform_def.h | ||
@@ -164,7 +164,7 @@ | ||
* PL011 related constants | ||
*/ | ||
#define PLAT_MARVELL_BOOT_UART_BASE (MVEBU_REGS_BASE + 0x12000) | ||
-#define PLAT_MARVELL_BOOT_UART_CLK_IN_HZ 25804800 | ||
+#define PLAT_MARVELL_BOOT_UART_CLK_IN_HZ 25000000 | ||
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||
#define PLAT_MARVELL_CRASH_UART_BASE PLAT_MARVELL_BOOT_UART_BASE | ||
#define PLAT_MARVELL_CRASH_UART_CLK_IN_HZ PLAT_MARVELL_BOOT_UART_CLK_IN_HZ |
53 changes: 53 additions & 0 deletions
53
...ted-firmware-mvebu/patches/101-fix-plat-marvell-a3720-uart-fix-configuring-UART-clo.patch
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From b9185c75f7ec2b600ebe0d49281e216a2456b764 Mon Sep 17 00:00:00 2001 | ||
From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org> | ||
Date: Thu, 13 May 2021 15:11:06 +0200 | ||
Subject: [PATCH] fix(plat/marvell/a3720/uart): fix configuring UART clock | ||
MIME-Version: 1.0 | ||
Content-Type: text/plain; charset=UTF-8 | ||
Content-Transfer-Encoding: 8bit | ||
|
||
When configuring the UART_BAUD_REG register, the function | ||
console_a3700_core_init() currently only changes the baud divisor field, | ||
leaving other fields to their previous value. | ||
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This is incorrect, because the baud divisor is computed with the | ||
assumption that the parent clock rate is 25 MHz, and since the other | ||
fields in this register configure the parent clock, which could have | ||
been changed by U-Boot or Linux. | ||
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Fix this function to also configure the other fields so that the UART | ||
parent clock is selected to be the xtal clock. | ||
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For example without this change TF-A prints only | ||
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ERROR: a3700_system_off needs to be implemented | ||
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followed by garbage after plat_crash_console_init() is called. | ||
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After applying this change instead of garbage it also print crash info: | ||
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PANIC at PC : 0x0000000004023800 | ||
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Signed-off-by: Pali Rohár <pali@kernel.org> | ||
Change-Id: I72f338355cc60d939b8bb978d9c7fdd576416b81 | ||
--- | ||
drivers/marvell/uart/a3700_console.S | 7 ++----- | ||
1 file changed, 2 insertions(+), 5 deletions(-) | ||
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--- a/drivers/marvell/uart/a3700_console.S | ||
+++ b/drivers/marvell/uart/a3700_console.S | ||
@@ -49,12 +49,9 @@ func console_a3700_core_init | ||
lsl w2, w2, #4 | ||
add w1, w1, w2, lsr #1 | ||
udiv w2, w1, w2 | ||
- and w2, w2, #0x3ff | ||
+ and w2, w2, #0x3ff /* clear all other bits to use default clock */ | ||
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- ldr w3, [x0, #UART_BAUD_REG] | ||
- bic w3, w3, 0x3ff | ||
- orr w3, w3, w2 | ||
- str w3, [x0, #UART_BAUD_REG]/* set baud rate divisor */ | ||
+ str w2, [x0, #UART_BAUD_REG]/* set baud rate divisor */ | ||
|
||
/* Set UART to default 16X scheme */ | ||
mov w3, #0 |
122 changes: 122 additions & 0 deletions
122
...ted-firmware-mvebu/patches/102-refactor-plat-marvell-uart-de-duplicate-PLAT_MARVELL.patch
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From 3133625859b74df42deddd80b705578af6fc2fea Mon Sep 17 00:00:00 2001 | ||
From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org> | ||
Date: Fri, 14 May 2021 13:21:56 +0200 | ||
Subject: [PATCH] refactor(plat/marvell/uart): de-duplicate PLAT_MARVELL_UART | ||
macros | ||
MIME-Version: 1.0 | ||
Content-Type: text/plain; charset=UTF-8 | ||
Content-Transfer-Encoding: 8bit | ||
|
||
Macros PLAT_MARVELL_BOOT_UART* and PLAT_MARVELL_CRASH_UART* are defined | ||
to same values. De-duplicate them into PLAT_MARVELL_UART* macros. | ||
|
||
Signed-off-by: Pali Rohár <pali@kernel.org> | ||
Change-Id: Iae5daf7cad6a971e6f3dbe561df3d0174106ca7f | ||
--- | ||
plat/marvell/armada/a3k/common/include/platform_def.h | 7 ++----- | ||
plat/marvell/armada/a8k/a80x0_puzzle/board/system_power.c | 4 ++-- | ||
plat/marvell/armada/a8k/common/include/platform_def.h | 7 ++----- | ||
plat/marvell/armada/common/aarch64/marvell_helpers.S | 8 ++++---- | ||
plat/marvell/armada/common/marvell_console.c | 8 ++++---- | ||
5 files changed, 14 insertions(+), 20 deletions(-) | ||
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--- a/plat/marvell/armada/a3k/common/include/platform_def.h | ||
+++ b/plat/marvell/armada/a3k/common/include/platform_def.h | ||
@@ -163,11 +163,8 @@ | ||
/* | ||
* PL011 related constants | ||
*/ | ||
-#define PLAT_MARVELL_BOOT_UART_BASE (MVEBU_REGS_BASE + 0x12000) | ||
-#define PLAT_MARVELL_BOOT_UART_CLK_IN_HZ 25000000 | ||
- | ||
-#define PLAT_MARVELL_CRASH_UART_BASE PLAT_MARVELL_BOOT_UART_BASE | ||
-#define PLAT_MARVELL_CRASH_UART_CLK_IN_HZ PLAT_MARVELL_BOOT_UART_CLK_IN_HZ | ||
+#define PLAT_MARVELL_UART_BASE (MVEBU_REGS_BASE + 0x12000) | ||
+#define PLAT_MARVELL_UART_CLK_IN_HZ 25000000 | ||
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#define PLAT_MARVELL_BL31_RUN_UART_BASE PLAT_MARVELL_BOOT_UART_BASE | ||
#define PLAT_MARVELL_BL31_RUN_UART_CLK_IN_HZ PLAT_MARVELL_BOOT_UART_CLK_IN_HZ | ||
--- a/plat/marvell/armada/a8k/a80x0_puzzle/board/system_power.c | ||
+++ b/plat/marvell/armada/a8k/a80x0_puzzle/board/system_power.c | ||
@@ -41,8 +41,8 @@ int system_power_off(void) | ||
len = sizeof(system_off_now); | ||
system_off_now[len - 1] = add_xor_checksum(system_off_now, len); | ||
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- console_16550_register(PLAT_MARVELL_BOOT_UART_BASE + 0x100, | ||
- PLAT_MARVELL_BOOT_UART_CLK_IN_HZ, 115200, &console); | ||
+ console_16550_register(PLAT_MARVELL_UART_BASE + 0x100, | ||
+ PLAT_MARVELL_UART_CLK_IN_HZ, 115200, &console); | ||
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/* Send system_off_now to console */ | ||
for (i = 0; i < len; i++) { | ||
--- a/plat/marvell/armada/a8k/common/include/platform_def.h | ||
+++ b/plat/marvell/armada/a8k/common/include/platform_def.h | ||
@@ -168,11 +168,8 @@ | ||
/* | ||
* PL011 related constants | ||
*/ | ||
-#define PLAT_MARVELL_BOOT_UART_BASE (MVEBU_REGS_BASE + 0x512000) | ||
-#define PLAT_MARVELL_BOOT_UART_CLK_IN_HZ 200000000 | ||
- | ||
-#define PLAT_MARVELL_CRASH_UART_BASE PLAT_MARVELL_BOOT_UART_BASE | ||
-#define PLAT_MARVELL_CRASH_UART_CLK_IN_HZ PLAT_MARVELL_BOOT_UART_CLK_IN_HZ | ||
+#define PLAT_MARVELL_UART_BASE (MVEBU_REGS_BASE + 0x512000) | ||
+#define PLAT_MARVELL_UART_CLK_IN_HZ 200000000 | ||
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||
#define PLAT_MARVELL_BL31_RUN_UART_BASE PLAT_MARVELL_BOOT_UART_BASE | ||
#define PLAT_MARVELL_BL31_RUN_UART_CLK_IN_HZ PLAT_MARVELL_BOOT_UART_CLK_IN_HZ | ||
--- a/plat/marvell/armada/common/aarch64/marvell_helpers.S | ||
+++ b/plat/marvell/armada/common/aarch64/marvell_helpers.S | ||
@@ -63,8 +63,8 @@ endfunc plat_marvell_calc_core_pos | ||
* --------------------------------------------- | ||
*/ | ||
func plat_crash_console_init | ||
- mov_imm x0, PLAT_MARVELL_CRASH_UART_BASE | ||
- mov_imm x1, PLAT_MARVELL_CRASH_UART_CLK_IN_HZ | ||
+ mov_imm x0, PLAT_MARVELL_UART_BASE | ||
+ mov_imm x1, PLAT_MARVELL_UART_CLK_IN_HZ | ||
mov_imm x2, MARVELL_CONSOLE_BAUDRATE | ||
#ifdef PLAT_a3700 | ||
b console_a3700_core_init | ||
@@ -81,7 +81,7 @@ endfunc plat_crash_console_init | ||
* --------------------------------------------- | ||
*/ | ||
func plat_crash_console_putc | ||
- mov_imm x1, PLAT_MARVELL_CRASH_UART_BASE | ||
+ mov_imm x1, PLAT_MARVELL_UART_BASE | ||
#ifdef PLAT_a3700 | ||
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b console_a3700_core_putc | ||
@@ -99,7 +99,7 @@ endfunc plat_crash_console_putc | ||
* --------------------------------------------- | ||
*/ | ||
func plat_crash_console_flush | ||
- mov_imm x0, PLAT_MARVELL_CRASH_UART_BASE | ||
+ mov_imm x0, PLAT_MARVELL_UART_BASE | ||
#ifdef PLAT_a3700 | ||
b console_a3700_core_flush | ||
#else | ||
--- a/plat/marvell/armada/common/marvell_console.c | ||
+++ b/plat/marvell/armada/common/marvell_console.c | ||
@@ -31,8 +31,8 @@ static console_t marvell_runtime_console | ||
void marvell_console_boot_init(void) | ||
{ | ||
int rc = | ||
- console_marvell_register(PLAT_MARVELL_BOOT_UART_BASE, | ||
- PLAT_MARVELL_BOOT_UART_CLK_IN_HZ, | ||
+ console_marvell_register(PLAT_MARVELL_UART_BASE, | ||
+ PLAT_MARVELL_UART_CLK_IN_HZ, | ||
MARVELL_CONSOLE_BAUDRATE, | ||
&marvell_boot_console); | ||
if (rc == 0) { | ||
@@ -58,8 +58,8 @@ void marvell_console_boot_end(void) | ||
void marvell_console_runtime_init(void) | ||
{ | ||
int rc = | ||
- console_marvell_register(PLAT_MARVELL_BOOT_UART_BASE, | ||
- PLAT_MARVELL_BOOT_UART_CLK_IN_HZ, | ||
+ console_marvell_register(PLAT_MARVELL_UART_BASE, | ||
+ PLAT_MARVELL_UART_CLK_IN_HZ, | ||
MARVELL_CONSOLE_BAUDRATE, | ||
&marvell_runtime_console); | ||
if (rc == 0) |
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