forked from openwrt/openwrt
Commit
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
realtek: add support for HPE 1920 series
Hardware information: --------------------- - HPE 1920-8G: - RTL8380 SoC - 8 Gigabit RJ45 ports (built-in RTL8218B) - 2 SFP ports (built-in SerDes) - HPE 1920-16G / HPE 1920-24G (same board): - RTL8382 SoC - 16/24 Gigabit RJ45 ports (built-in RTL8218B, 1/2 external RTL8218D) - 4 SFP ports (external RTL8214FC) - Common: - RJ45 RS232 port on front panel - 32 MiB NOR Flash - 128 MiB DDR3 DRAM - PT7A7514 watchdog Booting initramfs image: ------------------------ - Prepare a FTP or TFTP server serving the OpenWrt initramfs image and connect the server to a switch port. - Connect to the console port of the device and enter the extended boot menu by typing Ctrl+B when prompted. - Choose the menu option "<3> Enter Ethernet SubMenu". - Set network parameters via the option "<5> Modify Ethernet Parameter". Enter the FTP/TFTP filename as "Load File Name" ("Target File Name" can be left blank, it is not required for booting from RAM). Note that the configuration is saved on flash, so it only needs to be done once. - Select "<1> Download Application Program To SDRAM And Run". Initial installation: --------------------- - Boot an initramfs image as described above, then use sysupgrade to install OpenWrt permanently. After initial installation, the bootloader needs to be configured to load the correct image file - Enter the extended boot menu again and choose "<4> File Control", then select "<2> Set Application File type". - Enter the number of the file "openwrt-kernel.bin" (should be 1), and use the option "<1> +Main" to select it as boot image. - Choose "<0> Exit To Main Menu" and then "<1> Boot System". NOTE: The bootloader on these devices can only boot from the VFS filesystem which normally spans most of the flash. With OpenWrt, only the first part of the firmware partition contains a valid filesystem, the rest is used for rootfs. As the bootloader does not know about this, you must not do any file operations in the bootloader, as this may corrupt the OpenWrt installation (selecting the boot image is an exception, as it only stores a flag in the bootloader data, but doesn't write to the filesystem). Signed-off-by: Jan Hoffmann <jan@3e8.eu>
- Loading branch information
Showing
10 changed files
with
540 additions
and
3 deletions.
There are no files selected for viewing
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,113 @@ | ||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT | ||
|
||
#include "rtl838x.dtsi" | ||
#include "rtl838x_hpe_1920.dtsi" | ||
|
||
/ { | ||
compatible = "hpe,1920-8g", "realtek,rtl838x-soc"; | ||
model = "HPE 1920-8G (JG920A)"; | ||
|
||
gpio1: rtl8231-gpio { | ||
compatible = "realtek,rtl8231-gpio"; | ||
#gpio-cells = <2>; | ||
gpio-controller; | ||
indirect-access-bus-id = <0>; | ||
}; | ||
|
||
i2c0: i2c-gpio-0 { | ||
compatible = "i2c-gpio"; | ||
sda-gpios = <&gpio1 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; | ||
scl-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; | ||
i2c-gpio,delay-us = <2>; | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
}; | ||
|
||
sfp0: sfp-0 { | ||
compatible = "sff,sfp"; | ||
i2c-bus = <&i2c0>; | ||
los-gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>; | ||
mod-def0-gpio = <&gpio1 25 GPIO_ACTIVE_LOW>; | ||
// tx-fault and tx-disable unconnected | ||
}; | ||
|
||
i2c1: i2c-gpio-1 { | ||
compatible = "i2c-gpio"; | ||
sda-gpios = <&gpio1 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; | ||
scl-gpios = <&gpio1 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; | ||
i2c-gpio,delay-us = <2>; | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
}; | ||
|
||
sfp1: sfp-1 { | ||
compatible = "sff,sfp"; | ||
i2c-bus = <&i2c1>; | ||
los-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>; | ||
mod-def0-gpio = <&gpio1 21 GPIO_ACTIVE_LOW>; | ||
// tx-fault and tx-disable unconnected | ||
}; | ||
}; | ||
|
||
ðernet0 { | ||
mdio: mdio-bus { | ||
compatible = "realtek,rtl838x-mdio"; | ||
regmap = <ðernet0>; | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
|
||
INTERNAL_PHY(8) | ||
INTERNAL_PHY(9) | ||
INTERNAL_PHY(10) | ||
INTERNAL_PHY(11) | ||
INTERNAL_PHY(12) | ||
INTERNAL_PHY(13) | ||
INTERNAL_PHY(14) | ||
INTERNAL_PHY(15) | ||
|
||
INTERNAL_PHY(24) | ||
INTERNAL_PHY(26) | ||
}; | ||
}; | ||
|
||
&switch0 { | ||
ports { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
|
||
SWITCH_PORT(8, 1, internal) | ||
SWITCH_PORT(9, 2, internal) | ||
SWITCH_PORT(10, 3, internal) | ||
SWITCH_PORT(11, 4, internal) | ||
SWITCH_PORT(12, 5, internal) | ||
SWITCH_PORT(13, 6, internal) | ||
SWITCH_PORT(14, 7, internal) | ||
SWITCH_PORT(15, 8, internal) | ||
|
||
port@24 { | ||
reg = <24>; | ||
label = "lan9"; | ||
phy-mode = "1000base-x"; | ||
managed = "in-band-status"; | ||
sfp = <&sfp0>; | ||
}; | ||
|
||
port@26 { | ||
reg = <26>; | ||
label = "lan10"; | ||
phy-mode = "1000base-x"; | ||
managed = "in-band-status"; | ||
sfp = <&sfp1>; | ||
}; | ||
|
||
port@28 { | ||
ethernet = <ðernet0>; | ||
reg = <28>; | ||
phy-mode = "internal"; | ||
fixed-link { | ||
speed = <1000>; | ||
full-duplex; | ||
}; | ||
}; | ||
}; | ||
}; |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,48 @@ | ||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT | ||
|
||
#include "rtl8382_hpe_1920.dtsi" | ||
|
||
/ { | ||
compatible = "hpe,1920-16g", "realtek,rtl838x-soc"; | ||
model = "HPE 1920-16G (JG923A)"; | ||
}; | ||
|
||
&switch0 { | ||
ports { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
|
||
SWITCH_PORT(8, 1, internal) | ||
SWITCH_PORT(9, 2, internal) | ||
SWITCH_PORT(10, 3, internal) | ||
SWITCH_PORT(11, 4, internal) | ||
SWITCH_PORT(12, 5, internal) | ||
SWITCH_PORT(13, 6, internal) | ||
SWITCH_PORT(14, 7, internal) | ||
SWITCH_PORT(15, 8, internal) | ||
|
||
SWITCH_PORT(16, 9, qsgmii) | ||
SWITCH_PORT(17, 10, qsgmii) | ||
SWITCH_PORT(18, 11, qsgmii) | ||
SWITCH_PORT(19, 12, qsgmii) | ||
SWITCH_PORT(20, 13, qsgmii) | ||
SWITCH_PORT(21, 14, qsgmii) | ||
SWITCH_PORT(22, 15, qsgmii) | ||
SWITCH_PORT(23, 16, qsgmii) | ||
|
||
SWITCH_PORT(24, 17, qsgmii) | ||
SWITCH_PORT(25, 18, qsgmii) | ||
SWITCH_PORT(26, 19, qsgmii) | ||
SWITCH_PORT(27, 20, qsgmii) | ||
|
||
port@28 { | ||
ethernet = <ðernet0>; | ||
reg = <28>; | ||
phy-mode = "internal"; | ||
fixed-link { | ||
speed = <1000>; | ||
full-duplex; | ||
}; | ||
}; | ||
}; | ||
}; |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,68 @@ | ||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT | ||
|
||
#include "rtl8382_hpe_1920.dtsi" | ||
|
||
/ { | ||
compatible = "hpe,1920-24g", "realtek,rtl838x-soc"; | ||
model = "HPE 1920-24G (JG924A)"; | ||
}; | ||
|
||
&mdio { | ||
EXTERNAL_PHY(0) | ||
EXTERNAL_PHY(1) | ||
EXTERNAL_PHY(2) | ||
EXTERNAL_PHY(3) | ||
EXTERNAL_PHY(4) | ||
EXTERNAL_PHY(5) | ||
EXTERNAL_PHY(6) | ||
EXTERNAL_PHY(7) | ||
}; | ||
|
||
&switch0 { | ||
ports { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
|
||
SWITCH_PORT(0, 1, qsgmii) | ||
SWITCH_PORT(1, 2, qsgmii) | ||
SWITCH_PORT(2, 3, qsgmii) | ||
SWITCH_PORT(3, 4, qsgmii) | ||
SWITCH_PORT(4, 5, qsgmii) | ||
SWITCH_PORT(5, 6, qsgmii) | ||
SWITCH_PORT(6, 7, qsgmii) | ||
SWITCH_PORT(7, 8, qsgmii) | ||
|
||
SWITCH_PORT(8, 9, internal) | ||
SWITCH_PORT(9, 10, internal) | ||
SWITCH_PORT(10, 11, internal) | ||
SWITCH_PORT(11, 12, internal) | ||
SWITCH_PORT(12, 13, internal) | ||
SWITCH_PORT(13, 14, internal) | ||
SWITCH_PORT(14, 15, internal) | ||
SWITCH_PORT(15, 16, internal) | ||
|
||
SWITCH_PORT(16, 17, qsgmii) | ||
SWITCH_PORT(17, 18, qsgmii) | ||
SWITCH_PORT(18, 19, qsgmii) | ||
SWITCH_PORT(19, 20, qsgmii) | ||
SWITCH_PORT(20, 21, qsgmii) | ||
SWITCH_PORT(21, 22, qsgmii) | ||
SWITCH_PORT(22, 23, qsgmii) | ||
SWITCH_PORT(23, 24, qsgmii) | ||
|
||
SWITCH_PORT(24, 25, qsgmii) | ||
SWITCH_PORT(25, 26, qsgmii) | ||
SWITCH_PORT(26, 27, qsgmii) | ||
SWITCH_PORT(27, 28, qsgmii) | ||
|
||
port@28 { | ||
ethernet = <ðernet0>; | ||
reg = <28>; | ||
phy-mode = "internal"; | ||
fixed-link { | ||
speed = <1000>; | ||
full-duplex; | ||
}; | ||
}; | ||
}; | ||
}; |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,117 @@ | ||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT | ||
|
||
#include "rtl838x.dtsi" | ||
#include "rtl838x_hpe_1920.dtsi" | ||
|
||
/ { | ||
gpio1: rtl8231-gpio { | ||
compatible = "realtek,rtl8231-gpio"; | ||
#gpio-cells = <2>; | ||
gpio-controller; | ||
indirect-access-bus-id = <0>; | ||
}; | ||
|
||
i2c0: i2c-gpio-0 { | ||
compatible = "i2c-gpio"; | ||
sda-gpios = <&gpio1 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; | ||
scl-gpios = <&gpio1 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; | ||
i2c-gpio,delay-us = <2>; | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
}; | ||
|
||
sfp0: sfp-0 { | ||
compatible = "sff,sfp"; | ||
i2c-bus = <&i2c0>; | ||
los-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>; | ||
mod-def0-gpio = <&gpio1 21 GPIO_ACTIVE_LOW>; | ||
// tx-fault unconnected | ||
// tx-disable connected to RTL8214FC | ||
}; | ||
|
||
i2c1: i2c-gpio-1 { | ||
compatible = "i2c-gpio"; | ||
sda-gpios = <&gpio1 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; | ||
scl-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; | ||
i2c-gpio,delay-us = <2>; | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
}; | ||
|
||
sfp1: sfp-1 { | ||
compatible = "sff,sfp"; | ||
i2c-bus = <&i2c1>; | ||
los-gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>; | ||
mod-def0-gpio = <&gpio1 25 GPIO_ACTIVE_LOW>; | ||
// tx-fault unconnected | ||
// tx-disable connected to RTL8214FC | ||
}; | ||
|
||
i2c2: i2c-gpio-2 { | ||
compatible = "i2c-gpio"; | ||
sda-gpios = <&gpio1 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; | ||
scl-gpios = <&gpio1 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; | ||
i2c-gpio,delay-us = <2>; | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
}; | ||
|
||
sfp2: sfp-2 { | ||
compatible = "sff,sfp"; | ||
i2c-bus = <&i2c2>; | ||
los-gpio = <&gpio1 30 GPIO_ACTIVE_HIGH>; | ||
mod-def0-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>; | ||
// tx-fault unconnected | ||
// tx-disable connected to RTL8214FC | ||
}; | ||
|
||
i2c3: i2c-gpio-3 { | ||
compatible = "i2c-gpio"; | ||
sda-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; | ||
scl-gpios = <&gpio1 32 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; | ||
i2c-gpio,delay-us = <2>; | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
}; | ||
|
||
sfp3: sfp-3 { | ||
compatible = "sff,sfp"; | ||
i2c-bus = <&i2c3>; | ||
los-gpio = <&gpio1 34 GPIO_ACTIVE_HIGH>; | ||
mod-def0-gpio = <&gpio1 33 GPIO_ACTIVE_LOW>; | ||
// tx-fault unconnected | ||
// tx-disable connected to RTL8214FC | ||
}; | ||
}; | ||
|
||
ðernet0 { | ||
mdio: mdio-bus { | ||
compatible = "realtek,rtl838x-mdio"; | ||
regmap = <ðernet0>; | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
|
||
INTERNAL_PHY(8) | ||
INTERNAL_PHY(9) | ||
INTERNAL_PHY(10) | ||
INTERNAL_PHY(11) | ||
INTERNAL_PHY(12) | ||
INTERNAL_PHY(13) | ||
INTERNAL_PHY(14) | ||
INTERNAL_PHY(15) | ||
|
||
EXTERNAL_PHY(16) | ||
EXTERNAL_PHY(17) | ||
EXTERNAL_PHY(18) | ||
EXTERNAL_PHY(19) | ||
EXTERNAL_PHY(20) | ||
EXTERNAL_PHY(21) | ||
EXTERNAL_PHY(22) | ||
EXTERNAL_PHY(23) | ||
|
||
EXTERNAL_SFP_PHY_FULL(24, 0) | ||
EXTERNAL_SFP_PHY_FULL(25, 1) | ||
EXTERNAL_SFP_PHY_FULL(26, 2) | ||
EXTERNAL_SFP_PHY_FULL(27, 3) | ||
}; | ||
}; |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Oops, something went wrong.