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ath79: fix eth0 PLL registers on WD My Net Wi-Fi Range Extender
This replaces the register bits for RGMII delay on the MAC side in favor of having the RGMII delay on the PHY side by setting the phy-mode property to rgmii-id (RGMII internal delay), which is supported by the at803x driver. Speed 1000 is fixed as a result, so now all ethernet speeds function. Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-by: Michael Pratt <mcpratt@pm.me>
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