GitHub - n3nash/architecture-simulator: HPCA - Simulator which simulates the processor, cache, DRAM, branch predictors, virtual memory and simultaneous multithreading

n3nash / architecture-simulator Public

HPCA - Simulator which simulates the processor, cache, DRAM, branch predictors, virtual memory and simultaneous multithreading

Notifications

Name		Name	Last commit message	Last commit date
Latest commit History 1 Commit
all_knobs.cpp		all_knobs.cpp
all_knobs.h		all_knobs.h
bpred.cpp		bpred.cpp
bpred.h		bpred.h
cache.cpp		cache.cpp
cache.h		cache.h
common.h		common.h
knob.cpp		knob.cpp
knob.h		knob.h
makefile		makefile
memory.cpp		memory.cpp
memory.h		memory.h
sim.cpp		sim.cpp
sim.h		sim.h
sim_main.cpp		sim_main.cpp
trace.cpp		trace.cpp
trace.h		trace.h
vmem.cpp		vmem.cpp
vmem.h		vmem.h