Definitive fix for I2C and SPI on F7 MCU (#495)

* Work on I2C for STM32F7xx (added code to handle STM32F7xx MCU) * Definitive fix for I2C and SPI on STM32F7xx
nanoframework · Sep 10, 2017 · 9ae0943 · 9ae0943
1 parent 8c2141b
commit 9ae0943
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Showing 3 changed files with 12 additions and 2 deletions.
diff --git a/targets/CMSIS-OS/ChibiOS/ST_NUCLEO144_F746ZG/board.h b/targets/CMSIS-OS/ChibiOS/ST_NUCLEO144_F746ZG/board.h
@@ -1255,7 +1255,7 @@
  * PG14 - ARD_D1 USART6_TX          (input pullup).
  * PG15 - PIN15                     (input pullup).
  */
-#define VAL_GPIOG_MODER             (PIN_MODE_INPUT(GPIOG_ZIO_D65) |        \
+#define VAL_GPIOG_MODER             (PIN_MODE_OUTPUT(GPIOG_ZIO_D65) |        \
                                      PIN_MODE_OUTPUT(GPIOG_ZIO_D64) |        \
                                      PIN_MODE_INPUT(GPIOG_ZIO_D49) |        \
                                      PIN_MODE_INPUT(GPIOG_ZIO_D50) |        \
@@ -1287,7 +1287,7 @@
                                      PIN_OTYPE_PUSHPULL(GPIOG_RMII_TXD0) |  \
                                      PIN_OTYPE_PUSHPULL(GPIOG_ARD_D1) |     \
                                      PIN_OTYPE_PUSHPULL(GPIOG_PIN15))
-#define VAL_GPIOG_OSPEEDR           (PIN_OSPEED_VERYLOW(GPIOG_ZIO_D65) |    \
+#define VAL_GPIOG_OSPEEDR           (PIN_OSPEED_HIGH(GPIOG_ZIO_D65) |    \
                                      PIN_OSPEED_HIGH(GPIOG_ZIO_D64) |    \
                                      PIN_OSPEED_VERYLOW(GPIOG_ZIO_D49) |    \
                                      PIN_OSPEED_VERYLOW(GPIOG_ZIO_D50) |    \

diff --git a/.../ChibiOS/nanoCLR/Windows.Devices.I2c/win_dev_i2c_native_Windows_Devices_I2C_I2cDevice.cpp b/.../ChibiOS/nanoCLR/Windows.Devices.I2c/win_dev_i2c_native_Windows_Devices_I2C_I2cDevice.cpp
@@ -113,6 +113,7 @@ HRESULT Library_win_dev_i2c_native_Windows_Devices_I2c_I2cDevice::NativeTransmit
 {
     NANOCLR_HEADER();
     {
+
         unsigned char * writeData = NULL;
         unsigned char * readData = NULL;
         int writeSize = 0;
@@ -158,6 +159,9 @@ HRESULT Library_win_dev_i2c_native_Windows_Devices_I2c_I2cDevice::NativeTransmit
         // because the bus access is shared, acquire the appropriate bus
         i2cStart(cfg.Driver, &cfg.Configuration);
         i2cAcquireBus(cfg.Driver);
+#ifdef STM32F7xx_MCUCONF
+        SCB_CleanInvalidateDCache();
+#endif
         if (readSize != 0 && writeSize != 0)  // WriteRead
         {
             i2cStatus = i2cMasterTransmitTimeout(cfg.Driver, cfg.SlaveAddress, &writeData[0], writeSize, &readData[0], readSize, TIME_INFINITE);

diff --git a/.../ChibiOS/nanoCLR/Windows.Devices.Spi/win_dev_spi_native_Windows_Devices_Spi_SpiDevice.cpp b/.../ChibiOS/nanoCLR/Windows.Devices.Spi/win_dev_spi_native_Windows_Devices_Spi_SpiDevice.cpp
@@ -219,6 +219,9 @@ HRESULT Library_win_dev_spi_native_Windows_Devices_Spi_SpiDevice::NativeTransfer
         // Are we using SPI full-duplex for transfer ?
         bool fullDuplex = (bool)stack.Arg3().NumericByRef().u1;
 
+#ifdef STM32F7xx_MCUCONF
+        SCB_CleanInvalidateDCache();
+#endif
         if (writeSize != 0 && readSize != 0)
         {
             // Transmit+Receive
@@ -327,6 +330,9 @@ HRESULT Library_win_dev_spi_native_Windows_Devices_Spi_SpiDevice::NativeTransfer
         // Are we using SPI full-duplex for transfer ?
         bool fullDuplex = (bool)stack.Arg3().NumericByRef().u1;
 
+#ifdef STM32F7xx_MCUCONF
+        SCB_CleanInvalidateDCache();
+#endif
         if (writeSize != 0 && readSize != 0)
         {
             // Transmit+Receive