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net: ethernet: mtk_eth_soc: add support for Wireless Ethernet Dispatc…
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…h (WED)

The Wireless Ethernet Dispatch subsystem on the MT7622 SoC can be
configured to intercept and handle access to the DMA queues and
PCIe interrupts for a MT7615/MT7915 wireless card.
It can manage the internal WDMA (Wireless DMA) controller, which allows
ethernet packets to be passed from the packet switch engine (PSE) to the
wireless card, bypassing the CPU entirely.
This can be used to implement hardware flow offloading from ethernet to
WLAN.

Signed-off-by: Felix Fietkau <nbd@nbd.name>
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nbd168 committed Feb 11, 2022
1 parent 9d04ff4 commit b3eab9d
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Showing 10 changed files with 1,578 additions and 0 deletions.
4 changes: 4 additions & 0 deletions drivers/net/ethernet/mediatek/Kconfig
Expand Up @@ -7,6 +7,10 @@ config NET_VENDOR_MEDIATEK

if NET_VENDOR_MEDIATEK

config NET_MEDIATEK_SOC_WED
depends on ARCH_MEDIATEK || COMPILE_TEST
def_tristate NET_MEDIATEK_SOC

config NET_MEDIATEK_SOC
tristate "MediaTek SoC Gigabit Ethernet support"
depends on NET_DSA || !NET_DSA
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5 changes: 5 additions & 0 deletions drivers/net/ethernet/mediatek/Makefile
Expand Up @@ -5,4 +5,9 @@

obj-$(CONFIG_NET_MEDIATEK_SOC) += mtk_eth.o
mtk_eth-y := mtk_eth_soc.o mtk_sgmii.o mtk_eth_path.o mtk_ppe.o mtk_ppe_debugfs.o mtk_ppe_offload.o
mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed.o
ifdef CONFIG_DEBUG_FS
mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed_debugfs.o
endif
obj-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed_ops.o
obj-$(CONFIG_NET_MEDIATEK_STAR_EMAC) += mtk_star_emac.o
17 changes: 17 additions & 0 deletions drivers/net/ethernet/mediatek/mtk_eth_soc.c
Expand Up @@ -24,6 +24,7 @@
#include <net/dsa.h>

#include "mtk_eth_soc.h"
#include "mtk_wed.h"

static int mtk_msg_level = -1;
module_param_named(msg_level, mtk_msg_level, int, 0);
Expand Down Expand Up @@ -3170,6 +3171,22 @@ static int mtk_probe(struct platform_device *pdev)
}
}

for (i = 0;; i++) {
struct device_node *np = of_parse_phandle(pdev->dev.of_node,
"mediatek,wed", i);
static const u32 wdma_regs[] = {
MTK_WDMA0_BASE,
MTK_WDMA1_BASE
};
void __iomem *wdma;

if (!np || i >= ARRAY_SIZE(wdma_regs))
break;

wdma = eth->base + wdma_regs[i];
mtk_wed_add_hw(np, eth, wdma, i);
}

for (i = 0; i < 3; i++) {
if (MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_INT) && i > 0)
eth->irq[i] = eth->irq[0];
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3 changes: 3 additions & 0 deletions drivers/net/ethernet/mediatek/mtk_eth_soc.h
Expand Up @@ -295,6 +295,9 @@
#define MTK_GDM1_TX_GPCNT 0x2438
#define MTK_STAT_OFFSET 0x40

#define MTK_WDMA0_BASE 0x2800
#define MTK_WDMA1_BASE 0x2c00

/* QDMA descriptor txd4 */
#define TX_DMA_CHKSUM (0x7 << 29)
#define TX_DMA_TSO BIT(28)
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