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Haystack

Haystack is a collection of tools for the design and verification of asynchronous circuits. Not all of the tools are complete. Below lists the state of each tool:

  • [ 2%] chpsim is a simulator for Communicating Hardware Processes.
  • [ 50%] hseenc finds state space conflicts and helps to fix them with state variable assignments.
  • [100%] hseplot renders state graphs, petri nets, and signal transition graphs.
  • [100%] hsesim is a simulator for Handshaking Expansions which can efficiently elaborate the whole state space of a circuit for input to hseenc.
  • [100%] prsim is a simulator for Production Rules.
  • [100%] bubble for bubble reshuffling Production Rules.
  • [ 80%] gated a simple logic synthesis tool to convert arithmetic expressions to boolean logic.
  • [ 20%] prsize is an automatic sizing program for Production Rules.

License

Licensed by Cornell University under the MIT License.

Written by Ned Bingham. Copyright © 2020 Cornell University.

A copy of the MIT License may be found in COPYRIGHT.

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High Level Synthesis of Self Timed Circuits

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