Implement ARMv8 NEON (AdvSIMD) acceleration #5
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And use a wrapper function to allow cfg()ed early-return for dispatch
Currently using the "simple" movemask from https://branchfree.org/2019/04/01/fitting-my-head-through-the-arm-holes-or-two-sequences-to-substitute-for-the-missing-pmovmskb-instruction-on-arm-neon/ but it should be possible to try the "interleaved" one later. Benchmark results: on Cortex-A72 with a 541MB file, the speedup is 2.58x (1.721s to 0.662s).
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Hey, you did it! In record time, too! |
| // Bulk movemask as described in | ||
| // https://branchfree.org/2019/04/01/fitting-my-head-through-the-arm-holes-or-two-sequences-to-substitute-for-the-missing-pmovmskb-instruction-on-arm-neon/ | ||
| let mut matches = { | ||
| let bit_mask: uint8x16_t = std::mem::transmute([ |
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Do you want to hoist this out of the loop? Hopefully the compiler will detect it as a fixed value but with transmute it's possible it wouldn't. I haven't checked, though.
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Just checked, does not make a performance difference at all.
| let sum0 = vpaddq_u8(t0, t1); | ||
| let sum1 = vpaddq_u8(t2, t3); | ||
| let sum0 = vpaddq_u8(sum0, sum1); | ||
| let sum0 = vpaddq_u8(sum0, sum0); |
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It's annoying that this right here is why it's ARM64-only. vpadd_u8 (no q) is available on ARM but it's going to take a lot more operations to get the result that way and probably not worth it.
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Who would ever want to chew through huge log files and whatnot at SIMD speeds on old 32-bit junk anyway? :D
Minor update to fix documentation typo and to use a shorter version of the branchfree.org URL to prevent long lines (tested).
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Benchmark on Neoverse-N1 (AWS Graviton2), slightly larger log (564M): |
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That looks great. I think we can merge this now :) |
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@unrelentingtech I've added you to the new CONTRIBUTORS.md - please let me know if you want your name/initials/whatever in there alongside your GitHub handle. |
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:)