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BrianHG-DDR3-Controller
BrianHG-DDR3-Controller PublicForked from BrianHGinc/BrianHG-DDR3-Controller
DDR3 Controller v1.50, 16 read/write ports, configurable widths, priority, auto-burst size & smart cache for each port. Fully documented source code. TestBenches included. HDMI video controller inc…
SystemVerilog 3
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verilog-ethernet
verilog-ethernet PublicForked from alexforencich/verilog-ethernet
Verilog Ethernet components for FPGA implementation
Verilog 1
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