forked from steveicarus/iverilog
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netlist.h
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netlist.h
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#ifndef __netlist_H
#define __netlist_H
/*
* Copyright (c) 1998-2011 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
/*
* The netlist types, as described in this header file, are intended
* to be the output from elaboration of the source design. The design
* can be passed around in this form to the various stages and design
* processors.
*/
# include <string>
# include <map>
# include <list>
# include <vector>
# include <set>
# include <utility>
# include "ivl_target.h"
# include "ivl_target_priv.h"
# include "pform_types.h"
# include "config.h"
# include "verinum.h"
# include "verireal.h"
# include "StringHeap.h"
# include "HName.h"
# include "LineInfo.h"
# include "svector.h"
# include "Attrib.h"
# include "PUdp.h"
#ifdef HAVE_IOSFWD
# include <iosfwd>
#else
class ostream;
#endif
class Design;
class Link;
class Nexus;
class NetEvent;
class NetNet;
class NetNode;
class NetObj;
class NetPins;
class NetProc;
class NetProcTop;
class NetRelease;
class NetScope;
class NetEvProbe;
class NetExpr;
class NetEAccess;
class NetEConstEnum;
class NetESignal;
class NetFuncDef;
class NetRamDq;
class NetTaskDef;
class NetEvTrig;
class NetEvWait;
class PExpr;
class netenum_t;
struct target;
struct functor_t;
ostream& operator << (ostream&o, ivl_variable_type_t val);
extern void join_island(NetPins*obj);
class Link {
friend void connect(Link&, Link&);
friend class NetPins;
friend class Nexus;
public:
enum DIR { PASSIVE, INPUT, OUTPUT };
private: // Only NetPins can create/delete Link objects
Link();
~Link();
public:
// Manipulate the link direction.
void set_dir(DIR d);
DIR get_dir() const;
// Set the delay for all the drivers to this nexus.
void drivers_delays(NetExpr*rise, NetExpr*fall, NetExpr*decay);
// A link has a drive strength for 0 and 1 values. The drive0
// strength is for when the link has the value 0, and drive1
// strength is for when the link has a value 1.
void drive0(ivl_drive_t);
void drive1(ivl_drive_t);
// This sets the drives for all drivers of this link, and not
// just the current link.
void drivers_drive(ivl_drive_t d0, ivl_drive_t d1);
ivl_drive_t drive0() const;
ivl_drive_t drive1() const;
void cur_link(NetPins*&net, unsigned &pin);
void cur_link(const NetPins*&net, unsigned &pin) const;
// Get a pointer to the nexus that represents all the links
// connected to me.
Nexus* nexus();
const Nexus* nexus()const;
// Return a pointer to the next link in the nexus.
Link* next_nlink();
const Link* next_nlink() const;
// Remove this link from the set of connected pins. The
// destructor will automatically do this if needed.
void unlink();
// Return true if this link is connected to anything else.
bool is_linked() const;
// Return true if these pins are connected.
bool is_linked(const Link&that) const;
// Return true if this is the same pin of the same object of
// that link.
bool is_equal(const Link&that) const;
// Return information about the object that this link is
// a part of.
const NetPins*get_obj() const;
NetPins*get_obj();
unsigned get_pin() const;
private:
// The NetNode manages these. They point back to the
// NetNode so that following the links can get me here.
union {
NetPins *node_;
unsigned pin_;
};
bool pin_zero_ : 1;
DIR dir_ : 2;
ivl_drive_t drive0_ : 3;
ivl_drive_t drive1_ : 3;
private:
Nexus* find_nexus_() const;
private:
// The Nexus uses these to maintain its list of Link
// objects. If this link is not connected to anything,
// then these pointers are both nil.
Link *next_;
Nexus*nexus_;
private: // not implemented
Link(const Link&);
Link& operator= (const Link&);
};
class NetPins : public LineInfo {
public:
explicit NetPins(unsigned npins);
virtual ~NetPins();
unsigned pin_count() const { return npins_; }
Link&pin(unsigned idx);
const Link&pin(unsigned idx) const;
void dump_node_pins(ostream&, unsigned, const char**pin_names =0) const;
void set_default_dir(Link::DIR d);
bool is_linked();
bool pins_are_virtual(void) const;
void devirtualize_pins(void);
private:
Link*pins_;
const unsigned npins_;
Link::DIR default_dir_;
};
/* =========
* A NetObj is anything that has any kind of behavior in the
* netlist. Nodes can be gates, registers, etc. and are linked
* together to form a design web.
*
* The web of nodes that makes up a circuit is held together by the
* Link class. There is a link for each pin. All mutually connected
* pins form a ring of links.
*
* A link can be INPUT, OUTPUT or PASSIVE. An input never drives the
* signal, and PASSIVE never receives the value of the signal. Wires
* are PASSIVE, for example.
*
* A NetObj also has delays specified as rise_time, fall_time and
* decay_time. The rise and fall time are the times to transition to 1
* or 0 values. The decay_time is the time needed to decay to a 'bz
* value, or to decay of the net is a trireg. The exact and precise
* interpretation of the rise/fall/decay times is typically left to
* the target to properly interpret.
*/
class NetObj : public NetPins, public Attrib {
public:
public:
// The name of the object must be a permallocated string. A
// lex_strings string, for example.
explicit NetObj(NetScope*s, perm_string n, unsigned npins);
virtual ~NetObj();
NetScope* scope();
const NetScope* scope() const;
perm_string name() const { return name_; }
const NetExpr* rise_time() const { return delay1_; }
const NetExpr* fall_time() const { return delay2_; }
const NetExpr* decay_time() const { return delay3_; }
void rise_time(const NetExpr* d) { delay1_ = d; }
void fall_time(const NetExpr* d) { delay2_ = d; }
void decay_time(const NetExpr* d) { delay3_ = d; }
void dump_obj_attr(ostream&, unsigned) const;
private:
NetScope*scope_;
perm_string name_;
const NetExpr* delay1_;
const NetExpr* delay2_;
const NetExpr* delay3_;
};
/*
* Objects that can be island branches are derived from this. (It is
* possible for an object to be a NetObj and an IslandBranch.) This is
* used to collect island information about the node.
*/
class IslandBranch {
public:
IslandBranch(ivl_discipline_t dis =0) : island_(0), discipline_(dis) { }
ivl_island_t get_island() const { return island_; }
friend void join_island(NetPins*);
private:
ivl_island_t island_;
ivl_discipline_t discipline_;
};
/*
* A NetBranch is a construct of Verilog-A that is a branch between
* two nodes. The branch has exactly 2 pins and a discipline.
*
* pin(0) is the source of flow through a branch and the plus side of
* potential. Pin(1) is the sink of flow and the minus (or ground) of
* potential.
*/
class NetBranch : public NetPins, public IslandBranch {
public:
explicit NetBranch(ivl_discipline_t dis);
explicit NetBranch(ivl_discipline_t dis, perm_string name);
~NetBranch();
// If the branch is named, this returns the name.
perm_string name() const { return name_; }
ivl_branch_s* target_obj() const { return &target_obj_; }
void dump(ostream&, unsigned) const;
private:
perm_string name_;
mutable ivl_branch_s target_obj_;
// The design class uses this member to list the branches.
friend class Design;
NetBranch*next_;
};
/*
* The Nexus represents a collection of links that are joined
* together. Each link has its own properties, this class holds the
* properties of the group.
*
* The links in a nexus are grouped into a circularly linked list,
* with the nexus pointing to the last Link. Each link in turn points
* to the next link in the nexus, with the last link pointing back to
* the first. The last link also has a non-nil nexus_ pointer back to
* this nexus.
*
* The t_cookie() is an ivl_nexus_t that the code generator uses to
* store data in the nexus. When a Nexus is created, this cookie is
* set to nil. The code generator may set the cookie once. This locks
* the nexus, and rewrites the Link list to be optimal for the code
* generator. In the process, *all* of the other methods are no longer
* functional.
*/
class Nexus {
friend void connect(Link&, Link&);
friend class Link;
private:
// Only Link objects can create (or delete) Nexus objects
explicit Nexus(Link&r);
~Nexus();
public:
void connect(Link&r);
const char* name() const;
void drivers_delays(NetExpr*rise, NetExpr*fall, NetExpr*decay);
void drivers_drive(ivl_drive_t d0, ivl_drive_t d1);
Link*first_nlink();
const Link* first_nlink()const;
/* Get the width of the Nexus, or 0 if there are no vectors
(in the form of NetNet objects) linked. */
unsigned vector_width() const;
NetNet* pick_any_net();
/* This method counts the number of input and output links for
this nexus, and assigns the results to the output arguments. */
void count_io(unsigned&inp, unsigned&out) const;
/* This method returns true if there are any assignments that
use this nexus as an l-value. This can be true if the nexus
is a variable, but also if this is a net with a force. */
bool assign_lval() const;
/* This method returns true if there are any drivers
(including variables) attached to this nexus. */
bool drivers_present() const;
/* This method returns true if all the possible drivers of
this nexus are constant. It will also return true if there
are no drivers at all. */
bool drivers_constant() const;
/* Given the nexus has constant drivers, this method returns
the value that has been driven. */
verinum::V driven_value() const;
/* The code generator sets an ivl_nexus_t to attach code
generation details to the nexus. */
ivl_nexus_t t_cookie() const { return t_cookie_; }
void t_cookie(ivl_nexus_t) const;
private:
Link*list_;
void unlink(Link*);
mutable char* name_; /* Cache the calculated name for the Nexus. */
mutable ivl_nexus_t t_cookie_;
enum VALUE { NO_GUESS, V0, V1, Vx, Vz, VAR };
mutable VALUE driven_;
private: // not implemented
Nexus(const Nexus&);
Nexus& operator= (const Nexus&);
};
inline void connect(Nexus*l, Link&r) { l->connect(r); }
class NexusSet {
public:
~NexusSet();
NexusSet();
unsigned count() const;
// Add the nexus to the set, if it is not already present.
void add(Nexus*that);
void add(const NexusSet&that);
// Remove the nexus from the set, if it is present.
void rem(Nexus*that);
void rem(const NexusSet&that);
Nexus* operator[] (unsigned idx) const;
// Return true if this set contains every nexus in that set.
bool contains(const NexusSet&that) const;
// Return true if this set contains any nexus in that set.
bool intersect(const NexusSet&that) const;
private:
Nexus**items_;
unsigned nitems_;
unsigned bsearch_(Nexus*that) const;
private: // not implemented
NexusSet(const NexusSet&);
NexusSet& operator= (const NexusSet&);
};
/*
* A NetBus is a transparent device that is merely a bunch of pins
* used to tie some pins to. It is a convenient way to collect a
* bundle of pins and pass that bundle around.
*/
class NetBus : public NetObj {
public:
NetBus(NetScope*scope, unsigned pin_count);
~NetBus();
private: // not implemented
NetBus(const NetBus&);
NetBus& operator= (const NetBus&);
};
/*
* A NetNode is a device of some sort, where each pin has a different
* meaning. (i.e., pin(0) is the output to an and gate.) NetNode
* objects are listed in the nodes_ of the Design object.
*/
class NetNode : public NetObj {
public:
// The name parameter must be a permallocated string.
explicit NetNode(NetScope*s, perm_string n, unsigned npins);
virtual ~NetNode();
virtual bool emit_node(struct target_t*) const;
virtual void dump_node(ostream&, unsigned) const;
// This is used to scan a modifiable netlist, one node at a time.
virtual void functor_node(Design*, functor_t*);
private:
friend class Design;
NetNode*node_next_, *node_prev_;
Design*design_;
};
/*
* A NetDelaySrc is an input-only device that calculates a path delay
* based on the time that the inputs change. This class is used by the
* NetNet class, and NetDelaySrc objects cannot exist outside of its
* association with NetNet objects.
*/
class NetDelaySrc : public NetObj {
public:
explicit NetDelaySrc(NetScope*s, perm_string n, unsigned nsrc,
bool condit_src, bool conditional);
~NetDelaySrc();
// These functions set the delays from the values in the
// source. These set_delays functions implement the various
// rules wrt collections of transitions.
// One transition specified.
void set_delays(uint64_t del);
// Two transitions: rise and fall
void set_delays(uint64_t rise, uint64_t fall);
// Three transitions
void set_delays(uint64_t rise, uint64_t fall, uint64_t tz);
void set_delays(uint64_t t01, uint64_t t10, uint64_t t0z,
uint64_t tz1, uint64_t t1z, uint64_t tz0);
void set_delays(uint64_t t01, uint64_t t10, uint64_t t0z,
uint64_t tz1, uint64_t t1z, uint64_t tz0,
uint64_t t0x, uint64_t tx1, uint64_t t1x,
uint64_t tx0, uint64_t txz, uint64_t tzx);
uint64_t get_delay(unsigned pe) const;
void set_posedge();
void set_negedge();
bool is_posedge() const;
bool is_negedge() const;
unsigned src_count() const;
Link&src_pin(unsigned);
const Link&src_pin(unsigned) const;
bool is_condit() const;
bool has_condit() const;
Link&condit_pin();
const Link&condit_pin() const;
void dump(ostream&, unsigned ind) const;
private:
uint64_t transition_delays_[12];
bool condit_flag_;
bool conditional_;
bool posedge_;
bool negedge_;
private: // Not implemented
NetDelaySrc(const NetDelaySrc&);
NetDelaySrc& operator= (const NetDelaySrc&);
};
/*
* NetNet is a special kind of NetObj that doesn't really do anything,
* but carries the properties of the wire/reg/trireg, including its
* name. Scalars and vectors are all the same thing here, a NetNet
* with a single pin. The difference between a scalar and vector is
* the width of the atomic vector datum it carries.
*
* NetNet objects can also appear as side effects of synthesis or
* other abstractions.
*
* Note that INTEGER types are an alias for a ``reg signed [31:0]''.
*
* NetNet objects have a name and exist within a scope, so the
* constructor takes a pointer to the containing scope. The object
* automatically adds itself to the scope.
*
* NetNet objects are located by searching NetScope objects.
*
* The pin of a NetNet object are PASSIVE: they do not drive
* anything and they are not a data sink, per se. The pins follow the
* values on the nexus.
*/
class NetNet : public NetObj {
public:
enum Type { NONE, IMPLICIT, IMPLICIT_REG, INTEGER, WIRE, TRI, TRI1,
SUPPLY0, SUPPLY1, WAND, TRIAND, TRI0, WOR, TRIOR, REG,
UNRESOLVED_WIRE };
enum PortType { NOT_A_PORT, PIMPLICIT, PINPUT, POUTPUT, PINOUT };
// The width in this case is a shorthand for ms=width-1 and
// ls=0. Only one pin is created, the width is of the vector
// that passed through.
explicit NetNet(NetScope*s, perm_string n, Type t, unsigned width =1);
// This form supports an array of vectors. The [ms:ls] define
// the base vector, and the [s0:e0] define the array
// dimensions. If s0==e0, then this is not an array after
// all.
explicit NetNet(NetScope*s, perm_string n, Type t,
long ms, long ls);
explicit NetNet(NetScope*s, perm_string n, Type t,
long ms, long ls, long s0, long e0);
virtual ~NetNet();
Type type() const;
void type(Type t);
PortType port_type() const;
void port_type(PortType t);
ivl_variable_type_t data_type() const;
void data_type(ivl_variable_type_t t);
/* If a NetNet is signed, then its value is to be treated as
signed. Otherwise, it is unsigned. */
bool get_signed() const;
void set_signed(bool);
/* Used to maintain original type of net since integers are
implemented as 'reg signed [31:0]' in Icarus */
bool get_isint() const;
void set_isint(bool);
bool get_scalar() const;
void set_scalar(bool);
void set_enumeration(netenum_t*enum_set);
netenum_t*enumeration(void) const;
/* Attach a discipline to the net. */
ivl_discipline_t get_discipline() const;
void set_discipline(ivl_discipline_t dis);
/* These methods return the msb and lsb indices for the most
significant and least significant bits. These are signed
longs, and may be different from pin numbers. For example,
reg [1:8] has 8 bits, msb==1 and lsb==8. */
long msb() const;
long lsb() const;
unsigned long vector_width() const;
/* This method converts a signed index (the type that might be
found in the Verilog source) to a pin number. It accounts
for variation in the definition of the reg/wire/whatever. */
long sb_to_idx(long sb) const;
/* This method checks that the signed index is valid for this
signal. If it is, the above sb_to_idx can be used to get
the pin# from the index. */
bool sb_is_valid(long sb) const;
/* This method returns 0 for scalars and vectors, and greater
for arrays. The value is the number of array
indices. (Currently only one array index is supported.) */
unsigned array_dimensions() const;
long array_first() const;
bool array_addr_swapped() const;
// This is the number of array elements.
unsigned array_count() const;
// This method returns a 0 based address of an array entry as
// indexed by idx. The Verilog source may give index ranges
// that are not zero based.
bool array_index_is_valid(long idx) const;
unsigned array_index_to_address(long idx) const;
bool local_flag() const { return local_flag_; }
void local_flag(bool f) { local_flag_ = f; }
/* NetESignal objects may reference this object. Keep a
reference count so that I keep track of them. */
void incr_eref();
void decr_eref();
unsigned peek_eref() const;
/* Assignment statements count their lrefs here. */
void incr_lref();
void decr_lref();
unsigned peek_lref() const { return lref_count_; }
unsigned get_refs() const;
/* Manage path delays */
void add_delay_path(class NetDelaySrc*path);
unsigned delay_paths(void) const;
const class NetDelaySrc*delay_path(unsigned idx) const;
virtual void dump_net(ostream&, unsigned) const;
private:
void initialize_dir_(Link::DIR dir);
private:
Type type_ : 5;
PortType port_type_ : 3;
ivl_variable_type_t data_type_ : 3;
bool signed_ : 1;
bool isint_ : 1; // original type of integer
bool is_scalar_ : 1;
bool local_flag_: 1;
netenum_t*enumeration_;
ivl_discipline_t discipline_;
long msb_, lsb_;
const unsigned dimensions_;
long s0_, e0_;
unsigned eref_count_;
unsigned lref_count_;
vector<class NetDelaySrc*> delay_paths_;
};
/*
* This object type is used to contain a logical scope within a
* design. The scope doesn't represent any executable hardware, but is
* just a handle that netlist processors can use to grab at the design.
*/
class NetScope : public Attrib {
public:
enum TYPE { MODULE, TASK, FUNC, BEGIN_END, FORK_JOIN, GENBLOCK };
/* Create a new scope, and attach it to the given parent. The
name is expected to have been permallocated. */
NetScope(NetScope*up, const hname_t&name, TYPE t);
~NetScope();
/* Rename the scope using the name generated by inserting as
many pad characters as required between prefix and suffix
to make the name unique in the parent scope. Return false
if a unique name couldn't be generated. */
bool auto_name(const char* prefix, char pad, const char* suffix);
/* Parameters exist within a scope, and these methods allow
one to manipulate the set. In these cases, the name is the
*simple* name of the parameter, the hierarchy is implicit in
the scope. The return value from set_parameter is the
previous expression, if there was one. */
struct range_t;
void set_parameter(perm_string name, PExpr*val,
ivl_variable_type_t type,
PExpr*msb, PExpr*lsb, bool signed_flag,
NetScope::range_t*range_list,
const LineInfo&file_line);
NetExpr* set_localparam(perm_string name, NetExpr*val,
const LineInfo&file_line);
const NetExpr*get_parameter(Design*des,
const char* name,
const NetExpr*&msb,
const NetExpr*&lsb);
const NetExpr*get_parameter(Design*des,
perm_string name,
const NetExpr*&msb,
const NetExpr*&lsb);
/* These are used by defparam elaboration to replace the
expression with a new expression, without affecting the
range or signed_flag. Return false if the name does not
exist. */
bool replace_parameter(perm_string name, PExpr*val, NetScope*scope);
/* These methods set or access events that live in this
scope. */
void add_event(NetEvent*);
void rem_event(NetEvent*);
NetEvent*find_event(perm_string name);
/* These methods add or find a genvar that lives in this scope. */
void add_genvar(perm_string name, LineInfo *li);
LineInfo* find_genvar(perm_string name);
/* These methods manage signals. The add_ and rem_signal
methods are used by the NetNet objects to make themselves
available to the scope, and the find_signal method can be
used to locate signals within a scope. */
void add_signal(NetNet*);
void rem_signal(NetNet*);
NetNet* find_signal(perm_string name);
void add_enumeration_set(netenum_t*enum_set);
bool add_enumeration_name(netenum_t*enum_set, perm_string enum_name);
netenum_t* enumeration_for_name(perm_string name);
/* The parent and child() methods allow users of NetScope
objects to locate nearby scopes. */
NetScope* parent() { return up_; }
NetScope* child(const hname_t&name);
const NetScope* parent() const { return up_; }
const NetScope* child(const hname_t&name) const;
TYPE type() const;
void print_type(ostream&) const;
void set_task_def(NetTaskDef*);
void set_func_def(NetFuncDef*);
void set_module_name(perm_string);
NetTaskDef* task_def();
NetFuncDef* func_def();
void set_line(perm_string file, perm_string def_file,
unsigned lineno, unsigned def_lineno);
void set_line(perm_string file, unsigned lineno);
void set_line(const LineInfo *info);
perm_string get_file() const { return file_; };
perm_string get_def_file() const { return def_file_; };
unsigned get_lineno() const { return lineno_; };
unsigned get_def_lineno() const { return def_lineno_; };
bool in_func() const;
/* Is the task or function automatic. */
void is_auto(bool is_auto__) { is_auto_ = is_auto__; };
bool is_auto() const { return is_auto_; };
/* Is the module a cell (is in a `celldefine) */
void is_cell(bool is_cell__) { is_cell_ = is_cell__; };
bool is_cell() const { return is_cell_; };
const NetTaskDef* task_def() const;
const NetFuncDef* func_def() const;
/* If the scope represents a module instance, the module_name
is the name of the module itself. */
perm_string module_name() const;
/* If the scope is a module then it may have ports that we need
* to keep track of. */
void add_module_port(NetNet*port);
unsigned module_ports() const;
NetNet*module_port(unsigned idx) const;
/* Scopes have their own time units and time precision. The
unit and precision are given as power of 10, i.e., -3 is
units of milliseconds.
If a NetScope is created with a parent scope, the new scope
will initially inherit the unit and precision of the
parent scope. */
void time_unit(int);
void time_precision(int);
void time_from_timescale(bool);
int time_unit() const;
int time_precision() const;
bool time_from_timescale() const;
/* The fullname of the scope is the hierarchical name
component (which includes the name and array index) whereas
the basename is just my name. */
perm_string basename() const;
const hname_t& fullname() const { return name_; }
void run_defparams(class Design*);
void run_defparams_later(class Design*);
void evaluate_parameters(class Design*);
// Look for defparams that never matched, and print warnings.
void residual_defparams(class Design*);
/* This method generates a non-hierarchical name that is
guaranteed to be unique within this scope. */
perm_string local_symbol();
void dump(ostream&) const;
void emit_scope(struct target_t*tgt) const;
bool emit_defs(struct target_t*tgt) const;
/* This method runs the functor on me. Recurse through the
children of this node as well. */
void run_functor(Design*des, functor_t*fun);
/* This member is used during elaboration to pass defparam
assignments from the scope pass to the parameter evaluation
step. After that, it is not used. */
list<pair<pform_name_t,PExpr*> > defparams;
list<pair<list<hname_t>,PExpr*> > defparams_later;
public:
struct range_t {
bool exclude_flag;
// Lower bound
bool low_open_flag;
NetExpr*low_expr;
// Upper bound
bool high_open_flag;
NetExpr*high_expr;
// Link to the next range specification
struct range_t*next;
};
/* After everything is all set up, the code generators like
access to these things to make up the parameter lists. */
struct param_expr_t : public LineInfo {
param_expr_t() : msb_expr(0), lsb_expr(0), val_expr(0), val_scope(0),
solving(false), type(IVL_VT_NO_TYPE), signed_flag(false),
msb(0), lsb(0), range(0), val(0) { }
// Source expressions
PExpr*msb_expr;
PExpr*lsb_expr;
PExpr*val_expr;
// Scope information
NetScope*val_scope;
// Evaluation status
bool solving;
// Type information
ivl_variable_type_t type;
bool signed_flag;
NetExpr*msb;
NetExpr*lsb;
// range constraints
struct range_t*range;
// Expression value
NetExpr*val;
};
map<perm_string,param_expr_t>parameters;
map<perm_string,param_expr_t>localparams;
typedef map<perm_string,param_expr_t>::iterator param_ref_t;
param_ref_t find_parameter(perm_string name);
struct spec_val_t {
ivl_variable_type_t type;
union {
double real_val; // type == IVL_VT_REAL
long integer; // type == IVL_VT_BOOL
};
};
map<perm_string,spec_val_t>specparams;
/* Module instance arrays are collected here for access during
the multiple elaboration passes. */
typedef vector<NetScope*> scope_vec_t;
map<perm_string, scope_vec_t>instance_arrays;
/* Loop generate uses this as scratch space during
elaboration. Expression evaluation can use this to match
names. */
perm_string genvar_tmp;
long genvar_tmp_val;
private:
void evaluate_parameter_logic_(Design*des, param_ref_t cur);
void evaluate_parameter_real_(Design*des, param_ref_t cur);
void evaluate_parameter_(Design*des, param_ref_t cur);
private:
TYPE type_;
hname_t name_;
perm_string file_;
perm_string def_file_;
unsigned lineno_;
unsigned def_lineno_;
signed char time_unit_, time_prec_;
bool time_from_timescale_;
NetEvent *events_;
map<perm_string,LineInfo*> genvars_;
typedef std::map<perm_string,NetNet*>::const_iterator signals_map_iter_t;
std::map <perm_string,NetNet*> signals_map_;
perm_string module_name_;
vector<NetNet*>ports_;
union {
NetTaskDef*task_;
NetFuncDef*func_;
};
// Enumerations. The enum_sets_ is a list of all the
// enumerations present in this scope. The enum_names_ is a
// map of all the enumeration names back to the sets that
// contain them.
std::list<netenum_t*> enum_sets_;
std::map<perm_string,NetEConstEnum*> enum_names_;
NetScope*up_;
map<hname_t,NetScope*> children_;
unsigned lcounter_;
bool is_auto_, is_cell_;
};
/*
* This class implements the LPM_ABS component. The node has a single
* input, a signed expression, that it converts to the absolute
* value. The gate is simple: pin(0) is the output and pin(1) is the input.
*/
class NetAbs : public NetNode {
public:
NetAbs(NetScope*s, perm_string n, unsigned width);
~NetAbs();
unsigned width() const;
virtual void dump_node(ostream&, unsigned ind) const;
virtual bool emit_node(struct target_t*) const;
virtual void functor_node(Design*des, functor_t*fun);
private:
unsigned width_;
};
/*
* This class implements the LPM_ADD_SUB component as described in the
* EDIF LPM Version 2 1 0 standard. It is used as a structural
* implementation of the + and - operators.
*/
class NetAddSub : public NetNode {
public: