feat(hal/imx8mn): added support to disable mmu and i+d caches to usdh…

…c2 driver

README.md

@@ -36,7 +36,9 @@ You can read the book for <a href="https://nihalpasham.github.io/rustBoot-book/i
 
 ## Acknowledgment: 
 
-rustBoot exists as we could not find a suitable (open-source) option that meets our security goals. It is the result of an exhaustive evaluation of 'pretty much' the entire embedded-bootloader landscape. Having said that, it does take inspiration from similar projects (such as u-boot, zephyr, mcuboot, coreboot, wolfBoot etc). However, the key differentiator is security-above-all-else. To that extent, its built entirely in rust, takes full advantage of rust's memory safety guarantees while leveraging safer parsing libraries, compile-time state-transition checks coupled with (safe) community sourced rust-crates (such as boards, HALs drivers etc.)
+rustBoot exists as we could not find a suitable (open-source) option that meets our security goals. It is the result of an exhaustive evaluation of 'pretty much' the entire embedded-bootloader landscape. 
+
+Having said that, it does take inspiration from similar projects (such as u-boot, zephyr, mcuboot, coreboot, wolfBoot etc). However, the key differentiator is security-above-all-else. To that extent, its built entirely in rust, takes full advantage of rust's memory safety guarantees while leveraging safer parsing libraries, compile-time state-transition checks coupled with (safe) community sourced rust-crates (such as boards, HALs drivers etc.)
 
 ## Support:
 

boards/bootloaders/imx8mn/src/boot.rs

@@ -4,9 +4,9 @@ use core::arch::global_asm;
 
 use crate::kernel_init;
 use crate::{
-    clocks, exception,
+    clocks, exception, memory,
     mux::{uart2grp::uart2_mux_mmio_set, usdhc2grp::usdhc2_mux_mmio_set},
-    start_system_counter,
+    start_system_counter, sys_clocks_init,
 };
 
 // Assembly counterpart to this file.
@@ -18,27 +18,19 @@ global_asm!(include_str!("entry.s"));
 ///
 #[no_mangle]
 pub unsafe extern "C" fn _start_rust() -> ! {
+    // disable mmu, i and d caching
+    memory::mmu::mmu().disable_mmu_and_caching();
     // set the vector base address for excpetion handlers
     exception::exception::handling_init();
-    // enable Uart and uSDHC clock and ungate sys_counter clock
-    unsafe {
-        ::core::ptr::write_volatile((0x30384004 + (0x10*11)) as *mut u32, 0x3);
-        ::core::ptr::write_volatile((0x30384004 + (0x10*12)) as *mut u32, 0x3);
-        ::core::ptr::write_volatile((0x30384004 + (0x10*13)) as *mut u32, 0x3);
-        ::core::ptr::write_volatile((0x30384004 + (0x10*14)) as *mut u32, 0x3);
-        ::core::ptr::write_volatile((0x30384004 + (0x10*15)) as *mut u32, 0x3);
-
-        ::core::ptr::write_volatile((0x30384004 + (0x10*27)) as *mut u32, 0x3);
-        ::core::ptr::write_volatile((0x30384004 + (0x10*28)) as *mut u32, 0x3);
-        ::core::ptr::write_volatile((0x30384004 + (0x10*29)) as *mut u32, 0x3);
-        ::core::ptr::write_volatile((0x30384004 + (0x10*30)) as *mut u32, 0x3);
-        ::core::ptr::write_volatile((0x30384004 + (0x10*31)) as *mut u32, 0x3);
-    }
-    clocks::uartclks::enable_uart_clk(1);
-    clocks::usdhcclks::enable_usdhc_clk(2);
+    // ungate sys_counter clock
     clocks::scntrclk::enable_sctr();
     // start the system counter, this allows us to access ARM's architectural counter - CNTPCT_EL0
     start_system_counter();
+    // initialize system clocks
+    sys_clocks_init();
+    // enable Uart and uSDHC clock 
+    clocks::uartclks::enable_uart_clk(1);
+    clocks::usdhcclks::enable_usdhc_clk(2);
     // set mux state for UART2 and uSDHC2 peripherals.
     uart2_mux_mmio_set();
     usdhc2_mux_mmio_set();

boards/bootloaders/imx8mn/src/main.rs

@@ -12,11 +12,12 @@ use rustBoot_hal::nxp::imx8mn::bsp::{
     clocks,
     drivers::{
         common::interface::DriverManager,
-        driver_manager::{driver_manager, start_system_counter},
+        driver_manager::{driver_manager, start_system_counter, sys_clocks_init},
     },
     global, mux,
 };
 use rustBoot_hal::nxp::imx8mn::{
+    memory,
     exception,
     log::{console, console::Statistics},
 };
@@ -69,5 +70,10 @@ fn kernel_main() -> ! {
         _ => info!("failed to initialize"),
     }
 
+    // info!("");
+    // info!("Trying to read from address 8 GiB...");
+    // let mut big_addr: u64 = 8 * 1024 * 1024 * 1024;
+    // unsafe { core::ptr::read_volatile(big_addr as *mut u64) };
+
     wait_forever()
 }

boards/hal/src/nxp/imx8mn/aarch64-cpu/src/registers.rs

@@ -47,6 +47,7 @@ mod id_aa64mmfr2_el1;
 mod lr;
 mod mair_el1;
 mod mair_el2;
+mod mair_el3;
 mod mdccsr_el0;
 mod midr_el1;
 mod mpidr_el1;
@@ -123,6 +124,7 @@ pub use id_aa64mmfr2_el1::ID_AA64MMFR2_EL1;
 pub use lr::LR;
 pub use mair_el1::MAIR_EL1;
 pub use mair_el2::MAIR_EL2;
+pub use mair_el3::MAIR_EL3;
 pub use mdccsr_el0::MDCCSR_EL0;
 pub use midr_el1::MIDR_EL1;
 pub use mpidr_el1::MPIDR_EL1;