[test][Transform/Utils] Update tests to opaque pointer syntax. NFC

This patch converts test cases that simly could be rewritten
using the script at
https://gist.github.com/nikic/98357b71fd67756b0f064c9517b62a34

llvm/test/Transforms/Util/PredicateInfo/condprop.ll

@@ -1,40 +1,40 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -passes=print-predicateinfo -disable-output < %s 2>&1 | FileCheck %s
 
-@a = external global i32		; <i32*> [#uses=7]
+@a = external global i32		; <ptr> [#uses=7]
 
 define i32 @test1() nounwind {
 ; CHECK-LABEL: @test1(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @a, align 4
+; CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr @a, align 4
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 4
 ; CHECK-NEXT:    br i1 [[TMP1]], label [[BB:%.*]], label [[BB1:%.*]]
 ; CHECK:       bb:
 ; CHECK-NEXT:    br label [[BB8:%.*]]
 ; CHECK:       bb1:
-; CHECK-NEXT:    [[TMP2:%.*]] = load i32, i32* @a, align 4
+; CHECK-NEXT:    [[TMP2:%.*]] = load i32, ptr @a, align 4
 ; CHECK-NEXT:    [[TMP3:%.*]] = icmp eq i32 [[TMP2]], 5
 ; CHECK-NEXT:    br i1 [[TMP3]], label [[BB2:%.*]], label [[BB3:%.*]]
 ; CHECK:       bb2:
 ; CHECK-NEXT:    br label [[BB8]]
 ; CHECK:       bb3:
-; CHECK-NEXT:    [[TMP4:%.*]] = load i32, i32* @a, align 4
+; CHECK-NEXT:    [[TMP4:%.*]] = load i32, ptr @a, align 4
 ; CHECK-NEXT:    [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 4
 ; CHECK-NEXT:    br i1 [[TMP5]], label [[BB4:%.*]], label [[BB5:%.*]]
 ; CHECK:       bb4:
-; CHECK-NEXT:    [[TMP6:%.*]] = load i32, i32* @a, align 4
+; CHECK-NEXT:    [[TMP6:%.*]] = load i32, ptr @a, align 4
 ; CHECK-NEXT:    [[TMP7:%.*]] = add i32 [[TMP6]], 5
 ; CHECK-NEXT:    br label [[BB8]]
 ; CHECK:       bb5:
-; CHECK-NEXT:    [[TMP8:%.*]] = load i32, i32* @a, align 4
+; CHECK-NEXT:    [[TMP8:%.*]] = load i32, ptr @a, align 4
 ; CHECK-NEXT:    [[TMP9:%.*]] = icmp eq i32 [[TMP8]], 5
 ; CHECK-NEXT:    br i1 [[TMP9]], label [[BB6:%.*]], label [[BB7:%.*]]
 ; CHECK:       bb6:
-; CHECK-NEXT:    [[TMP10:%.*]] = load i32, i32* @a, align 4
+; CHECK-NEXT:    [[TMP10:%.*]] = load i32, ptr @a, align 4
 ; CHECK-NEXT:    [[TMP11:%.*]] = add i32 [[TMP10]], 4
 ; CHECK-NEXT:    br label [[BB8]]
 ; CHECK:       bb7:
-; CHECK-NEXT:    [[TMP12:%.*]] = load i32, i32* @a, align 4
+; CHECK-NEXT:    [[TMP12:%.*]] = load i32, ptr @a, align 4
 ; CHECK-NEXT:    br label [[BB8]]
 ; CHECK:       bb8:
 ; CHECK-NEXT:    [[DOT0:%.*]] = phi i32 [ [[TMP12]], [[BB7]] ], [ [[TMP11]], [[BB6]] ], [ [[TMP7]], [[BB4]] ], [ 4, [[BB2]] ], [ 5, [[BB]] ]
@@ -43,43 +43,43 @@ define i32 @test1() nounwind {
 ; CHECK-NEXT:    ret i32 [[DOT0]]
 ;
 entry:
-  %0 = load i32, i32* @a, align 4
+  %0 = load i32, ptr @a, align 4
   %1 = icmp eq i32 %0, 4
   br i1 %1, label %bb, label %bb1
 
 bb:		; preds = %entry
   br label %bb8
 
 bb1:		; preds = %entry
-  %2 = load i32, i32* @a, align 4
+  %2 = load i32, ptr @a, align 4
   %3 = icmp eq i32 %2, 5
   br i1 %3, label %bb2, label %bb3
 
 bb2:		; preds = %bb1
   br label %bb8
 
 bb3:		; preds = %bb1
-  %4 = load i32, i32* @a, align 4
+  %4 = load i32, ptr @a, align 4
   %5 = icmp eq i32 %4, 4
   br i1 %5, label %bb4, label %bb5
 
 bb4:		; preds = %bb3
-  %6 = load i32, i32* @a, align 4
+  %6 = load i32, ptr @a, align 4
   %7 = add i32 %6, 5
   br label %bb8
 
 bb5:		; preds = %bb3
-  %8 = load i32, i32* @a, align 4
+  %8 = load i32, ptr @a, align 4
   %9 = icmp eq i32 %8, 5
   br i1 %9, label %bb6, label %bb7
 
 bb6:		; preds = %bb5
-  %10 = load i32, i32* @a, align 4
+  %10 = load i32, ptr @a, align 4
   %11 = add i32 %10, 4
   br label %bb8
 
 bb7:		; preds = %bb5
-  %12 = load i32, i32* @a, align 4
+  %12 = load i32, ptr @a, align 4
   br label %bb8
 
 bb8:		; preds = %bb7, %bb6, %bb4, %bb2, %bb

llvm/test/Transforms/Util/PredicateInfo/pr33456.ll

@@ -9,33 +9,33 @@
 
 define i32 @main() {
 ; CHECK-LABEL: @main(
-; CHECK-NEXT:    [[TMP1:%.*]] = load i32, i32* @d, align 4
+; CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @d, align 4
 ; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0
 ; CHECK-NEXT:    br i1 [[TMP2]], label [[TMP3:%.*]], label [[TMP13:%.*]]
-; CHECK:         [[TMP4:%.*]] = load i32, i32* @a, align 4
-; CHECK-NEXT:    [[TMP5:%.*]] = load i32, i32* @c, align 4
+; CHECK:         [[TMP4:%.*]] = load i32, ptr @a, align 4
+; CHECK-NEXT:    [[TMP5:%.*]] = load i32, ptr @c, align 4
 ; CHECK-NEXT:    [[TMP6:%.*]] = icmp slt i32 [[TMP5]], 1
 ; CHECK-NEXT:    br i1 [[TMP6]], label [[TMP7:%.*]], label [[TMP9:%.*]]
 ; CHECK:         [[TMP8:%.*]] = icmp eq i32 [[TMP4]], 0
 ; CHECK-NEXT:    br i1 [[TMP8]], label [[TMP9]], label [[TMP9]]
 ; CHECK:         [[DOT0:%.*]] = phi i32 [ [[TMP4]], [[TMP7]] ], [ [[TMP4]], [[TMP7]] ], [ [[DOT1:%.*]], [[TMP13]] ], [ [[TMP4]], [[TMP3]] ]
-; CHECK-NEXT:    [[TMP10:%.*]] = load i32, i32* @b, align 4
+; CHECK-NEXT:    [[TMP10:%.*]] = load i32, ptr @b, align 4
 ; CHECK-NEXT:    [[TMP11:%.*]] = sdiv i32 [[TMP10]], [[DOT0]]
 ; CHECK-NEXT:    [[TMP12:%.*]] = icmp eq i32 [[TMP11]], 0
 ; CHECK-NEXT:    br i1 [[TMP12]], label [[TMP13]], label [[TMP13]]
 ; CHECK:         [[DOT1]] = phi i32 [ [[DOT0]], [[TMP9]] ], [ [[DOT0]], [[TMP9]] ], [ undef, [[TMP0:%.*]] ]
-; CHECK-NEXT:    [[TMP14:%.*]] = load i32, i32* @e, align 4
+; CHECK-NEXT:    [[TMP14:%.*]] = load i32, ptr @e, align 4
 ; CHECK-NEXT:    [[TMP15:%.*]] = icmp eq i32 [[TMP14]], 0
 ; CHECK-NEXT:    br i1 [[TMP15]], label [[TMP16:%.*]], label [[TMP9]]
 ; CHECK:         ret i32 0
 ;
-  %1 = load i32, i32* @d, align 4
+  %1 = load i32, ptr @d, align 4
   %2 = icmp eq i32 %1, 0
   br i1 %2, label %3, label %13
 
 ; <label>:3:                                      ; preds = %0
-  %4 = load i32, i32* @a, align 4
-  %5 = load i32, i32* @c, align 4
+  %4 = load i32, ptr @a, align 4
+  %5 = load i32, ptr @c, align 4
   %6 = icmp slt i32 %5, 1
   br i1 %6, label %7, label %9
 
@@ -45,14 +45,14 @@ define i32 @main() {
 
 ; <label>:9:                                      ; preds = %13, %7, %7, %3
   %.0 = phi i32 [ %4, %7 ], [ %4, %7 ], [ %.1, %13 ], [ %4, %3 ]
-  %10 = load i32, i32* @b, align 4
+  %10 = load i32, ptr @b, align 4
   %11 = sdiv i32 %10, %.0
   %12 = icmp eq i32 %11, 0
   br i1 %12, label %13, label %13
 
 ; <label>:13:                                     ; preds = %9, %9, %0
   %.1 = phi i32 [ %.0, %9 ], [ %.0, %9 ], [ undef, %0 ]
-  %14 = load i32, i32* @e, align 4
+  %14 = load i32, ptr @e, align 4
   %15 = icmp eq i32 %14, 0
   br i1 %15, label %16, label %9
 
@@ -61,8 +61,8 @@ define i32 @main() {
 }
 
 ; Function Attrs: argmemonly nounwind
-declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture)
+declare void @llvm.lifetime.start.p0(i64, ptr nocapture)
 
 ; Function Attrs: argmemonly nounwind
-declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture)
+declare void @llvm.lifetime.end.p0(i64, ptr nocapture)
 

llvm/test/Transforms/Util/PredicateInfo/pr33457.ll

@@ -11,21 +11,21 @@
 ; Function Attrs: nounwind ssp uwtable
 define i32 @main() {
 ; CHECK-LABEL: @main(
-; CHECK-NEXT:    store i32 6, i32* @e, align 4
+; CHECK-NEXT:    store i32 6, ptr @e, align 4
 ; CHECK-NEXT:    br label [[TMP1:%.*]]
-; CHECK:         [[TMP2:%.*]] = load i32, i32* @d, align 4
+; CHECK:         [[TMP2:%.*]] = load i32, ptr @d, align 4
 ; CHECK-NEXT:    [[TMP3:%.*]] = sext i32 [[TMP2]] to i64
-; CHECK-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [6 x i32], [6 x i32]* @b, i64 0, i64 [[TMP3]]
-; CHECK-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
-; CHECK-NEXT:    [[TMP6:%.*]] = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 [[TMP5]])
-; CHECK-NEXT:    [[TMP7:%.*]] = load i32, i32* @a, align 4
+; CHECK-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [6 x i32], ptr @b, i64 0, i64 [[TMP3]]
+; CHECK-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
+; CHECK-NEXT:    [[TMP6:%.*]] = call i32 (ptr, ...) @printf(ptr @.str, i32 [[TMP5]])
+; CHECK-NEXT:    [[TMP7:%.*]] = load i32, ptr @a, align 4
 ; CHECK-NEXT:    [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 0
 ; CHECK-NEXT:    br i1 [[TMP8]], label %thread-pre-split, label [[TMP9:%.*]]
-; CHECK:         [[TMP10:%.*]] = load i32, i32* @e, align 4
+; CHECK:         [[TMP10:%.*]] = load i32, ptr @e, align 4
 ; CHECK-NEXT:    [[TMP11:%.*]] = icmp eq i32 [[TMP10]], 0
 ; CHECK-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP12]]
 ; CHECK:       thread-pre-split:
-; CHECK-NEXT:    [[DOTPR:%.*]] = load i32, i32* @e, align 4
+; CHECK-NEXT:    [[DOTPR:%.*]] = load i32, ptr @e, align 4
 ; CHECK-NEXT:    br label [[TMP12]]
 ; CHECK:         [[TMP13:%.*]] = phi i32 [ [[DOTPR]], %thread-pre-split ], [ [[TMP10]], [[TMP9]] ], [ [[TMP10]], [[TMP9]] ]
 ; CHECK-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
@@ -34,34 +34,34 @@ define i32 @main() {
 ; CHECK:         br label [[TMP17]]
 ; CHECK:         [[DOT0:%.*]] = phi i32 [ 1, [[TMP16]] ], [ -1, [[TMP15]] ]
 ; CHECK-NEXT:    [[TMP18:%.*]] = and i32 [[DOT0]], 8693
-; CHECK-NEXT:    [[TMP19:%.*]] = load i32, i32* @c, align 4
+; CHECK-NEXT:    [[TMP19:%.*]] = load i32, ptr @c, align 4
 ; CHECK-NEXT:    [[TMP20:%.*]] = xor i32 [[TMP18]], [[TMP19]]
 ; CHECK-NEXT:    [[TMP21:%.*]] = xor i32 [[TMP20]], -1
-; CHECK-NEXT:    store i32 [[TMP21]], i32* @d, align 4
+; CHECK-NEXT:    store i32 [[TMP21]], ptr @d, align 4
 ; CHECK-NEXT:    [[TMP22:%.*]] = icmp slt i32 [[TMP20]], -2
 ; CHECK-NEXT:    br i1 [[TMP22]], label [[TMP1]], label [[TMP23:%.*]]
 ; CHECK:         ret i32 0
 ;
-  store i32 6, i32* @e, align 4
+  store i32 6, ptr @e, align 4
   br label %1
 
 ; <label>:1:                                      ; preds = %17, %0
-  %2 = load i32, i32* @d, align 4
+  %2 = load i32, ptr @d, align 4
   %3 = sext i32 %2 to i64
-  %4 = getelementptr inbounds [6 x i32], [6 x i32]* @b, i64 0, i64 %3
-  %5 = load i32, i32* %4, align 4
-  %6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %5) #2
-  %7 = load i32, i32* @a, align 4
+  %4 = getelementptr inbounds [6 x i32], ptr @b, i64 0, i64 %3
+  %5 = load i32, ptr %4, align 4
+  %6 = call i32 (ptr, ...) @printf(ptr @.str, i32 %5) #2
+  %7 = load i32, ptr @a, align 4
   %8 = icmp eq i32 %7, 0
   br i1 %8, label %thread-pre-split, label %9
 
 ; <label>:9:                                      ; preds = %1
-  %10 = load i32, i32* @e, align 4
+  %10 = load i32, ptr @e, align 4
   %11 = icmp eq i32 %10, 0
   br i1 %11, label %12, label %12
 
 thread-pre-split:                                 ; preds = %1
-  %.pr = load i32, i32* @e, align 4
+  %.pr = load i32, ptr @e, align 4
   br label %12
 
 ; <label>:12:                                     ; preds = %thread-pre-split, %9, %9
@@ -78,16 +78,16 @@ thread-pre-split:                                 ; preds = %1
 ; <label>:17:                                     ; preds = %16, %15
   %.0 = phi i32 [ 1, %16 ], [ -1, %15 ]
   %18 = and i32 %.0, 8693
-  %19 = load i32, i32* @c, align 4
+  %19 = load i32, ptr @c, align 4
   %20 = xor i32 %18, %19
   %21 = xor i32 %20, -1
-  store i32 %21, i32* @d, align 4
+  store i32 %21, ptr @d, align 4
   %22 = icmp slt i32 %20, -2
   br i1 %22, label %1, label %23
 
 ; <label>:23:                                     ; preds = %17
   ret i32 0
 }
 
-declare i32 @printf(i8*, ...)
+declare i32 @printf(ptr, ...)
 

llvm/test/Transforms/Util/PredicateInfo/unreachable.ll

@@ -3,19 +3,19 @@
 declare void @foo()
 declare void @llvm.assume(i1)
 
-define void @bar(i32* %p) {
+define void @bar(ptr %p) {
 entry:
 ; CHECK-LABEL: @bar
   br label %end
 
 unreachable1:
-  %v1 = load i32, i32* %p, align 4
+  %v1 = load i32, ptr %p, align 4
   %c1 = icmp eq i32 %v1, 0
   call void @llvm.assume(i1 %c1)
   br label %unreachable2
 
 unreachable2:
-  %v2 = load i32, i32* %p, align 4
+  %v2 = load i32, ptr %p, align 4
   %c2 = icmp eq i32 %v2, 0
   call void @llvm.assume(i1 %c2)
   br label %end

llvm/test/Transforms/Util/annotation-remarks-dbg-info.ll

@@ -40,17 +40,17 @@
 ; CHECK-NEXT:   - type:            _remarks1
 ; CHECK-NEXT: ...
 
-define void @test1(float* %a) !dbg !7 {
+define void @test1(ptr %a) !dbg !7 {
 entry:
-  %a.addr = alloca float*, align 8, !dbg !16, !annotation !5
-  store float* null, float** %a.addr, align 8, !annotation !6
-  store float* %a, float** %a.addr, align 8, !annotation !5
+  %a.addr = alloca ptr, align 8, !dbg !16, !annotation !5
+  store ptr null, ptr %a.addr, align 8, !annotation !6
+  store ptr %a, ptr %a.addr, align 8, !annotation !5
   ret void, !annotation !5
 }
 
-define void @test2(float* %a) !dbg !17 {
+define void @test2(ptr %a) !dbg !17 {
 entry:
-  %a.addr = alloca float*, align 8, !annotation !6
+  %a.addr = alloca ptr, align 8, !annotation !6
   ret void, !dbg !18, !annotation !6
 }
 

llvm/test/Transforms/Util/annotation-remarks.ll

@@ -34,17 +34,17 @@
 ; CHECK-NEXT:   - type:            _remarks1
 ; CHECK-NEXT: ...
 
-define void @test1(float* %a) {
+define void @test1(ptr %a) {
 entry:
-  %a.addr = alloca float*, align 8, !annotation !0
-  store float* null, float** %a.addr, align 8, !annotation !1
-  store float* %a, float** %a.addr, align 8, !annotation !0
+  %a.addr = alloca ptr, align 8, !annotation !0
+  store ptr null, ptr %a.addr, align 8, !annotation !1
+  store ptr %a, ptr %a.addr, align 8, !annotation !0
   ret void, !annotation !0
 }
 
-define void @test2(float* %a) {
+define void @test2(ptr %a) {
 entry:
-  %a.addr = alloca float*, align 8, !annotation !1
+  %a.addr = alloca ptr, align 8, !annotation !1
   ret void, !annotation !1
 }