Merge pull request #67 from ninezerozeronine/add_simple_alu_instructions

Add simple alu instructions

docs/language/assembly.rst

@@ -35,6 +35,17 @@ ADDC
 SUB
 ^^^
 
+The ``SUB`` operation subtracts the value held in the specified module (or a
+constant) from the accumulator. The ALU flags generated by this operation are
+stored.
+
+The possible usages are:
+
+ - ``SUB A``
+ - ``SUB B``
+ - ``SUB C``
+ - ``SUB CONST``
+
 SUBB
 ^^^^
 
@@ -264,31 +275,111 @@ Logical Operations
 NOT
 ^^^
 
+The ``NOT`` operation inverts all the bits of the specified module in place.
+The ALU flags generated by this operation are stored.
+
+The possible usages are:
+
+ - ``NOT ACC``
+ - ``NOT A``
+ - ``NOT B``
+ - ``NOT C``
+
+
 AND
 ^^^
 
+The ``AND`` operation performs a logical AND with the value held in the
+specified module (or a constant) and the accumulator. The result is stored in
+the accumulator. The ALU flags generated by this operation are stored.
+
+The possible usages are:
+
+ - ``AND A``
+ - ``AND B``
+ - ``AND C``
+ - ``AND CONST``
+
 NAND
 ^^^^
 
+The ``NAND`` operation performs a logical NAND with the value held in the
+specified module (or a constant) and the accumulator. The result is stored in
+the accumulator. The ALU flags generated by this operation are stored.
+
+The possible usages are:
+
+ - ``NAND A``
+ - ``NAND B``
+ - ``NAND C``
+ - ``NAND CONST``
+
 OR
 ^^
 
+The ``OR`` operation performs a logical OR with the value held in the
+specified module (or a constant) and the accumulator. The result is stored in
+the accumulator. The ALU flags generated by this operation are stored.
+
+The possible usages are:
+
+ - ``OR A``
+ - ``OR B``
+ - ``OR C``
+ - ``OR CONST``
+
 NOR
 ^^^
 
+The ``NOR`` operation performs a logical NOR with the value held in the
+specified module (or a constant) and the accumulator. The result is stored in
+the accumulator. The ALU flags generated by this operation are stored.
+
+The possible usages are:
+
+ - ``NOR A``
+ - ``NOR B``
+ - ``NOR C``
+ - ``NOR CONST``
+
 XOR
 ^^^
 
+The ``XOR`` operation performs a logical XOR with the value held in the
+specified module (or a constant) and the accumulator. The result is stored in
+the accumulator. The ALU flags generated by this operation are stored.
+
+The possible usages are:
+
+ - ``XOR A``
+ - ``XOR B``
+ - ``XOR C``
+ - ``XOR CONST``
+
 NXOR
 ^^^^
 
+The ``NXOR`` operation performs a logical NXOR (an XOR, then inverted) with
+the value held in the specified module (or a constant) and the accumulator.
+The result is stored in the accumulator. The ALU flags generated by this
+operation are stored.
+
+The possible usages are:
+
+ - ``NXOR A``
+ - ``NXOR B``
+ - ``NXOR C``
+ - ``NXOR CONST``
+
 Constants
 ---------
 
 Constants are values that the assembler will convert to machine code bytes for
 operations that require data in the machine code. For example, a jump to an
 explicit index in program memory, or setting a register to an explicit value.
 
+There are 3 kinds of constants: labels, variables and numbers.
+
 Labels
 ^^^^^^
 

docs/software/source/eight_bit_computer.operations.and_op.rst

@@ -0,0 +1,7 @@
+eight\_bit\_computer.operations.and\_op module
+==============================================
+
+.. automodule:: eight_bit_computer.operations.and_op
+    :members:
+    :undoc-members:
+    :show-inheritance:

docs/software/source/eight_bit_computer.operations.or_op.rst

@@ -0,0 +1,7 @@
+eight\_bit\_computer.operations.or\_op module
+=============================================
+
+.. automodule:: eight_bit_computer.operations.or_op
+    :members:
+    :undoc-members:
+    :show-inheritance:

docs/software/source/eight_bit_computer.operations.rst

@@ -7,15 +7,18 @@ Submodules
 .. toctree::
 
    eight_bit_computer.operations.add
+   eight_bit_computer.operations.and_op
    eight_bit_computer.operations.copy_op
    eight_bit_computer.operations.fetch
    eight_bit_computer.operations.jump
    eight_bit_computer.operations.jump_if_flag_base
    eight_bit_computer.operations.jump_if_overflow_flag
    eight_bit_computer.operations.load
    eight_bit_computer.operations.operation_template
+   eight_bit_computer.operations.or_op
    eight_bit_computer.operations.set_op
    eight_bit_computer.operations.simple_alu_op_base
+   eight_bit_computer.operations.sub
 
 Module contents
 ---------------

docs/software/source/eight_bit_computer.operations.sub.rst

@@ -0,0 +1,7 @@
+eight\_bit\_computer.operations.sub module
+==========================================
+
+.. automodule:: eight_bit_computer.operations.sub
+    :members:
+    :undoc-members:
+    :show-inheritance:

src/eight_bit_computer/language_defs.py

@@ -170,7 +170,12 @@
         MODULE_CONTROL["ALU"]["NO_CARRY"],
     ],
     "A_MINUS_B": [
-
+        MODULE_CONTROL["ALU"]["S0_LOW"],
+        MODULE_CONTROL["ALU"]["S1_HIGH"],
+        MODULE_CONTROL["ALU"]["S2_HIGH"],
+        MODULE_CONTROL["ALU"]["S3_LOW"],
+        MODULE_CONTROL["ALU"]["M_LOW"],
+        MODULE_CONTROL["ALU"]["NO_CARRY"],
     ],
     "A_PLUS_B_PLUS_1": [
 
@@ -179,19 +184,60 @@
 
     ],
     "A_AND_B": [
-
+        MODULE_CONTROL["ALU"]["S0_HIGH"],
+        MODULE_CONTROL["ALU"]["S1_HIGH"],
+        MODULE_CONTROL["ALU"]["S2_LOW"],
+        MODULE_CONTROL["ALU"]["S3_HIGH"],
+        MODULE_CONTROL["ALU"]["M_HIGH"],
+        MODULE_CONTROL["ALU"]["NO_CARRY"],
     ],
     "A_OR_B": [
-
+        MODULE_CONTROL["ALU"]["S0_LOW"],
+        MODULE_CONTROL["ALU"]["S1_HIGH"],
+        MODULE_CONTROL["ALU"]["S2_HIGH"],
+        MODULE_CONTROL["ALU"]["S3_HIGH"],
+        MODULE_CONTROL["ALU"]["M_HIGH"],
+        MODULE_CONTROL["ALU"]["NO_CARRY"],
     ],
     "A_NAND_B": [
-
+        MODULE_CONTROL["ALU"]["S0_LOW"],
+        MODULE_CONTROL["ALU"]["S1_LOW"],
+        MODULE_CONTROL["ALU"]["S2_HIGH"],
+        MODULE_CONTROL["ALU"]["S3_LOW"],
+        MODULE_CONTROL["ALU"]["M_HIGH"],
+        MODULE_CONTROL["ALU"]["NO_CARRY"],
+    ],
+    "A_NOR_B": [
+        MODULE_CONTROL["ALU"]["S0_HIGH"],
+        MODULE_CONTROL["ALU"]["S1_LOW"],
+        MODULE_CONTROL["ALU"]["S2_LOW"],
+        MODULE_CONTROL["ALU"]["S3_LOW"],
+        MODULE_CONTROL["ALU"]["M_HIGH"],
+        MODULE_CONTROL["ALU"]["NO_CARRY"],
     ],
     "A_XOR_B": [
-
+        MODULE_CONTROL["ALU"]["S0_LOW"],
+        MODULE_CONTROL["ALU"]["S1_HIGH"],
+        MODULE_CONTROL["ALU"]["S2_HIGH"],
+        MODULE_CONTROL["ALU"]["S3_LOW"],
+        MODULE_CONTROL["ALU"]["M_HIGH"],
+        MODULE_CONTROL["ALU"]["NO_CARRY"],
+    ],
+    "A_NXOR_B": [
+        MODULE_CONTROL["ALU"]["S0_HIGH"],
+        MODULE_CONTROL["ALU"]["S1_LOW"],
+        MODULE_CONTROL["ALU"]["S2_LOW"],
+        MODULE_CONTROL["ALU"]["S3_HIGH"],
+        MODULE_CONTROL["ALU"]["M_HIGH"],
+        MODULE_CONTROL["ALU"]["NO_CARRY"],
     ],
     "NOT_A": [
-
+        MODULE_CONTROL["ALU"]["S0_LOW"],
+        MODULE_CONTROL["ALU"]["S1_LOW"],
+        MODULE_CONTROL["ALU"]["S2_LOW"],
+        MODULE_CONTROL["ALU"]["S3_LOW"],
+        MODULE_CONTROL["ALU"]["M_HIGH"],
+        MODULE_CONTROL["ALU"]["NO_CARRY"],
     ],
     "A_PLUS_A": [
 

src/eight_bit_computer/operations/__init__.py

@@ -17,6 +17,13 @@ def get_all_operations():
     """
 
     from . import (
+        and_op,
+        nand_op,
+        or_op,
+        nor_op,
+        xor_op,
+        nxor_op,
+        not_op,
         add,
         copy_op,
         load,
@@ -26,10 +33,17 @@ def get_all_operations():
     )
 
     return [
+        and_op,
+        nand_op,
+        or_op,
+        nor_op,
+        xor_op,
+        nxor_op,
+        not_op,
         add,
         copy_op,
         load,
         set_op,
         jump,
-        jump_if_overflow_flag,
+        jump_if_overflow_flag
     ]

src/eight_bit_computer/operations/and_op.py

@@ -0,0 +1,46 @@
+"""
+AND Operation
+"""
+
+from . import simple_alu_op_base
+
+from ..language_defs import (
+    ALU_OPERATIONS,
+    ALU_CONTROL_FLAGS,
+    instruction_byte_from_bitdefs,
+)
+
+_NAME = "AND"
+
+
+def generate_microcode_templates():
+    """
+    Generate microcode for all the AND instructions.
+
+    Returns:
+        list(DataTemplate): DataTemplates for all the AND instructions.
+    """
+
+    return simple_alu_op_base.generate_microcode_templates(
+        ALU_OPERATIONS["AND"],
+        ALU_CONTROL_FLAGS["A_AND_B"],
+    )
+
+
+def parse_line(line):
+    """
+    Parse a line of assembly code to create machine code byte templates.
+
+    If a line is not identifiably a AND assembly line, return an empty
+    list instead.
+
+    Args:
+        line (str): Assembly line to be parsed.
+    Returns:
+        list(dict): List of machine code byte template dictionaries or
+        an empty list.
+    """
+
+    return simple_alu_op_base.parse_line(
+        line, _NAME, ALU_OPERATIONS["AND"]
+    )

src/eight_bit_computer/operations/nand_op.py

@@ -0,0 +1,46 @@
+"""
+NAND Operation
+"""
+
+from . import simple_alu_op_base
+
+from ..language_defs import (
+    ALU_OPERATIONS,
+    ALU_CONTROL_FLAGS,
+    instruction_byte_from_bitdefs,
+)
+
+_NAME = "NAND"
+
+
+def generate_microcode_templates():
+    """
+    Generate microcode for all the NAND instructions.
+
+    Returns:
+        list(DataTemplate): DataTemplates for all the NAND instructions.
+    """
+
+    return simple_alu_op_base.generate_microcode_templates(
+        ALU_OPERATIONS["NAND"],
+        ALU_CONTROL_FLAGS["A_NAND_B"],
+    )
+
+
+def parse_line(line):
+    """
+    Parse a line of assembly code to create machine code byte templates.
+
+    If a line is not identifiably a NAND assembly line, return an empty
+    list instead.
+
+    Args:
+        line (str): Assembly line to be parsed.
+    Returns:
+        list(dict): List of machine code byte template dictionaries or
+        an empty list.
+    """
+
+    return simple_alu_op_base.parse_line(
+        line, _NAME, ALU_OPERATIONS["NAND"]
+    )