Verilog course design
University: HITSZ
Systolic array for matrix computations with Faddeev's Algorithm
For the detail of Faddeev's Algorithm and Systolic Array Implementation, please refer [1] [2];
[1]Chuang, Henry YH, and Guo He. "A versatile systolic array for matrix computations." ACM SIGARCH Computer Architecture News. Vol. 13. No. 3. IEEE Computer Society Press, 1985.
[2]Chen, Gang, and Li Guo. "The FPGA implementation of Kalman filter." Proceedings of the 5th WSEAS International Conference on Signal Processing, Computational Geometry and Artificial Vision. 2005.
Envirment: ISE 14.7 Modelsim SE-64 10.4