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[nrf toup] platform: nordic_nrf: Add option to initialize hardware to…
… reset on boot Add an option to the nordic platforms to initialize the hardware state to the its reset values when the TF-M firmware is booting. The option is useful when the TF-M firmware image is chain-loaded, for example, a bootloader, and we need to guarantee that the internal states of the architecture core blocks are restored to the reset values. Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no> (cherry picked from commit 9f3911b) Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
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Joakim Andersson
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Jun 9, 2022
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/* | ||
* Copyright (c) 2022 Nordic Semiconductor ASA | ||
* | ||
* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause | ||
*/ | ||
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#include <stdint.h> | ||
#include <nrf.h> | ||
#include "array.h" | ||
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/* This routine clears all ARM MPU region configuration. */ | ||
static void hw_init_mpu(void) | ||
{ | ||
const int num_regions = | ||
((MPU->TYPE & MPU_TYPE_DREGION_Msk) >> MPU_TYPE_DREGION_Pos); | ||
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for (int i = 0; i < num_regions; i++) { | ||
ARM_MPU_ClrRegion(i); | ||
} | ||
} | ||
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/* This routine resets Cortex-M system control block components and core | ||
* registers. | ||
*/ | ||
void hw_init_reset_on_boot(void) | ||
{ | ||
/* Disable interrupts */ | ||
__disable_irq(); | ||
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/* Reset exception and interrupt mask state (PRIMASK handled by | ||
* __enable_irq below) | ||
*/ | ||
__set_FAULTMASK(0); | ||
__set_BASEPRI(0); | ||
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/* Clear MPU region configuration */ | ||
hw_init_mpu(); | ||
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/* Disable NVIC interrupts */ | ||
for (int i = 0; i < ARRAY_SIZE(NVIC->ICER); i++) { | ||
NVIC->ICER[i] = 0xFFFFFFFF; | ||
} | ||
/* Clear pending NVIC interrupts */ | ||
for (int i = 0; i < ARRAY_SIZE(NVIC->ICPR); i++) { | ||
NVIC->ICPR[i] = 0xFFFFFFFF; | ||
} | ||
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/* Restore Interrupts */ | ||
__enable_irq(); | ||
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__DSB(); | ||
__ISB(); | ||
} |
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/* | ||
* Copyright (c) 2022 Nordic Semiconductor ASA | ||
* | ||
* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause | ||
*/ | ||
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#ifndef HW_INIT_H__ | ||
#define HW_INIT_H__ | ||
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#define _SCS_BASE_ADDR 0xE000E000 | ||
#define _SCS_MPU_CTRL (_SCS_BASE_ADDR + 0xd94) | ||
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#endif /* HW_INIT_H__*/ |
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