Merge pull request #139 from nunobrum/issue138_fix

Issue138 fix

README.md

@@ -459,7 +459,9 @@ _Make sure to initialize the root logger before importing the library to be able
 
 ## History ##
 * Version 5.3.1
-  * Updates on the README.md file. Issue #137
+  * Bugfixes 
+    * Updates on the README.md file. Issue #137
+    * Hierarchical support on AscEditor. Issue #138
   * Rich format is only used if the user has it already installed. Issue #136
 * Version 5.3.0
   * Hierarchical Support (Aligning with the spicelib 1.1.1)

doc/conf.py

@@ -20,11 +20,21 @@
 # -- Project information -----------------------------------------------------
 
 project = 'PyLTSpice'
-copyright = '2023, Nuno Brum'
+copyright = '2024, Nuno Brum'
 author = 'Nuno Brum'
 
-# The full version, including alpha/beta/rc tags
-release = '5.0'
+release = '5.3.0'
+
+try:
+	# Read the version from the .toml file
+	from toml import load
+	with open('../pyproject.toml') as f:
+		pyproject = load(f)
+		project = pyproject['project']['name']
+		release = pyproject['project']['version']
+		author = pyproject['project']['authors'][0]['name']
+except:
+	pass
 
 
 # -- General configuration ---------------------------------------------------

examples/sim_runner_callback_example.py

@@ -6,7 +6,7 @@
     RichHandler = None
 import PyLTSpice
 
-from PyLTSpice import SimRunner, SpiceEditor
+from PyLTSpice import SimRunner, AscEditor
 PyLTSpice.set_log_level(logging.DEBUG)
 if RichHandler:
     PyLTSpice.add_log_handler(RichHandler())
@@ -26,13 +26,13 @@ def processing_data(raw_file, log_file):
 runner = SimRunner(output_folder='./temp_batch3')  # Configures the simulator to use and output
 # folder
 
-netlist = SpiceEditor("./testfiles/Batch_Test.asc")  # Open the Spice Model, and creates the .net
+netlist = AscEditor("./testfiles/Batch_Test.asc")  # Open the Spice Model, and creates the .net
 # set default arguments
 netlist.set_parameters(res=0, cap=100e-6)
 netlist.set_component_value('R2', '2k')  # Modifying the value of a resistor
 netlist.set_component_value('R1', '4k')
 netlist.set_element_model('V3', "SINE(0 1 3k 0 0 0)")  # Modifying the
-netlist.set_component_value('XU1:C2', 20e-12)  # modifying a
+netlist.set_component_value('U1:C2', 20e-12)  # modifying a
 # define simulation
 netlist.add_instructions(
     "; Simulation settings",
@@ -43,12 +43,12 @@ def processing_data(raw_file, log_file):
 use_run_now = False
 
 for opamp in ('AD712', 'AD820'):
-    netlist.set_element_model('XU1', opamp)
+    netlist.set_element_model('U1', opamp)
     for supply_voltage in (5, 10, 15):
         netlist.set_component_value('V1', supply_voltage)
         netlist.set_component_value('V2', -supply_voltage)
         # overriding the automatic netlist naming
-        run_netlist_file = "{}_{}_{}.net".format(netlist.netlist_file.stem, opamp, supply_voltage)
+        run_netlist_file = "{}_{}_{}.net".format(netlist.circuit_file.stem, opamp, supply_voltage)
         if use_run_now:
             runner.run_now(netlist, run_filename=run_netlist_file)
         else:

pyproject.toml

@@ -15,7 +15,7 @@ readme = "README.md"
 license = { file="LICENSE" }
 requires-python = ">=3.8"
 dependencies = [
-    "spicelib>=1.1.1",
+    "spicelib>=1.1.2",
 ]
 classifiers=[
     "Programming Language :: Python :: 3",