dts: s32cc: Reorder generic timer interrupts

The ARMv8 timer driver expects a certain order of interrupts
when the interrupt names are not used in bindings. This is how
the interrupts were mapped:

Expected   |  SoC IRQ
 order     |    ID
----------------------
 sec-phys  | hyp-phys
 phys      | virt
 virt      | hyp-virt
 hyp-phys  | sec-phys
 hyp-virt  | phys

Adding names to interrupts helps to correctly map the interrupts
onto driver's expectations.

Issue: ALB-9425
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>

arch/arm64/boot/dts/freescale/s32cc.dtsi

@@ -131,10 +131,12 @@
 
 	generic_timer: timer {
 		compatible = "arm,armv8-timer";
-		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
-			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
+		interrupts = <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
 			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
-			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
+			     <GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>;
+		interrupt-names = "hyp-phys", "virt", "hyp-virt", "sec-phys", "phys";
 	};
 
 	reserved-memory  {