Block or report user

Report or block olofk

Hide content and notifications from this user.

Contact Support about this user’s behavior.

Report abuse

Organizations

@openrisc

Popular repositories

  1. fusesoc

    FuseSoC is a package manager and a set of build tools for FPGA/ASIC development

    Python 262 83

  2. ipyxact

    Python-based IP-XACT parser

    Python 37 15

  3. serv

    SERV - The SErial RISC-V CPU

    Verilog 29 2

  4. edalize

    An abstraction library for interfacing EDA tools

    Python 16 4

  5. fifo

    Generic FIFO implementation with optional FWFT

    Verilog 14 5

  6. i2c

    Forked from freecores/i2c

    I2C controller core

    Verilog 8 3

396 contributions in the last year

Dec Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov Dec Mon Wed Fri

Contribution activity

December 2018

Created an issue in YosysHQ/nextpnr that received 2 comments

Assertion `raw.substr(0, 2) == "0b"' failed when setting CLKHF_DIV for HFOSC

nextpnr-ice40: /home/olof/code/icestorm/nextpnr/ice40/bitstream.cc:159: void nextpnr_ice40::configure_extra_cell(nextpnr_ice40::chipconfig_t&, cons…

2 comments

Seeing something unexpected? Take a look at the GitHub profile guide.