Skip to content
View olofk's full-sized avatar

Highlights

  • Pro

Organizations

@openrisc
Block or Report

Block or report olofk

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Pinned

  1. fusesoc fusesoc Public

    Package manager and build abstraction tool for FPGA/ASIC development

    Python 1.1k 231

  2. serv serv Public

    SERV - The SErial RISC-V CPU

    Verilog 1.2k 169

  3. edalize edalize Public

    An abstraction library for interfacing EDA tools

    Python 590 179

  4. fusesoc/fusesoc-cores fusesoc/fusesoc-cores Public

    FuseSoC standard core library

    97 28

  5. chipsalliance/VeeRwolf chipsalliance/VeeRwolf Public

    FuseSoC-based SoC for SweRV EH1 and EL2

    Verilog 254 56

  6. fusesoc/fusesoc-generators fusesoc/fusesoc-generators Public

    A collection of core generators to use with FuseSoC

    Python 12 10