src: cpu: aarch64: Enable JIT'ed SVE 128 and 256 support for Eltwise …

[cfRod]

…primitives

Description

This PR covers minor changes to enable support for Eltwise primitives for SVE 128 and SVE 256 using the JIT'ed implementation originally added to support SVE 512 (#1092).

Checklist

General

• Do all unit and benchdnn tests (make test and make test_benchdnn_*) pass locally for each commit?
• Have you formatted the code using clang-format?

Performance improvements

• [ N/A] Have you submitted performance data that demonstrates performance improvements?

New features

• Have you published an RFC for the new feature?
• Was the RFC approved?
• [N/A] Have you added relevant tests?

Bug fixes

• [N/A] Have you included information on how to reproduce the issue (either in a github issue or in this PR)?
• [N/A] Have you added relevant regression tests?

RFC PR

• [N/A] Does RFC document follow the template?
• [N/A] Have you added a link to the rendered document?

[cfRod]

@kawakami-k, we noticed the entry for CPU_INSTANCE_AARCH64(jit_uni_eltwise_bwd_t<sve_512, f32>) for the eltwise backward pass inside the "forward" block of the eltwise implementation list (cpu_eltwise_cpp L64). I have moved this to the backward block.

• We have tested this on SVE-128 and SVE-256 and found no problems. It would be great if you can see any potential problems with this or extending it to int data types, and also extending it to ASIMD.

[kawakami-k]

@cfRod
Thanks for the patch. I will check it in my environment.

[igorsafo]

@cfRod The changes landed into master and rls-v2.7. Thanks for your contribution!

[cfRod]

Thanks @igorsafo