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hwas.C
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/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
/* $Source: src/usr/hwas/common/hwas.C $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2012,2019 */
/* [+] Google Inc. */
/* [+] International Business Machines Corp. */
/* */
/* */
/* Licensed under the Apache License, Version 2.0 (the "License"); */
/* you may not use this file except in compliance with the License. */
/* You may obtain a copy of the License at */
/* */
/* http://www.apache.org/licenses/LICENSE-2.0 */
/* */
/* Unless required by applicable law or agreed to in writing, software */
/* distributed under the License is distributed on an "AS IS" BASIS, */
/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
/* implied. See the License for the specific language governing */
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
/**
* @file hwas.C
*
* HardWare Availability Service functions.
* See hwas.H for doxygen documentation tags.
*
*/
/******************************************************************************/
// Includes
/******************************************************************************/
#include <stdint.h>
#include <algorithm>
#include <map>
#include <stdio.h> // sprintf
#ifdef __HOSTBOOT_MODULE
#include <config.h>
#include <initservice/initserviceif.H>
#endif
#include <targeting/common/commontargeting.H>
#include <targeting/common/utilFilter.H>
#include <targeting/common/util.H>
#include <hwas/common/hwas.H>
#include <hwas/common/hwasCommon.H>
#include <hwas/common/hwasError.H>
#include <hwas/common/pgLogic.H>
#include <hwas/common/deconfigGard.H>
#include <hwas/common/hwas_reasoncodes.H>
namespace HWAS
{
using namespace TARGETING;
using namespace HWAS::COMMON;
// trace setup; used by HWAS_DBG and HWAS_ERR macros
HWAS_TD_t g_trac_dbg_hwas = NULL; // debug - fast
HWAS_TD_t g_trac_imp_hwas = NULL; // important - slow
#ifdef __HOSTBOOT_MODULE
TRAC_INIT(&g_trac_dbg_hwas, "HWAS", KILOBYTE );
TRAC_INIT(&g_trac_imp_hwas, "HWAS_I", KILOBYTE );
#else
TRAC_INIT(&g_trac_dbg_hwas, "HWAS", 1024 );
TRAC_INIT(&g_trac_imp_hwas, "HWAS_I", 1024 );
#endif
// SORT functions that we'll use for PR keyword processing
bool compareProcGroup(procRestrict_t t1, procRestrict_t t2)
{
if (t1.group == t2.group)
{
return (t1.target->getAttr<ATTR_HUID>() <
t2.target->getAttr<ATTR_HUID>());
}
return (t1.group < t2.group);
}
bool compareAffinity(const TargetInfo t1, const TargetInfo t2)
{
return t1.affinityPath < t2.affinityPath;
}
/*
* @brief This function takes in proc target and returns group/chip id
* in the following bit format: GGGG CCC
* where G = Group Id and C = Chip Id
*
* @param[in] i_proc: proc target
* @retval: chip info including group and chip id
*/
uint64_t getGroupChipIdInfo (TargetHandle_t i_proc)
{
auto l_grp_id = i_proc->getAttr<ATTR_FABRIC_GROUP_ID>();
auto l_chip_id = i_proc->getAttr<ATTR_FABRIC_CHIP_ID>();
//Chip ID is three bits long, therefore, shift group id
//by 3 and OR it with chip id
return ((l_grp_id << 3) | l_chip_id);
}
/*
* @brief This function takes in the value of ATTR_PROC_MEM_TO_USE
* and extract out group and chip id
* in the following bit format: GGGG CCC
* where G = Group Id and C = Chip Id
*
* @param[in] i_proc_mem_to_use: Value of ATTR_PROC_MEM_TO_USE
* @param[out] o_grp_id: groupd id
* @param[out] o_chip_id: chip id
*/
void parseProcMemToUseIntoGrpChipId (uint8_t i_proc_mem_to_use,
uint8_t & o_grp_id,
uint8_t & o_chip_id)
{
o_grp_id = (i_proc_mem_to_use >> 3) & 0x0F;
o_chip_id = i_proc_mem_to_use & 0x07;
}
/**
* @brief simple helper fn to get and set hwas state to poweredOn,
* present, functional
*
* @param[in] i_target pointer to target that we're looking at
* @param[in] i_present boolean indicating present or not
* @param[in] i_functional boolean indicating functional or not
* @param[in] i_errlEid erreid that caused change to non-funcational;
* 0 if not associated with an error or if
* functional is true
*
* @return none
*
*/
void enableHwasState(Target *i_target,
bool i_present, bool i_functional,
uint32_t i_errlEid)
{
HwasState hwasState = i_target->getAttr<ATTR_HWAS_STATE>();
if (i_functional == false)
{ // record the EID as a reason that we're marking non-functional
hwasState.deconfiguredByEid = i_errlEid;
}
hwasState.poweredOn = true;
hwasState.present = i_present;
hwasState.functional = i_functional;
i_target->setAttr<ATTR_HWAS_STATE>( hwasState );
}
/**
* @brief disable obuses in wrap config.
* Due to fabric limitations, we can only have 2 parallel OBUS
* connections at a time in wrap config.So, deconfigure appropriate
* OBUSes using the following rule. If the value of
* MFG_WRAP_TEST_ABUS_LINKS_SET_ENABLE (on the system target) does
* not match with the value of MFG_WRAP_TEST_ABUS_LINKS_SET (on the
* OBUS target), then deconfigure the OBUSes.
* @return errlHndl_t
*
*/
errlHndl_t disableOBUSes()
{
errlHndl_t l_err = nullptr;
do
{
//get system target and figure out which links to enable
Target* pSys;
targetService().getTopLevelTarget(pSys);
auto l_links_set_enable =
pSys->getAttr<ATTR_MFG_WRAP_TEST_ABUS_LINKS_SET_ENABLE>();
//get all OBUS chiplets
TargetHandleList l_obusList;
getAllChiplets(l_obusList, TYPE_OBUS);
for (const auto & l_obus : l_obusList)
{
//It fails to compile if you compare two different enum types
//That's why, typecasting here. The underlying enum value
//should be the same.
ATTR_MFG_WRAP_TEST_ABUS_LINKS_SET_ENABLE_type l_link_set =
(ATTR_MFG_WRAP_TEST_ABUS_LINKS_SET_ENABLE_type)
l_obus->getAttr<ATTR_MFG_WRAP_TEST_ABUS_LINKS_SET>();
if (l_links_set_enable != l_link_set)
{
//deconfigure
l_err = HWAS::theDeconfigGard().deconfigureTarget(
*l_obus,
HWAS::DeconfigGard::DECONFIGURED_BY_NO_MATCHING_LINK_SET);
if (l_err)
{
HWAS_ERR("disableOBUSes: Unable to deconfigure %x OBUS",
get_huid(l_obus));
break;
}
}
}
if (l_err)
{
break;
}
//Sanity Check to make sure each proc only has a max of 2 OBUSes
//only if MFG_WRAP_TEST_ABUS_LINKS_SET_ENABLE was overidden
//because that means we are trying to run in wrap mode.
//Otherwise, it will be defaulted to SET_NONE
if (l_links_set_enable)
{
TargetHandleList l_procList;
getAllChips(l_procList, TYPE_PROC);
for (const auto & l_proc : l_procList)
{
getChildChiplets(l_obusList, l_proc, TYPE_OBUS, true);
if (l_obusList.size() > 2)
{
HWAS_ERR("disableOBUSes: Only 2 BUSes should be functional"
" under %x, found %d",
get_huid(l_proc), l_obusList.size());
/*@
* @errortype
* @severity ERRL_SEV_UNRECOVERABLE
* @moduleid MOD_DISABLE_OBUS
* @reasoncode RC_ONLY_TWO_OBUS_SHOULD_BE_CONFIGURED
* @devdesc Due to fabric limitations, only 2
* OBUSes should be configured, we found
* too many
* @custdesc A problem occurred during the IPL of
* the system: Found too many obus links
* @userdata1 HUID of proc
* @userdata2 number of functional OBUSes
*/
l_err = hwasError(ERRL_SEV_UNRECOVERABLE,
MOD_DISABLE_OBUS,
RC_ONLY_TWO_OBUS_SHOULD_BE_CONFIGURED,
get_huid(l_proc), l_obusList.size());
break;
}
}
}
} while (0);
return l_err;
}
errlHndl_t update_proc_mem_to_use (const Target* i_node)
{
errlHndl_t l_errl {nullptr};
TargetHandle_t l_masterProcTarget {nullptr};
do
{
//Get master proc
l_errl =
targetService().queryMasterProcChipTargetHandle(l_masterProcTarget,
i_node);
if (l_errl)
{
HWAS_ERR("update_proc_mem_to_use: unable to get master proc");
break;
}
//Check if this processor has missing memory
//If yes, then get the HRMOR of the proc we want to use the mem of
uint8_t l_proc_mem_to_use = l_masterProcTarget->getAttr
<ATTR_PROC_MEM_TO_USE>();
uint8_t l_proc_mem_to_use_save = l_proc_mem_to_use;
bool l_found_missing_mem = false;
l_errl = check_for_missing_memory(i_node, l_proc_mem_to_use,
l_found_missing_mem);
if (l_errl)
{
HWAS_ERR("update_proc_mem_to_use: unable to check for missing mem");
break;
}
//We found missing memory behind master proc, but
//check_for_missing_memory didn't update proc_mem_to_use
//probably because there are no other procs with memory,
//create an error.
if (l_found_missing_mem && (l_proc_mem_to_use==l_proc_mem_to_use_save))
{
HWAS_ERR("update_proc_mem_to_use: ATTR_PROC_MEM_TO_USE didn't get"
" updated even though we were missing mem behind master proc");
/*@
* @errortype
* @severity ERRL_SEV_UNRECOVERABLE
* @moduleid MOD_UPDATE_PROC_MEM_TO_USE
* @reasoncode RC_NO_UPDATE_WHEN_MEM_MISSING
* @devdesc No procs found with valid memory
* @custdesc A problem occurred during the IPL of
* the system: No memory found
* @userdata1 Saved value of ATTR_PROC_MEM_TO_USE
* @userdata2 Updated value of ATTR_PROC_MEM_TO_USE
*/
l_errl = hwasError(ERRL_SEV_UNRECOVERABLE,
MOD_UPDATE_PROC_MEM_TO_USE,
RC_NO_UPDATE_WHEN_MEM_MISSING,
l_proc_mem_to_use_save,
l_proc_mem_to_use);
hwasErrorAddProcedureCallout(l_errl,
EPUB_PRC_FIND_DECONFIGURED_PART,
SRCI_PRIORITY_HIGH);
break;
}
//set PROC_MEM_TO_USE to the group/chip id of the proc we want to
//use the mem of
//get all procs behind the input node
TargetHandleList l_procs;
getChildAffinityTargetsByState( l_procs,
i_node,
CLASS_CHIP,
TYPE_PROC,
UTIL_FILTER_ALL);
for (auto & l_proc : l_procs)
{
l_proc->setAttr<ATTR_PROC_MEM_TO_USE>(l_proc_mem_to_use);
}
} while (0);
return l_errl;
}
errlHndl_t check_for_missing_memory (const Target* i_node,
uint8_t & io_proc_mem_to_use,
bool & o_found_missing_mem)
{
errlHndl_t l_errl {nullptr};
o_found_missing_mem = true;
do
{
/////////////////////////////////////////////////////////////
//Step 1 -- Figure out the lowest group/chip id proc that has
// memory
/////////////////////////////////////////////////////////////
//get all procs behind the input node
TargetHandleList l_procs;
getChildAffinityTargetsByState( l_procs,
i_node,
CLASS_CHIP,
TYPE_PROC,
UTIL_FILTER_FUNCTIONAL);
//sort based on group/chip id. So, we can deterministically
//pick the processor with memory. This will also help guarantee
//that we will attempt to use master (or altmaster) proc's memory
//first before using slave proc's memory.
std::sort(l_procs.begin(), l_procs.end(),
[] (TargetHandle_t a, TargetHandle_t b)
{
return getGroupChipIdInfo(a) < getGroupChipIdInfo(b);
});
uint8_t l_temp_proc_mem_to_use = io_proc_mem_to_use;
//find a processor that has dimms
for (auto & l_proc : l_procs)
{
TargetHandleList l_funcDimms;
getChildAffinityTargetsByState( l_funcDimms,
l_proc,
CLASS_LOGICAL_CARD,
TYPE_DIMM,
UTIL_FILTER_FUNCTIONAL);
//Pick the first proc we find with dimms
if (l_funcDimms.size() > 0)
{
l_temp_proc_mem_to_use = getGroupChipIdInfo(l_proc);
break;
}
}
/////////////////////////////////////////////////////////////
//Step 2 -- Get the proc we are currently using the memory of
// and check if it has memory
/////////////////////////////////////////////////////////////
//get the proc pointed by PROC_MEM_TO_USE and check
//if there is memory behind that proc. We rely on the current
//value of PROC_MEM_TO_USE, so, we don't change our answer
//unnecessarily (in cases when both master proc and altmaster
//have memory)
uint8_t l_grp = 0;
uint8_t l_chip = 0;
parseProcMemToUseIntoGrpChipId(io_proc_mem_to_use, l_grp, l_chip);
PredicateAttrVal<ATTR_FABRIC_GROUP_ID> l_predGrp (l_grp);
PredicateAttrVal<ATTR_FABRIC_CHIP_ID> l_predChip (l_chip);
PredicateCTM l_predProc (CLASS_CHIP, TYPE_PROC);
PredicateIsFunctional l_isFunctional;
PredicatePostfixExpr l_procCheckExpr;
l_procCheckExpr.push(&l_predProc).push(&l_isFunctional).
push(&l_predGrp).push(&l_predChip).And().And().And();
TargetHandleList l_procMemUsedCurrently;
targetService().getAssociated(l_procMemUsedCurrently,
i_node,
TargetService::CHILD_BY_AFFINITY,
TargetService::IMMEDIATE,
&l_procCheckExpr);
HWAS_INF("check_for_missing_memory: looking for a proc with "
"grp=0x%x chip=0x%x, found %d procs",
l_grp, l_chip, l_procMemUsedCurrently.size());
if (l_procMemUsedCurrently.size() >= 1)
{
//found proc
//Check if proc whose memory we are currently using has dimms
TargetHandleList l_funcDimms;
getChildAffinityTargetsByState( l_funcDimms,
l_procMemUsedCurrently[0],
CLASS_LOGICAL_CARD,
TYPE_DIMM,
UTIL_FILTER_FUNCTIONAL);
if (l_funcDimms.size() > 0)
{
//we found dimms behind the proc we are currently using
o_found_missing_mem = false;
}
}
/////////////////////////////////////////////////////////////
//Step 3-- If proc picked in Step1 has lower group/chip id
// than current proc_mem_to_use value or
// there is no memory behind the currently used proc,
// then we update the proc_mem_to_use
//NOTE: This ensures that if someone replaces the dimm on a lowered
// number proc, then we can fall back to that lowered number
// proc. Also, it makes sure that we are updating only when
// current proc_mem_to_use doesn't have memory or it's not
// pointing to a valid proc.
/////////////////////////////////////////////////////////////
if ((l_temp_proc_mem_to_use < io_proc_mem_to_use)
|| (o_found_missing_mem))
{
HWAS_INF("check_for_missing_memory: found a need to switch"
" PROC_MEM_TO_USE from 0x%x to 0x%x",
io_proc_mem_to_use, l_temp_proc_mem_to_use);
io_proc_mem_to_use = l_temp_proc_mem_to_use;
}
else
{
HWAS_INF("check_for_missing_memory: kept PROC_MEM_TO_USE same"
" 0x%x", io_proc_mem_to_use);
}
} while (0);
return l_errl;
}
errlHndl_t check_current_proc_mem_to_use_is_still_valid (bool o_match)
{
errlHndl_t l_err {nullptr};
o_match = true;
do
{
//Get the master proc to get the current value of PROC_MEM_TO_USE
TargetHandle_t l_mProc;
l_err = targetService().queryMasterProcChipTargetHandle(l_mProc);
if (l_err)
{
HWAS_ERR("ERROR: getting master proc");
break;
}
auto l_proc_mem_to_use = l_mProc->getAttr<ATTR_PROC_MEM_TO_USE>();
//Get the node target to pass to check_for_missing_memory
TargetHandleList l_nodes;
getEncResources(l_nodes, TYPE_NODE, UTIL_FILTER_FUNCTIONAL);
HWAS_ASSERT((l_nodes.size() == 1), "Only expecting 1 functional node");
auto l_curr_proc_mem_to_use = l_proc_mem_to_use;
bool l_found_missing_mem {false};
l_err = HWAS::check_for_missing_memory(l_nodes[0],
l_proc_mem_to_use,
l_found_missing_mem);
if (l_err)
{
HWAS_ERR("ERROR: check_for_missing_memory");
break;
}
HWAS_INF("PROC_MEM_TO_USE currentVal=0x%x reComputedVal=0x%x",
l_curr_proc_mem_to_use, l_proc_mem_to_use);
if (l_curr_proc_mem_to_use != l_proc_mem_to_use)
{
HWAS_INF("check_current_proc_mem_to_use_is_still_valid: "
"currentVal and reComputerVal don't match");
o_match = false;
}
} while (0);
return l_err;
}
/**
* @brief Do presence detect on only MUX targets and enable HWAS state
*
* @param[in] i_sysTarget the top level target (CLASS_SYS)
* @return errlHndl_t return nullptr if no error,
* else return a handle to an error entry
*
*/
errlHndl_t discoverMuxTargetsAndEnable(const Target &i_sysTarget)
{
HWAS_DBG(ENTER_MRK"discoverMuxTargetsAndEnable");
errlHndl_t l_err{nullptr};
do
{
// Only get MUX targets
const PredicateCTM l_muxPred(CLASS_CHIP, TYPE_I2C_MUX);
TARGETING::PredicatePostfixExpr l_muxPredExpr;
l_muxPredExpr.push(&l_muxPred);
TargetHandleList l_pMuxCheckPres;
targetService().getAssociated( l_pMuxCheckPres, (&i_sysTarget),
TargetService::CHILD, TargetService::ALL, &l_muxPredExpr);
// Do the presence detect on only MUX targets
l_err = platPresenceDetect(l_pMuxCheckPres);
// If an issue with platPresenceDetect, then exit, returning
// error back to caller
if (nullptr != l_err)
{
break;
}
// Enable the HWAS State for the MUXes
const bool l_present(true);
const bool l_functional(true);
const uint32_t l_errlEid(0);
for (TargetHandle_t pTarget : l_pMuxCheckPres)
{
// set HWAS state to show MUX is present and functional
enableHwasState(pTarget, l_present, l_functional, l_errlEid);
}
} while (0);
HWAS_DBG(EXIT_MRK"discoverMuxTargetsAndEnable exit with %s",
(nullptr == l_err ? "no error" : "error"));
return l_err;
}
/**
* @brief Do presence detect on only PMIC targets and enable HWAS state
*
* @param[in] i_sysTarget the top level target (CLASS_SYS)
* @return errlHndl_t return nullptr if no error,
* else return a handle to an error entry
*
*/
errlHndl_t discoverPmicTargetsAndEnable(const Target &i_sysTarget)
{
HWAS_INF(ENTER_MRK"discoverPmicTargetsAndEnable");
errlHndl_t l_err{nullptr};
do
{
// Only get PMIC targets
const PredicateCTM l_pmicPred(CLASS_ASIC, TYPE_PMIC);
TARGETING::PredicatePostfixExpr l_asicPredExpr;
l_asicPredExpr.push(&l_pmicPred);
TargetHandleList l_pPmicCheckPres;
targetService().getAssociated( l_pPmicCheckPres, (&i_sysTarget),
TargetService::CHILD, TargetService::ALL, &l_asicPredExpr);
// Do the presence detect on only PMIC targets
// NOTE: this function will remove any non-functional targets
// from pPmicCheckPres
l_err = platPresenceDetect(l_pPmicCheckPres);
// If an issue with platPresenceDetect, then exit, returning
// error back to caller
if (nullptr != l_err)
{
break;
}
// Enable the HWAS State for the PMICs
const bool l_present(true);
const bool l_functional(true);
const uint32_t l_errlEid(0);
for (TargetHandle_t pTarget : l_pPmicCheckPres)
{
// set HWAS state to show PMIC is present and functional
enableHwasState(pTarget, l_present, l_functional, l_errlEid);
}
} while (0);
HWAS_INF(EXIT_MRK"discoverPmicTargetsAndEnable exit with %s",
(nullptr == l_err ? "no error" : "error"));
return l_err;
}
errlHndl_t discoverTargets()
{
HWAS_DBG("discoverTargets entry");
errlHndl_t errl = NULL;
// loop through all the targets and set HWAS_STATE to a known default
for (TargetIterator target = targetService().begin();
target != targetService().end();
++target)
{
// TODO:RTC:151617 Need to find a better way
// to initialize the target
TARGETING::ATTR_INIT_TO_AVAILABLE_type initToAvailable = false;
if( (target->tryGetAttr<TARGETING::ATTR_INIT_TO_AVAILABLE>(
initToAvailable))
&& (initToAvailable))
{
HwasState hwasState = target->getAttr<ATTR_HWAS_STATE>();
hwasState.deconfiguredByEid = 0;
hwasState.poweredOn = true;
hwasState.present = true;
hwasState.functional = true;
hwasState.dumpfunctional = false;
target->setAttr<ATTR_HWAS_STATE>(hwasState);
}
else
{
HwasState hwasState = target->getAttr<ATTR_HWAS_STATE>();
hwasState.deconfiguredByEid = 0;
hwasState.poweredOn = false;
hwasState.present = false;
hwasState.functional = false;
hwasState.dumpfunctional = false;
target->setAttr<ATTR_HWAS_STATE>(hwasState);
}
}
// Assumptions and actions:
// CLASS_SYS (exactly 1) - mark as present
// CLASS_ENC, TYPE_PROC, TYPE_MCS, TYPE_MEMBUF, TYPE_DIMM
// (ALL require hardware query) - call platPresenceDetect
// \->children: CLASS_* (NONE require hardware query) - mark as present
do
{
// find CLASS_SYS (the top level target)
Target* pSys;
targetService().getTopLevelTarget(pSys);
HWAS_ASSERT(pSys,
"HWAS discoverTargets: no CLASS_SYS TopLevelTarget found");
// mark this as present
enableHwasState(pSys, true, true, 0);
HWAS_DBG("pSys %.8X - marked present",
pSys->getAttr<ATTR_HUID>());
// Certain targets have dependencies on the MUX, so it is best to
// presence detect and enable the MUX before moving on to these targets.
// Please take this into consideration if code needs to be rearranged
// in the future.
errl = discoverMuxTargetsAndEnable(*pSys);
if (errl != NULL)
{
break; // break out of the do/while so that we can return
}
PredicateCTM predEnc(CLASS_ENC);
PredicateCTM predChip(CLASS_CHIP);
PredicateCTM predDimm(CLASS_LOGICAL_CARD, TYPE_DIMM);
PredicateCTM predMcs(CLASS_UNIT, TYPE_MCS);
PredicateCTM predPmic(CLASS_ASIC, TYPE_PMIC);
// We can ignore chips of TYPE_I2C_MUX because they
// were already detected above in discoverMuxTargetsAndEnable
// Also we can ignore chips of type PMIC because they will be processed
// below.
PredicateCTM predMux(CLASS_CHIP, TYPE_I2C_MUX);
PredicatePostfixExpr checkExpr;
checkExpr.push(&predChip).push(&predDimm).Or().push(&predEnc).Or().
push(&predMcs).Or().push(&predMux).Not().And().
push(&predPmic).Not().And();
TargetHandleList pCheckPres;
targetService().getAssociated( pCheckPres, pSys,
TargetService::CHILD, TargetService::ALL, &checkExpr );
// pass this list to the hwas platform-specific api where
// pCheckPres will be modified to only have present targets
HWAS_DBG("pCheckPres size: %d", pCheckPres.size());
errl = platPresenceDetect(pCheckPres);
HWAS_DBG("pCheckPres size: %d", pCheckPres.size());
if (errl != NULL)
{
break; // break out of the do/while so that we can return
}
// for each, read their ID/EC level. if that works,
// mark them and their descendants as present
// read the partialGood vector to determine if any are not functional
// and read and store values from the PR keyword
// list of procs and data that we'll need to look at when potentially
// reducing the list of valid ECs later
procRestrict_t l_procEntry;
std::vector <procRestrict_t> l_procRestrictList;
// sort the list by ATTR_HUID to ensure that we
// start at the same place each time
std::sort(pCheckPres.begin(), pCheckPres.end(),
compareTargetHuid);
for (TargetHandleList::const_iterator pTarget_it = pCheckPres.begin();
pTarget_it != pCheckPres.end();
++pTarget_it
)
{
TargetHandle_t pTarget = *pTarget_it;
// if CLASS_ENC is still in this list, mark as present
if (pTarget->getAttr<ATTR_CLASS>() == CLASS_ENC)
{
enableHwasState(pTarget, true, true, 0);
HWAS_DBG("pTarget %.8X - CLASS_ENC marked present",
pTarget->getAttr<ATTR_HUID>());
// on to the next target
continue;
}
bool chipPresent = true;
bool chipFunctional = true;
bool createInfoLog = false;
uint32_t errlEid = 0;
uint16_t pgData[VPD_CP00_PG_DATA_ENTRIES];
bzero(pgData, sizeof(pgData));
// Cache the target type
auto l_targetType = pTarget->getAttr<ATTR_TYPE>();
// This error is created preemptively to capture any targets that
// were deemed non-functional for partial good reasons. If there are
// no issues, then this error log is deleted.
/*@
* @errortype
* @severity ERRL_SEV_INFORMATIONAL
* @moduleid MOD_DISCOVER_TARGETS
* @reasoncode RC_PARTIAL_GOOD_INFORMATION
* @devdesc Partial Good (PG) issues are present within the
* system and this error log contains information
* about which targets, procs, and entries in the
* PG vector are problematic.
* @custdesc An issue occured during IPL of the system:
* Internal Firmware Error
* @userdata1 None
* @userdata2 None
*/
errlHndl_t infoErrl = hwasError(ERRL_SEV_INFORMATIONAL,
MOD_DISCOVER_TARGETS,
RC_PARTIAL_GOOD_INFORMATION);
if( (pTarget->getAttr<ATTR_CLASS>() == CLASS_CHIP)
&& (l_targetType != TYPE_TPM)
&& (l_targetType != TYPE_SP)
&& (l_targetType != TYPE_BMC)
&& (l_targetType != TYPE_I2C_MUX))
{
// read Chip ID/EC data from these physical chips
errl = platReadIDEC(pTarget);
if (errl)
{
// read of ID/EC failed even tho we THOUGHT we were present.
HWAS_INF("pTarget 0x%.8X - read IDEC failed "
"(eid 0x%X) - bad",
get_huid(pTarget), errl->eid());
// chip NOT present and NOT functional, so that FSP doesn't
// include this for HB to process
chipPresent = false;
chipFunctional = false;
errlEid = errl->eid();
// commit the error but keep going
errlCommit(errl, HWAS_COMP_ID);
// errl is now NULL
}
else if (l_targetType == TYPE_PROC)
{
// read partialGood vector from these as well.
errl = platReadPartialGood(pTarget, pgData);
if (errl)
{ // read of PG failed even tho we were present..
HWAS_INF("pTarget 0x%.8X - read PG failed "
"(eid 0x%X) - bad",
get_huid(pTarget), errl->eid());
chipFunctional = false;
errlEid = errl->eid();
// commit the error but keep going
errlCommit(errl, HWAS_COMP_ID);
// errl is now NULL
}
else
{
// look at the 'nest' logic to override the
// functionality of this proc
chipFunctional =
isChipFunctional(pTarget,
pgData);
if(!chipFunctional)
{
// Add this proc to the informational error log.
platHwasErrorAddHWCallout(infoErrl,
pTarget,
SRCI_PRIORITY_HIGH,
NO_DECONFIG,
GARD_NULL);
createInfoLog = true;
}
// Fill in a dummy restrict list
l_procEntry.target = pTarget;
// every proc is uniquely counted
l_procEntry.group = pTarget->getAttr<ATTR_HUID>();
// just 1 proc per group
l_procEntry.procs = 1;
// indicates we should use all available ECs
l_procEntry.maxECs = UINT32_MAX;
l_procRestrictList.push_back(l_procEntry);
}
} // TYPE_PROC
} // CLASS_CHIP
HWAS_DBG("pTarget %.8X - detected present, %sfunctional",
pTarget->getAttr<ATTR_HUID>(),
chipFunctional ? "" : "NOT ");
// Now determine if the descendants of this target are
// present and/or functional
checkPartialGoodForDescendants(pTarget,
pgData,
chipFunctional,
errlEid,
infoErrl,
createInfoLog);
// set HWAS state to show CHIP is present, functional per above
enableHwasState(pTarget, chipPresent, chipFunctional, errlEid);
// If there were partial good issues with the chip or its
// descendents then create an info error log. Otherwise, delete
// and move on.
if (createInfoLog)
{
TargetHandle_t l_masterProc = nullptr;
//Get master proc
errl =
targetService()
.queryMasterProcChipTargetHandle(l_masterProc);
if (errl)
{
HWAS_ERR("discoverTargets: unable to get master proc");
errlCommit(errl, HWAS_COMP_ID);
errlCommit(infoErrl, HWAS_COMP_ID);
break;
}
auto l_model = l_masterProc->getAttr<ATTR_MODEL>();
// Setup model dependent all good data
uint16_t l_modelPgData[MODEL_PG_DATA_ENTRIES] = {0};
l_modelPgData[0] = (MODEL_NIMBUS == l_model)
? (VPD_CP00_PG_XBUS_GOOD_NIMBUS
| VPD_CP00_PG_XBUS_IOX[0])
: VPD_CP00_PG_XBUS_GOOD_CUMULUS;
l_modelPgData[1] = (TARGETING::MODEL_NIMBUS == l_model)
? VPD_CP00_PG_RESERVED_GOOD
: VPD_CP00_PG_OBUS_GOOD;
hwasErrorAddPartialGoodFFDC(infoErrl, l_modelPgData, pgData);
errlCommit(infoErrl, HWAS_COMP_ID);
}
else
{
delete infoErrl;
infoErrl = nullptr;
}
} // for pTarget_it
// After processing all other targets look at the pmics,
// we must wait because we need the SPD cached from the OCMBs
// which occurs when OCMBs go through presence detection above
errl = discoverPmicTargetsAndEnable(*pSys);
if (errl != NULL)
{
break; // break out of the do/while so that we can return
}
// Check for non-present Procs and if found, trigger
// DeconfigGard::_invokeDeconfigureAssocProc() to run by setting
// setXAOBusEndpointDeconfigured to true
PredicateCTM predProc(CLASS_CHIP, TYPE_PROC);
TargetHandleList l_procs;
targetService().getAssociated(l_procs,
pSys,
TargetService::CHILD,
TargetService::ALL,
&predProc);
for (TargetHandleList::const_iterator
l_procsIter = l_procs.begin();
l_procsIter != l_procs.end();
++l_procsIter)
{
if ( !(*l_procsIter)->getAttr<ATTR_HWAS_STATE>().present )
{
HWAS_INF("discoverTargets: Proc %.8X not present",
(*l_procsIter)->getAttr<ATTR_HUID>());
HWAS::theDeconfigGard().setXAOBusEndpointDeconfigured(true);
}
}
//Check all of the slave processor's EC levels to ensure they match master
//processor's EC level.
//function will return error log pointing to all error logs created
//by this function as this function could detect multiple procs w/
//bad ECs and will make a log for each
errl = validateProcessorEcLevels();
if (errl)
{
HWAS_ERR("discoverTargets: validateProcessorEcLevels failed");
break;
}
// Potentially reduce the number of ec/core units that are present
// based on fused mode
// marking bad units as present=false;
// deconfigReason = 0 because present is false so this is not a
// deconfigured event.
errl = restrictECunits(l_procRestrictList, false, 0);
if (errl)
{
HWAS_ERR("discoverTargets: restrictECunits failed");
break;
}
// Mark any MCA units that are present but have a disabled port
// as non-functional
errl = markDisabledMcas();
if (errl)
{
HWAS_ERR("discoverTargets: markDisabledMcas failed");
break;
}
// call invokePresentByAssoc() to obtain functional MCSs, MEMBUFs, and
// DIMMs for non-direct memory or MCSs, MCAs, and DIMMs for direct
// memory. Call algorithm function presentByAssoc() to determine
// targets that need to be deconfigured
invokePresentByAssoc();
#ifdef __HOSTBOOT_MODULE
if (INITSERVICE::isSMPWrapConfig())
{
//Due to fabric limitations, we can only have 2 parallel OBUS
//connections at a time in wrap config. So, deconfigure appropriate