-
Notifications
You must be signed in to change notification settings - Fork 97
/
nvdimm_rt.C
1836 lines (1583 loc) · 73.7 KB
/
nvdimm_rt.C
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
/* $Source: src/usr/isteps/nvdimm/runtime/nvdimm_rt.C $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
/* Licensed under the Apache License, Version 2.0 (the "License"); */
/* you may not use this file except in compliance with the License. */
/* You may obtain a copy of the License at */
/* */
/* http://www.apache.org/licenses/LICENSE-2.0 */
/* */
/* Unless required by applicable law or agreed to in writing, software */
/* distributed under the License is distributed on an "AS IS" BASIS, */
/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
/* implied. See the License for the specific language governing */
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
/**
* @file nvdimm_rt.C
*
* @brief NVDIMM functions only needed for runtime. These functions include
* but are not limited to arming/disarming the NVDIMM along with methods
* to poll the arming and check the status of the arming. Checking the
* error state of the NVDIMM, getting a random number with the darn
* instruction and checking the ES or NVM health status.
*/
/// BPM - Backup Power Module
#include <trace/interface.H>
#include <errl/errlentry.H>
#include <errl/errlmanager.H>
#include <errl/errludstring.H>
#include <util/runtime/rt_fwreq_helper.H>
#include <targeting/common/attributes.H>
#include <targeting/common/commontargeting.H>
#include <targeting/common/util.H>
#include <targeting/common/utilFilter.H>
#include <usr/runtime/rt_targeting.H>
#include <runtime/interface.h>
#include <arch/ppc.H>
#include <isteps/nvdimm/nvdimmreasoncodes.H>
#include "../errlud_nvdimm.H"
#include "../nvdimmErrorLog.H"
#include <isteps/nvdimm/nvdimm.H> // implements some of these
#include "../nvdimm.H" // for g_trac_nvdimm
#include <sys/time.h>
//#define TRACUCOMP(args...) TRACFCOMP(args)
#define TRACUCOMP(args...)
using namespace TARGETING;
using namespace ERRORLOG;
namespace NVDIMM
{
static constexpr uint64_t DARN_ERROR_CODE = 0xFFFFFFFFFFFFFFFFull;
static constexpr uint32_t MAX_DARN_ERRORS = 10;
static constexpr uint8_t FW_OPS_UPDATE = 0x04;
static constexpr size_t ARM_MAX_RETRY_COUNT = 1;
/**
* @brief This function polls the command status register for arm completion
* (does not indicate success or fail)
*
* @param[in] i_nvdimm - nvdimm target with NV controller
*
* @param[out] o_poll - total polled time in ms
*
* @return errlHndl_t - Null if successful, otherwise a pointer to
* the error log.
*/
errlHndl_t nvdimmPollArmDone(Target* i_nvdimm,
uint32_t &o_poll)
{
TRACUCOMP(g_trac_nvdimm, ENTER_MRK"nvdimmPollArmDone() nvdimm[%X]", get_huid(i_nvdimm) );
errlHndl_t l_err = nullptr;
l_err = nvdimmPollStatus ( i_nvdimm, ARM, o_poll);
TRACUCOMP(g_trac_nvdimm, EXIT_MRK"nvdimmPollArmDone() nvdimm[%X]",
get_huid(i_nvdimm));
return l_err;
}
/**
* @brief This function checks the arm status register to make sure
* the trigger has been armed to ddr_reset_n
*
* @param[in] i_nvdimm - nvdimm target with NV controller
* @param[in] i_arm_timeout - nvdimm local timeout status
*
* @return errlHndl_t - Null if successful, otherwise a pointer to
* the error log.
*/
errlHndl_t nvdimmCheckArmSuccess(Target *i_nvdimm, bool i_arm_timeout)
{
TRACUCOMP(g_trac_nvdimm, ENTER_MRK"nvdimmCheckArmSuccess() nvdimm[%X]",
get_huid(i_nvdimm));
errlHndl_t l_err = nullptr;
uint8_t l_data = 0;
l_err = nvdimmReadReg(i_nvdimm, ARM_STATUS, l_data);
if (l_err)
{
TRACFCOMP(g_trac_nvdimm, ERR_MRK"nvdimmCheckArmSuccess() nvdimm[%X]"
"failed to read arm status reg!",get_huid(i_nvdimm));
}
else if (((l_data & ARM_ERROR) == ARM_ERROR) || ((l_data & RESET_N_ARMED) != RESET_N_ARMED) || i_arm_timeout)
{
TRACFCOMP(g_trac_nvdimm, ERR_MRK"nvdimmCheckArmSuccess() nvdimm[%X]"
"failed to arm!",get_huid(i_nvdimm));
/*@
*@errortype
*@reasoncode NVDIMM_ARM_FAILED
*@severity ERRORLOG_SEV_PREDICTIVE
*@moduleid NVDIMM_SET_ARM
*@userdata1[0:31] Related ops (0xff = NA)
*@userdata1[32:63] Target Huid
*@userdata2 <UNUSED>
*@devdesc Encountered error arming the catastrophic save
* trigger on NVDIMM. Make sure an energy source
* is connected to the NVDIMM and the ES policy
* is set properly
*@custdesc NVDIMM encountered error arming save trigger
*/
l_err = new ERRORLOG::ErrlEntry( ERRORLOG::ERRL_SEV_PREDICTIVE,
NVDIMM_SET_ARM,
NVDIMM_ARM_FAILED,
TWO_UINT32_TO_UINT64(ARM, get_huid(i_nvdimm)),
0x0,
ERRORLOG::ErrlEntry::NO_SW_CALLOUT );
l_err->collectTrace(NVDIMM_COMP_NAME, 256 );
nvdimmAddVendorLog(i_nvdimm, l_err);
// Failure to arm could mean internal NV controller error or
// even error on the battery pack. NVDIMM will lose persistency
// if failed to arm trigger
l_err->addHwCallout( i_nvdimm,
HWAS::SRCI_PRIORITY_HIGH,
HWAS::NO_DECONFIG,
HWAS::GARD_Fatal);
}
TRACUCOMP(g_trac_nvdimm, EXIT_MRK"nvdimmCheckArmSuccess() nvdimm[%X] ret[%X]",
get_huid(i_nvdimm), l_data);
return l_err;
}
/**
* @brief This function performs arm precheck.
*
* @param[in] i_nvdimm - nvdimm target with NV controller
*
* @return errlHndl_t - Null if successful, otherwise a pointer to
* the error log.
*/
errlHndl_t nvdimmArmPreCheck(Target* i_nvdimm)
{
TRACUCOMP(g_trac_nvdimm, ENTER_MRK"nvdimmArmPreCheck() nvdimm[%X]",
get_huid(i_nvdimm));
errlHndl_t l_err = nullptr;
uint8_t l_ready = 0;
uint8_t l_fwupdate = 0;
uint8_t l_module_health = 0;
uint8_t l_continue = true;
auto l_RegInfo = nvdimm_reg_t();
do
{
// Read out the Module Health status register
l_err = nvdimmReadReg(i_nvdimm, MODULE_HEALTH_STATUS0, l_module_health);
if (l_err)
{
TRACFCOMP(g_trac_nvdimm, ERR_MRK"nvdimmArmPreCheck() nvdimm[%X] - failed to read Module Health Status",
get_huid(i_nvdimm));
errlCommit( l_err, NVDIMM_COMP_ID );
l_continue = false;
break;
}
// Read out the NVDimm Ready register
l_err = nvdimmReadReg(i_nvdimm, NVDIMM_READY, l_ready);
if (l_err)
{
TRACFCOMP(g_trac_nvdimm, ERR_MRK"nvdimmArmPreCheck() nvdimm[%X] - failed to read NVDimm Ready register",
get_huid(i_nvdimm));
errlCommit( l_err, NVDIMM_COMP_ID );
l_continue = false;
break;
}
// Read out the FW OPs Status register
l_err = nvdimmReadReg(i_nvdimm, FIRMWARE_OPS_STATUS, l_fwupdate);
if (l_err)
{
TRACFCOMP(g_trac_nvdimm, ERR_MRK"nvdimmArmPreCheck() nvdimm[%X] - failed to read Firmware OPs Status register",
get_huid(i_nvdimm));
errlCommit( l_err, NVDIMM_COMP_ID );
l_continue = false;
}
}while(0);
// Check ARM pre-requisites
// All nvdimms in i_nvdimmTargetList must pass the pre-req checks
// before continuing with arm.
if ((!l_continue) || (l_module_health & NVM_LIFETIME_ERROR)
|| (l_ready != NV_READY)
|| (l_fwupdate & FW_OPS_UPDATE))
{
TRACFCOMP(g_trac_nvdimm, ERR_MRK"nvdimmArmPreCheck() nvdimm[%X] - failed NVDimm Arm prechecks",
get_huid(i_nvdimm));
/*@
*@errortype
*@reasoncode NVDIMM_ARM_PRE_CHECK_FAILED
*@severity ERRORLOG_SEV_PREDICTIVE
*@moduleid NVDIMM_ARM_PRE_CHECK
*@userdata1[0:31] Target Huid
*@userdata1[32:39] l_continue
*@userdata1[40:47] l_module_health
*@userdata1[48:56] l_ready
*@userdata1[57:63] l_fwupdate
*@userdata2 <UNUSED>
*@devdesc NVDIMM failed arm precheck. Refer to FFDC for exact reason
*@custdesc NVDIMM failed the arm precheck and is unable to arm
*/
l_err = new ERRORLOG::ErrlEntry( ERRORLOG::ERRL_SEV_PREDICTIVE,
NVDIMM_ARM_PRE_CHECK,
NVDIMM_ARM_PRE_CHECK_FAILED,
NVDIMM_SET_USER_DATA_1(TARGETING::get_huid(i_nvdimm),
FOUR_UINT8_TO_UINT32(l_continue, l_module_health, l_ready, l_fwupdate)),
0x0,
ERRORLOG::ErrlEntry::NO_SW_CALLOUT );
l_err->collectTrace( NVDIMM_COMP_NAME );
// Callout the dimm
l_err->addHwCallout( i_nvdimm,
HWAS::SRCI_PRIORITY_LOW,
HWAS::NO_DECONFIG,
HWAS::GARD_NULL);
// Read relevant regs for trace data
nvdimmTraceRegs(i_nvdimm, l_RegInfo);
nvdimmAddPage4Regs(i_nvdimm,l_err);
nvdimmAddVendorLog(i_nvdimm, l_err);
// Add reg traces to the error log
NVDIMM::UdNvdimmOPParms( l_RegInfo ).addToLog(l_err);
}
TRACUCOMP(g_trac_nvdimm, EXIT_MRK"nvdimmArmPreCheck() nvdimm[%X]",
get_huid(i_nvdimm));
return l_err;
}
bool nvdimmArm(TargetHandleList &i_nvdimmTargetList)
{
bool o_arm_successful = true;
bool l_continue = true;
bool l_arm_timeout = false;
uint8_t l_data;
auto l_RegInfo = nvdimm_reg_t();
uint64_t l_writeData;
uint32_t l_writeAddress;
size_t l_writeSize = sizeof(l_writeData);
TRACFCOMP(g_trac_nvdimm, ENTER_MRK"nvdimmArm() numNvdimm[%d]",
i_nvdimmTargetList.size());
errlHndl_t l_err = nullptr;
errlHndl_t l_err_t = nullptr;
// Prerequisite Arm Checks
for (auto const l_nvdimm : i_nvdimmTargetList)
{
l_err = nvdimmArmPreCheck(l_nvdimm);
// If we are failing the precheck, commit the error then exit
if (l_err)
{
TRACFCOMP(g_trac_nvdimm, ERR_MRK"nvdimmArm() failed arm precheck, exiting");
errlCommit(l_err, NVDIMM_COMP_ID);
return false;
}
}
// Encryption unlocked check
// Check one nvdimm at a time
for (auto const l_nvdimm : i_nvdimmTargetList)
{
// Unlock function will create an error log
// Create another here to make it clear that the arm failed
TargetHandleList l_nvdimmTargetList;
l_nvdimmTargetList.push_back(l_nvdimm);
if (!nvdimm_encrypt_unlock(l_nvdimmTargetList))
{
TRACFCOMP(g_trac_nvdimm, ERR_MRK"nvdimmArm() nvdimm[%X] - failed NVDimm Arm encryption unlock",
get_huid(l_nvdimm));
/*@
*@errortype
*@reasoncode NVDIMM_ARM_ENCRYPTION_UNLOCK_FAILED
*@severity ERRORLOG_SEV_PREDICTIVE
*@moduleid NVDIMM_ARM
*@userdata1 Target Huid
*@userdata2 <UNUSED>
*@devdesc NVDIMM failed to unlock encryption during arming
*@custdesc NVDIMM failed to ARM
*/
l_err = new ERRORLOG::ErrlEntry(
ERRORLOG::ERRL_SEV_PREDICTIVE,
NVDIMM_ARM,
NVDIMM_ARM_ENCRYPTION_UNLOCK_FAILED,
get_huid(l_nvdimm),
0x0,
ERRORLOG::ErrlEntry::NO_SW_CALLOUT );
l_err->collectTrace( NVDIMM_COMP_NAME );
// Callout the dimm
l_err->addHwCallout( l_nvdimm,
HWAS::SRCI_PRIORITY_MED,
HWAS::DELAYED_DECONFIG,
HWAS::GARD_NULL);
// Read relevant regs for trace data
nvdimmTraceRegs(l_nvdimm, l_RegInfo);
nvdimmAddPage4Regs(l_nvdimm,l_err);
nvdimmAddVendorLog(l_nvdimm, l_err);
// Add reg traces to the error log
NVDIMM::UdNvdimmOPParms( l_RegInfo ).addToLog(l_err);
// Commit the error then exit
errlCommit(l_err, NVDIMM_COMP_ID);
return false;
}
}
// Mask MBACALFIR EventN to separate ARM handling
for (TargetHandleList::iterator it = i_nvdimmTargetList.begin();
it != i_nvdimmTargetList.end();)
{
TargetHandleList l_mcaList;
getParentAffinityTargets(l_mcaList, *it, CLASS_UNIT, TYPE_MCA);
assert(l_mcaList.size(), "nvdimmArm() failed to find parent MCA.");
l_writeAddress = MBACALFIR_OR_MASK_REG;
l_writeData = MBACALFIR_EVENTN_OR_BIT;
l_err = deviceWrite(l_mcaList[0], &l_writeData, l_writeSize,
DEVICE_SCOM_ADDRESS(l_writeAddress));
if(l_err)
{
TRACFCOMP(g_trac_nvdimm, "SCOM to address 0x%08x failed",
l_writeAddress);
errlCommit( l_err, NVDIMM_COMP_ID );
}
it++;
}
for (auto const l_nvdimm : i_nvdimmTargetList)
{
l_arm_timeout = false;
// skip if the nvdimm is already armed
ATTR_NVDIMM_ARMED_type l_armed_state = {};
l_armed_state = l_nvdimm->getAttr<ATTR_NVDIMM_ARMED>();
if (l_armed_state.armed)
{
TRACFCOMP(g_trac_nvdimm, "nvdimmArm() nvdimm[%X] called when already armed", get_huid(l_nvdimm));
continue;
}
// Set ES Policy, contains all of its status checks
l_err = nvdimmSetESPolicy(l_nvdimm);
if (l_err)
{
TRACFCOMP(g_trac_nvdimm, "nvdimmArm() nvdimm[%X] failed to set ES Policy", get_huid(l_nvdimm));
o_arm_successful = false;
nvdimmDisarm(i_nvdimmTargetList);
// Committing the error as we don't want this to interrupt
// the boot. This will notify the user that action is needed
// on this module
l_err->setSev(ERRORLOG::ERRL_SEV_PREDICTIVE);
l_err->collectTrace(NVDIMM_COMP_NAME);
// Callout the nvdimm on high and gard
l_err->addHwCallout( l_nvdimm,
HWAS::SRCI_PRIORITY_HIGH,
HWAS::NO_DECONFIG,
HWAS::GARD_Fatal);
errlCommit( l_err, NVDIMM_COMP_ID );
break;
}
// Clear all status registers in case of leftover bits
l_err = nvdimmWriteReg(l_nvdimm, NVDIMM_MGT_CMD0, CLEAR_ALL_STATUS);
if (l_err)
{
TRACFCOMP(g_trac_nvdimm, ERR_MRK"nvdimmArm() nvdimm[%X] - error clearing all status registers",
get_huid(l_nvdimm));
break;
}
bool l_is_retryable = true;
//continue flag set by the retry loop to continue on the outer loop
bool l_continue_arm = false;
//break flag set by the retry loop to break on the outer loop
bool l_break = false;
errlHndl_t l_err_retry = nullptr;
// Attempt arm multiple times in case of glitches
for (size_t l_retry = 0; l_retry <= ARM_MAX_RETRY_COUNT; l_retry++)
{
l_err = NVDIMM::nvdimmChangeArmState(l_nvdimm, ARM_TRIGGER);
// If we run into any error here we will just
// commit the error log and move on. Let the
// system continue to boot and let the user
// salvage the data
if (l_err)
{
TRACFCOMP(g_trac_nvdimm, "nvdimmArm() nvdimm[%X] failed to trigger arm", get_huid(l_nvdimm));
nvdimmDisarm(i_nvdimmTargetList);
// Committing the error as we don't want this to interrupt
// the boot. This will notify the user that action is needed
// on this module
l_err->setSev(ERRORLOG::ERRL_SEV_PREDICTIVE);
l_err->collectTrace(NVDIMM_COMP_NAME);
errlCommit( l_err, NVDIMM_COMP_ID );
o_arm_successful = false;
// Cause the main loop to skip the rest of the arm procedure
// and move to the next target
l_continue_arm = true;
break;
}
// Arm happens one module at a time. No need to set any offset on the counter
uint32_t l_poll = 0;
l_err = nvdimmPollArmDone(l_nvdimm, l_poll);
if (l_err)
{
TRACFCOMP(g_trac_nvdimm, "nvdimmArm() nvdimm[%X] arm command timed out", get_huid(l_nvdimm));
l_arm_timeout = true;
l_err_t = notifyNvdimmProtectionChange(l_nvdimm, NVDIMM_DISARMED);
if (l_err_t)
{
errlCommit( l_err_t, NVDIMM_COMP_ID );
}
// Committing the error as we don't want this to interrupt
// the boot. This will notify the user that action is needed
// on this module
l_err->setSev(ERRORLOG::ERRL_SEV_PREDICTIVE);
l_err->collectTrace(NVDIMM_COMP_NAME);
errlCommit( l_err, NVDIMM_COMP_ID );
o_arm_successful = false;
}
// Pass l_arm_timeout value in for health status check
l_continue = l_arm_timeout;
// Sleep for 1 second before checking the health status
// to let the glitches settle in case there were any
nanosleep(1, 0);
// Check health status registers and exit if required
l_err = nvdimmHealthStatusCheck( l_nvdimm, HEALTH_PRE_ARM, l_continue );
// Check for health status failure
// Any fail picked up by the health check is a legit fail
if (l_err)
{
TRACFCOMP(g_trac_nvdimm, "nvdimmArm() nvdimm[%X] failed first health status check", get_huid(l_nvdimm));
// The arm timeout variable is used here as the continue variable for the
// health status check. This was done to include the timeout for use in the check
// If true either the arm timed out with a health status fail or the
// health status check failed with another disarm and exit condition
if (!l_continue)
{
errlCommit( l_err, NVDIMM_COMP_ID );
// Disarming all dimms due to error
nvdimmDisarm(i_nvdimmTargetList);
o_arm_successful = false;
// Cause the main loop to exit out of the main arm procedure
l_break = true;
break;
}
else
{
errlCommit( l_err, NVDIMM_COMP_ID );
// Cause the main loop to skip the rest of the arm procedure
// and move to the next target
l_continue_arm = true;
break;
}
}
l_err = nvdimmCheckArmSuccess(l_nvdimm, l_arm_timeout);
// At this point we have passed the health check. If the arm were
// to fail now, it is likely it was due to some glitch. Let's retry
// the arm again as long as the fail is not due to timeout.
// A timeout would mean a charging issue, it would have been caught
// by the health check.
l_is_retryable = !l_arm_timeout && l_retry < ARM_MAX_RETRY_COUNT;
if (l_err)
{
TRACFCOMP(g_trac_nvdimm, "nvdimmArm() nvdimm[%X] failed to succesfully arm. %s retryable.",
get_huid(l_nvdimm), l_is_retryable? "IS" : "NOT");
if (l_is_retryable)
{
// Save the original error
l_err_retry = l_err;
/*@
*@errortype
*@reasoncode NVDIMM_ARM_RETRY
*@severity ERRORLOG_SEV_INFORMATIONAL
*@moduleid NVDIMM_ARM_ERASE
*@userdata1[0:31] Target Huid
*@userdata1[32:39] l_is_retryable
*@userdata1[40:47] MAX arm retry count
*@userdata2[0:31] Original errlog plid
*@userdata2[32:63] Original errlog reason code
*@devdesc NVDIMM encountered a glitch causing the initial
* arm to fail. System firmware will retry the arm
*@custdesc NVDIMM requires an arm retry
*/
l_err = new ERRORLOG::ErrlEntry( ERRORLOG::ERRL_SEV_INFORMATIONAL,
NVDIMM_ARM_ERASE,
NVDIMM_ARM_RETRY,
NVDIMM_SET_USER_DATA_1(TARGETING::get_huid(l_nvdimm),
FOUR_UINT8_TO_UINT32(l_is_retryable, ARM_MAX_RETRY_COUNT,0,0)),
TWO_UINT32_TO_UINT64(l_err_retry->plid(), l_err_retry->reasonCode()),
ERRORLOG::ErrlEntry::NO_SW_CALLOUT );
l_err->collectTrace( NVDIMM_COMP_NAME );
// Callout the dimm
l_err->addHwCallout( l_nvdimm,
HWAS::SRCI_PRIORITY_LOW,
HWAS::NO_DECONFIG,
HWAS::GARD_NULL);
errlCommit( l_err, NVDIMM_COMP_ID );
}
else
{
// Handle retryable error
if (l_err_retry)
{
ERRORLOG::ErrlUserDetailsString("Arm RETRY failed").addToLog(l_err_retry);
// Delete the current errlog and use the original errlog for callout
delete l_err;
l_err = l_err_retry;
l_err_retry = nullptr;
}
// Disarming all dimms due to error
nvdimmDisarm(i_nvdimmTargetList);
l_err_t = notifyNvdimmProtectionChange(l_nvdimm, NVDIMM_DISARMED);
if (l_err_t)
{
errlCommit( l_err_t, NVDIMM_COMP_ID );
}
// Committing the error as we don't want this to interrupt
// the boot. This will notify the user that action is needed
// on this module
l_err->setSev(ERRORLOG::ERRL_SEV_PREDICTIVE);
l_err->collectTrace(NVDIMM_COMP_NAME);
// Dump Traces for error logs
nvdimmTraceRegs( l_nvdimm, l_RegInfo );
nvdimmAddPage4Regs(l_nvdimm,l_err);
// Add reg traces to the error log
NVDIMM::UdNvdimmOPParms( l_RegInfo ).addToLog(l_err);
errlCommit(l_err, NVDIMM_COMP_ID);
o_arm_successful = false;
// Cause the main loop to exit out of the main arm procedure
l_break = true;
break;
}
}
else
{
// Arm worked. Exit the retry loop
break;
} // close nvdimmCheckArmSuccess check
} // close arm retry loop
if (l_continue_arm)
{
continue;
}
else if (l_break)
{
break;
}
// After arming the trigger, erase the image to prevent the possible
// stale image getting the restored on the next boot in case of failed
// save.
l_err = nvdimmEraseNF(l_nvdimm);
if (l_err)
{
TRACFCOMP(g_trac_nvdimm, "nvdimmArm() nvdimm[%X] failed to erase post arm", get_huid(l_nvdimm));
// Disarming all dimms due to error
nvdimmDisarm(i_nvdimmTargetList);
// Committing the error as we don't want this to interrupt
// the boot. This will notify the user that action is needed
// on this module
l_err->setSev(ERRORLOG::ERRL_SEV_PREDICTIVE);
l_err->collectTrace(NVDIMM_COMP_NAME);
errlCommit( l_err, NVDIMM_COMP_ID );
o_arm_successful = false;
break;
}
// Arm successful, update armed status
l_err = NVDIMM::notifyNvdimmProtectionChange(l_nvdimm,
NVDIMM::NVDIMM_ARMED);
if (l_err)
{
l_err->setSev(ERRORLOG::ERRL_SEV_PREDICTIVE);
l_err->collectTrace(NVDIMM_COMP_NAME);
errlCommit(l_err, NVDIMM_COMP_ID);
}
// Enable Persistency and Warning Threshold notifications
l_err = nvdimmWriteReg(l_nvdimm, SET_EVENT_NOTIFICATION_CMD, ENABLE_NOTIFICATIONS);
if (l_err)
{
TRACFCOMP(g_trac_nvdimm, ERR_MRK"NDVIMM HUID[%X] setting persistency notification",
TARGETING::get_huid(l_nvdimm));
break;
}
// Check notification status and errors
l_err = nvdimmReadReg(l_nvdimm, SET_EVENT_NOTIFICATION_STATUS, l_data);
if (l_err)
{
break;
}
else if (((l_data & SET_EVENT_NOTIFICATION_ERROR) == SET_EVENT_NOTIFICATION_ERROR)
|| ((l_data & NOTIFICATIONS_ENABLED) != NOTIFICATIONS_ENABLED))
{
TRACFCOMP(g_trac_nvdimm, "nvdimmArm() nvdimm[%X] failed to set event notification",
get_huid(l_nvdimm));
// Set NVDIMM Status flag to partial working, as error detected but data might persist
notifyNvdimmProtectionChange(l_nvdimm, NVDIMM_RISKY_HW_ERROR);
/*@
*@errortype
*@reasoncode NVDIMM_SET_EVENT_NOTIFICATION_ERROR
*@severity ERRORLOG_SEV_PREDICTIVE
*@moduleid NVDIMM_SET_EVENT_NOTIFICATION
*@userdata1[0:31] Target Huid
*@userdata2 <UNUSED>
*@devdesc NVDIMM threw an error or failed to set event
* notifications during arming
*@custdesc NVDIMM failed to enable event notificaitons
*/
l_err = new ERRORLOG::ErrlEntry( ERRORLOG::ERRL_SEV_PREDICTIVE,
NVDIMM_SET_EVENT_NOTIFICATION,
NVDIMM_SET_EVENT_NOTIFICATION_ERROR,
TARGETING::get_huid(l_nvdimm),
0x0,
ERRORLOG::ErrlEntry::NO_SW_CALLOUT );
l_err->collectTrace( NVDIMM_COMP_NAME );
// Callout the dimm
l_err->addHwCallout( l_nvdimm,
HWAS::SRCI_PRIORITY_LOW,
HWAS::NO_DECONFIG,
HWAS::GARD_NULL);
// Read relevant regs for trace data
nvdimmTraceRegs(l_nvdimm, l_RegInfo);
nvdimmAddPage4Regs(l_nvdimm,l_err);
nvdimmAddVendorLog(l_nvdimm, l_err);
// Add reg traces to the error log
NVDIMM::UdNvdimmOPParms( l_RegInfo ).addToLog(l_err);
errlCommit( l_err, NVDIMM_COMP_ID );
// We are after the arm step now, so on any error cases let's log it
// then move to the next nvdimm
continue;
}
// Re-check health status registers
l_err = nvdimmHealthStatusCheck( l_nvdimm, HEALTH_POST_ARM, l_continue );
// Check for health status failure
if (l_err)
{
TRACFCOMP(g_trac_nvdimm, "nvdimmArm() nvdimm[%X] failed final health status check", get_huid(l_nvdimm));
errlCommit( l_err, NVDIMM_COMP_ID );
continue;
}
}
// Check for uncommited i2c fail error logs
if (l_err)
{
TRACFCOMP(g_trac_nvdimm, "nvdimmArm() failed an i2c read/write");
errlCommit( l_err, NVDIMM_COMP_ID );
nvdimmDisarm(i_nvdimmTargetList);
return false;
}
// Unmask firs if the arm completed successfully
if (o_arm_successful)
{
// Unmask MBACALFIR EventN and set to recoverable
for (TargetHandleList::iterator it = i_nvdimmTargetList.begin();
it != i_nvdimmTargetList.end();)
{
TargetHandleList l_mcaList;
getParentAffinityTargets(l_mcaList, *it, CLASS_UNIT, TYPE_MCA);
assert(l_mcaList.size(), "nvdimmArm() failed to find parent MCA.");
// Set MBACALFIR_ACTION0 to recoverable
l_writeAddress = MBACALFIR_ACTION0_REG;
l_writeData = 0;
l_err = deviceRead(l_mcaList[0], &l_writeData, l_writeSize,
DEVICE_SCOM_ADDRESS(l_writeAddress));
if(l_err)
{
TRACFCOMP(g_trac_nvdimm, "SCOM to address 0x%08x failed",
l_writeAddress);
errlCommit( l_err, NVDIMM_COMP_ID );
}
l_writeData &= MBACALFIR_EVENTN_AND_BIT;
l_err = deviceWrite(l_mcaList[0], &l_writeData, l_writeSize,
DEVICE_SCOM_ADDRESS(l_writeAddress));
if(l_err)
{
TRACFCOMP(g_trac_nvdimm, "SCOM to address 0x%08x failed",
l_writeAddress);
errlCommit( l_err, NVDIMM_COMP_ID );
}
// Set MBACALFIR_ACTION1 to recoverable
l_writeAddress = MBACALFIR_ACTION1_REG;
l_writeData = 0;
l_err = deviceRead(l_mcaList[0], &l_writeData, l_writeSize,
DEVICE_SCOM_ADDRESS(l_writeAddress));
if(l_err)
{
TRACFCOMP(g_trac_nvdimm, "SCOM to address 0x%08x failed",
l_writeAddress);
errlCommit( l_err, NVDIMM_COMP_ID );
}
l_writeData |= MBACALFIR_EVENTN_OR_BIT;
l_err = deviceWrite(l_mcaList[0], &l_writeData, l_writeSize,
DEVICE_SCOM_ADDRESS(l_writeAddress));
if(l_err)
{
TRACFCOMP(g_trac_nvdimm, "SCOM to address 0x%08x failed",
l_writeAddress);
errlCommit( l_err, NVDIMM_COMP_ID );
}
// Unmask MBACALFIR[8]
l_writeAddress = MBACALFIR_AND_MASK_REG;
l_writeData = MBACALFIR_UNMASK_BIT;
l_err = deviceWrite(l_mcaList[0], &l_writeData, l_writeSize,
DEVICE_SCOM_ADDRESS(l_writeAddress));
if(l_err)
{
TRACFCOMP(g_trac_nvdimm, "SCOM to address 0x%08x failed",
l_writeAddress);
errlCommit( l_err, NVDIMM_COMP_ID );
}
it++;
}
}
TRACFCOMP(g_trac_nvdimm, EXIT_MRK"nvdimmArm() returning %d",
o_arm_successful);
return o_arm_successful;
}
bool nvdimmDisarm(TargetHandleList &i_nvdimmTargetList)
{
bool o_disarm_successful = true;
TRACFCOMP(g_trac_nvdimm, ENTER_MRK"nvdimmDisarm() %d",
i_nvdimmTargetList.size());
errlHndl_t l_err = nullptr;
for (auto const l_nvdimm : i_nvdimmTargetList)
{
l_err = NVDIMM::nvdimmChangeArmState(l_nvdimm, DISARM_TRIGGER);
// If we run into any error here we will just
// commit the error log and move on. Let the
// system continue to boot and let the user
// salvage the data
if (l_err)
{
// Committing the error as we don't want this to interrupt
// the boot. This will notify the user that action is needed
// on this module
l_err->setSev(ERRORLOG::ERRL_SEV_PREDICTIVE);
l_err->collectTrace(NVDIMM_COMP_NAME);
errlCommit( l_err, NVDIMM_COMP_ID );
o_disarm_successful = false;
continue;
}
// Disarm successful, update armed status
l_err = NVDIMM::notifyNvdimmProtectionChange(l_nvdimm,
NVDIMM::NVDIMM_DISARMED);
if (l_err)
{
l_err->setSev(ERRORLOG::ERRL_SEV_PREDICTIVE);
l_err->collectTrace(NVDIMM_COMP_NAME);
errlCommit(l_err, NVDIMM_COMP_ID);
}
}
TRACFCOMP(g_trac_nvdimm, EXIT_MRK"nvdimmDisarm() returning %d",
o_disarm_successful);
return o_disarm_successful;
}
/**
* @brief Check nvdimm error state
*
* @param[in] i_nvdimm - nvdimm target
*
* @return bool - true if nvdimm is in any error state, false otherwise
*/
bool nvdimmInErrorState(Target *i_nvdimm)
{
TRACUCOMP(g_trac_nvdimm, ENTER_MRK"nvdimmInErrorState() HUID[%X]",get_huid(i_nvdimm));
uint8_t l_statusFlag = i_nvdimm->getAttr<ATTR_NV_STATUS_FLAG>();
bool l_ret = true;
// Just checking bit 1 for now, need to investigate these
// Should be checking NVDIMM_ARMED instead
if ((l_statusFlag & NSTD_VAL_ERASED) == 0)
{
l_ret = false;
}
// Also check the encryption error status
Target* l_sys = nullptr;
targetService().getTopLevelTarget( l_sys );
assert(l_sys, "nvdimmInErrorState: no TopLevelTarget");
if (l_sys->getAttr<ATTR_NVDIMM_ENCRYPTION_ENABLE>())
{
ATTR_NVDIMM_ARMED_type l_armed_state = {};
l_armed_state = i_nvdimm->getAttr<ATTR_NVDIMM_ARMED>();
if (l_armed_state.encryption_error_detected)
{
l_ret = true;
}
}
TRACUCOMP(g_trac_nvdimm, EXIT_MRK"nvdimmInErrorState() HUID[%X]",get_huid(i_nvdimm));
return l_ret;
}
// This could be made a generic utility
errlHndl_t nvdimm_getDarnNumber(size_t i_genSize, uint8_t* o_genData)
{
assert(i_genSize % sizeof(uint64_t) == 0,"nvdimm_getDarnNumber() bad i_genSize");
errlHndl_t l_err = nullptr;
uint64_t* l_darnData = reinterpret_cast<uint64_t*>(o_genData);
for (uint32_t l_loop = 0; l_loop < (i_genSize / sizeof(uint64_t)); l_loop++)
{
// Darn could return an error code
uint32_t l_darnErrors = 0;
while (l_darnErrors < MAX_DARN_ERRORS)
{
// Get a 64-bit random number with the darn instruction
l_darnData[l_loop] = getDarn();
if ( l_darnData[l_loop] != DARN_ERROR_CODE )
{
break;
}
else
{
l_darnErrors++;
}
}
if (l_darnErrors == MAX_DARN_ERRORS)
{
TRACFCOMP(g_trac_nvdimm, ERR_MRK"nvdimm_getDarnNumber() reached MAX_DARN_ERRORS");
/*@
*@errortype
*@reasoncode NVDIMM_ENCRYPTION_MAX_DARN_ERRORS
*@severity ERRORLOG_SEV_PREDICTIVE
*@moduleid NVDIMM_GET_DARN_NUMBER
*@userdata1 MAX_DARN_ERRORS
*@devdesc Error using darn instruction
*@custdesc NVDIMM encryption error
*/
l_err = new ERRORLOG::ErrlEntry(
ERRORLOG::ERRL_SEV_PREDICTIVE,
NVDIMM_GET_DARN_NUMBER,
NVDIMM_ENCRYPTION_MAX_DARN_ERRORS,
MAX_DARN_ERRORS,
ERRORLOG::ErrlEntry::NO_SW_CALLOUT );
l_err->collectTrace(NVDIMM_COMP_NAME);
break;
}
}
return l_err;
}
errlHndl_t nvdimm_getRandom(uint8_t* o_genData)
{
errlHndl_t l_err = nullptr;
uint8_t l_xtraData[ENC_KEY_SIZE] = {0};
do
{
// Get a random number with the darn instruction
l_err = nvdimm_getDarnNumber(ENC_KEY_SIZE, o_genData);
if (l_err)
{
break;
}
// Validate and update the random number
// Retry if more randomness required
do
{
//Get replacement data
l_err = nvdimm_getDarnNumber(ENC_KEY_SIZE, l_xtraData);
if (l_err)
{
break;
}