-
Notifications
You must be signed in to change notification settings - Fork 97
/
prdfMemEccAnalysis.C
1055 lines (834 loc) · 33.2 KB
/
prdfMemEccAnalysis.C
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
/* $Source: src/usr/diag/prdf/common/plat/mem/prdfMemEccAnalysis.C $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2016,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
/* Licensed under the Apache License, Version 2.0 (the "License"); */
/* you may not use this file except in compliance with the License. */
/* You may obtain a copy of the License at */
/* */
/* http://www.apache.org/licenses/LICENSE-2.0 */
/* */
/* Unless required by applicable law or agreed to in writing, software */
/* distributed under the License is distributed on an "AS IS" BASIS, */
/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
/* implied. See the License for the specific language governing */
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
#include <prdfMemEccAnalysis.H>
// Platform includes
#include <prdfMemAddress.H>
#include <prdfMemCaptureData.H>
#include <prdfMemDqBitmap.H>
#include <prdfP9McaDataBundle.H>
#include <prdfP9McaExtraSig.H>
using namespace TARGETING;
namespace PRDF
{
using namespace PlatServices;
namespace MemEcc
{
//------------------------------------------------------------------------------
template<TARGETING::TYPE T, typename D>
uint32_t __handleMemUe( ExtensibleChip * i_chip, const MemAddr & i_addr,
UE_TABLE::Type i_type, STEP_CODE_DATA_STRUCT & io_sc )
{
#define PRDF_FUNC "[MemEcc::__handleMemUe] "
uint32_t o_rc = SUCCESS;
MemRank rank = i_addr.getRank();
// Add the rank to the callout list.
MemoryMru mm { i_chip->getTrgt(), rank, MemoryMruData::CALLOUT_RANK };
io_sc.service_data->SetCallout( mm );
// All memory UEs should be customer viewable.
io_sc.service_data->setServiceCall();
// Add entry to UE table.
D db = static_cast<D>(i_chip->getDataBundle());
db->iv_ueTable.addEntry( i_type, i_addr );
#ifdef __HOSTBOOT_RUNTIME
/* TODO RTC 136129
// Dynamically deallocate the rank.
o_rc = MemDealloc::rank<T>( i_chip, rank );
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "MemDealloc::rank<T>(0x%08x,m%ds%d) failed",
i_chip->getHuid(), rank.getMaster(), rank.getSlave() );
}
*/
#endif
return o_rc;
#undef PRDF_FUNC
}
template<>
uint32_t handleMemUe<TYPE_MCA>( ExtensibleChip * i_chip, const MemAddr & i_addr,
UE_TABLE::Type i_type,
STEP_CODE_DATA_STRUCT & io_sc )
{
#define PRDF_FUNC "[MemEcc::handleMemUe] "
PRDF_ASSERT( nullptr != i_chip );
PRDF_ASSERT( TYPE_MCA == i_chip->getType() );
uint32_t o_rc = SUCCESS;
do
{
// First check to see if this is a side-effect UE.
SCAN_COMM_REGISTER_CLASS * fir = i_chip->getRegister("DDRPHYFIR");
o_rc = fir->Read();
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "Read() failed on DDRPHYFIR: i_chip=0x%08x",
i_chip->getHuid() );
break;
}
// Check DDRPHYFIR[54:55,57:59] to determine if this is a side-effect.
if ( 0 != (fir->GetBitFieldJustified(54,6) & 0x37) )
{
// This is a side-effect. Callout the MCA.
PRDF_TRAC( PRDF_FUNC "Memory UE is side-effect of DDRPHY error" );
io_sc.service_data->SetCallout( i_chip->getTrgt() );
io_sc.service_data->setServiceCall();
}
else
{
// Handle the memory UE.
o_rc = __handleMemUe<TYPE_MCA,McaDataBundle *>( i_chip, i_addr,
i_type, io_sc );
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "__handleMemUe(0x%08x,%d) failed",
i_chip->getHuid(), i_type );
break;
}
}
} while (0);
return o_rc;
#undef PRDF_FUNC
}
/* TODO RTC 157888
template<>
uint32_t handleMemUe<TYPE_MBA>( ExtensibleChip * i_chip, const MemAddr & i_addr,
UE_TABLE::Type i_type,
STEP_CODE_DATA_STRUCT & io_sc )
{
PRDF_ASSERT( nullptr != i_chip );
PRDF_ASSERT( TYPE_MBA == i_chip->getType() );
return __handleMemUe<TYPE_MBA,CenMbaDataBundle *>( i_chip, i_addr,
i_type, io_sc );
}
*/
//------------------------------------------------------------------------------
#ifdef __HOSTBOOT_MODULE
template<>
uint32_t maskMemPort<TYPE_MCA>( ExtensibleChip * i_chip )
{
#define PRDF_FUNC "[MemEcc::maskMemPort<TYPE_MCA>] "
PRDF_ASSERT( nullptr != i_chip );
PRDF_ASSERT( TYPE_MCA == i_chip->getType() );
uint32_t o_rc = SUCCESS;
do
{
// Mask all FIRs on the port.
SCAN_COMM_REGISTER_CLASS * c = i_chip->getRegister("MCACALFIR_MASK_OR");
SCAN_COMM_REGISTER_CLASS * d = i_chip->getRegister("DDRPHYFIR_MASK_OR");
SCAN_COMM_REGISTER_CLASS * e = i_chip->getRegister("MCAECCFIR_MASK_OR");
c->setAllBits(); d->setAllBits(); e->setAllBits();
// We don't want to mask the IUE bits in the MCAECCFIR if they are on
// so if we trigger a port fail that causes a checkstop we have
// something to blame it on.
SCAN_COMM_REGISTER_CLASS * mcaeccfir = i_chip->getRegister("MCAECCFIR");
o_rc = mcaeccfir->Read();
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "Read() Failed on MCAECCFIR: i_chip=0x%08x",
i_chip->getHuid() );
break;
}
if ( mcaeccfir->IsBitSet(17) )
e->ClearBit(17);
if ( mcaeccfir->IsBitSet(37) )
e->ClearBit(37);
o_rc = c->Write() | d->Write() | e->Write();
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "Write() failed on 0x%08x", i_chip->getHuid() );
break;
}
#ifdef __HOSTBOOT_RUNTIME
/* TODO RTC 136129
// Dynamically deallocate the port.
o_rc = MemDealloc::port<TYPE_MCA>( i_chip );
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "MemDealloc::port<TYPE_MCA>(0x%08x) failed",
i_chip->getHuid() );
}
*/
#endif
} while (0);
return o_rc;
#undef PRDF_FUNC
}
#endif // __HOSTBOOT_MODULE
//------------------------------------------------------------------------------
#ifdef __HOSTBOOT_RUNTIME
template<>
uint32_t iuePortFail<TYPE_MCA>( ExtensibleChip * i_chip,
STEP_CODE_DATA_STRUCT & io_sc )
{
#define PRDF_FUNC "[MemEcc::iuePortFail<TYPE_MCA>] "
PRDF_ASSERT( nullptr != i_chip );
PRDF_ASSERT( TYPE_MCA == i_chip->getType() );
uint32_t o_rc = SUCCESS;
McaDataBundle * db = getMcaDataBundle( i_chip );
// Loop through all our thresholds
for ( auto & th : db->iv_iueTh )
{
// If threshold reached
if ( th.second.thReached(io_sc) )
{
// trigger a port fail
// set FARB0[59] - MBA_FARB0Q_CFG_INJECT_PARITY_ERR_CONSTANT and
// FARB0[40] - MBA_FARB0Q_CFG_INJECT_PARITY_ERR_ADDR5
SCAN_COMM_REGISTER_CLASS * farb0 = i_chip->getRegister("FARB0");
o_rc = farb0->Read();
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "Read() FARB0 failed: i_chip=0x%08x",
i_chip->getHuid() );
continue;
}
farb0->SetBit(59);
farb0->SetBit(40);
o_rc = farb0->Write();
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "Write() FARB0 failed: i_chip=0x%08x",
i_chip->getHuid() );
continue;
}
// reset thresholds to prevent issuing multiple port failures on
// the same port
for ( auto & resetTh : db->iv_iueTh )
{
resetTh.second.reset();
}
db->iv_iuePortFail = true;
break;
}
}
return o_rc;
#undef PRDF_FUNC
}
#endif // __HOSTBOOT_RUNTIME
//------------------------------------------------------------------------------
#ifdef __HOSTBOOT_MODULE
template<TARGETING::TYPE T, typename D>
uint32_t addVcmEvent( ExtensibleChip * i_chip, const MemRank & i_rank,
const MemMark & i_mark, STEP_CODE_DATA_STRUCT & io_sc )
{
PRDF_ASSERT( T == i_chip->getType() );
D db = static_cast<D>(i_chip->getDataBundle());
TdEntry * entry = new VcmEvent<T>( i_chip, i_rank, i_mark );
return db->getTdCtlr()->handleTdEvent( io_sc, entry );
}
template
uint32_t addVcmEvent<TYPE_MCA, McaDataBundle *>( ExtensibleChip * i_chip,
const MemRank & i_rank,
const MemMark & i_mark,
STEP_CODE_DATA_STRUCT & io_sc);
#endif
//------------------------------------------------------------------------------
#ifdef __HOSTBOOT_MODULE
template<TARGETING::TYPE T, typename D>
uint32_t addTpsEvent( ExtensibleChip * i_chip, const MemRank & i_rank,
STEP_CODE_DATA_STRUCT & io_sc, bool i_banTps )
{
PRDF_ASSERT( T == i_chip->getType() );
D db = static_cast<D>(i_chip->getDataBundle());
TdEntry * entry = new TpsEvent<T>( i_chip, i_rank, i_banTps );
return db->getTdCtlr()->handleTdEvent( io_sc, entry );
}
template
uint32_t addTpsEvent<TYPE_MCA, McaDataBundle *>( ExtensibleChip * i_chip,
const MemRank & i_rank,
STEP_CODE_DATA_STRUCT & io_sc,
bool i_banTps );
#endif
//------------------------------------------------------------------------------
template<TARGETING::TYPE T, typename D>
uint32_t handleMpe( ExtensibleChip * i_chip, const MemRank & i_rank,
STEP_CODE_DATA_STRUCT & io_sc )
{
#define PRDF_FUNC "[MemEcc::handleMpe] "
PRDF_ASSERT( T == i_chip->getType() );
uint32_t o_rc = SUCCESS;
do
{
// Read the chip mark from markstore.
MemMark chipMark;
o_rc = MarkStore::readChipMark<T>( i_chip, i_rank, chipMark );
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "readChipMark<T>(0x%08x,%d) failed",
i_chip->getHuid(), i_rank.getMaster() );
break;
}
// If the chip mark is not valid, then somehow the chip mark was
// placed on a rank other than the rank in which the command
// stopped. This would most likely be a code bug.
PRDF_ASSERT( chipMark.isValid() );
// Add the mark to the callout list.
MemoryMru mm { i_chip->getTrgt(), i_rank, chipMark.getSymbol() };
io_sc.service_data->SetCallout( mm );
#ifdef __HOSTBOOT_RUNTIME
// Add a VCM request to the TD queue.
o_rc = addVcmEvent<T,D>( i_chip, i_rank, chipMark, io_sc );
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "addVcmEvent() failed: i_chip=0x%08x "
"i_rank=m%ds%d", i_chip->getHuid(), i_rank.getMaster(),
i_rank.getSlave() );
break;
}
#endif // __HOSTBOOT_RUNTIME
}while(0);
return o_rc;
#undef PRDF_FUNC
}
// To resolve template linker errors.
template
uint32_t handleMpe<TYPE_MCA, McaDataBundle *>( ExtensibleChip * i_chip,
const MemRank & i_rank, STEP_CODE_DATA_STRUCT & io_sc );
//------------------------------------------------------------------------------
template<TARGETING::TYPE T, typename D>
uint32_t analyzeFetchMpe( ExtensibleChip * i_chip, const MemRank & i_rank,
STEP_CODE_DATA_STRUCT & io_sc )
{
#define PRDF_FUNC "[MemEcc::analyzeFetchMpe] "
PRDF_ASSERT( T == i_chip->getType() );
uint32_t o_rc = SUCCESS;
#if !defined(__HOSTBOOT_RUNTIME) && defined(__HOSTBOOT_MODULE) // HB IPL
PRDF_ERR( PRDF_FUNC "Mainline MPE attns should be masked during IPL" );
PRDF_ASSERT(false); // HWP bug.
#else // runtime
do
{
// Get the address of the failure.
MemAddr addr;
o_rc = getMemReadAddr<T>( i_chip, MemAddr::READ_MPE_ADDR, addr );
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "getMemReadAddr(0x%08x, READ_MPE_ADDR) failed",
i_chip->getHuid() );
break;
}
// There is only one address register and it will contain the latest
// chip mark placed. So it is possible this address will be out of sync
// with the rank that reported the attention. In this case, we will
// simply fake an address with the correct rank and move on.
if ( i_rank != addr.getRank() )
{
addr = MemAddr ( i_rank, 0, 0, 0 );
}
// Add address to UE table.
D db = static_cast<D>(i_chip->getDataBundle());
db->iv_ueTable.addEntry( UE_TABLE::FETCH_MPE, addr );
o_rc = MemEcc::handleMpe<T,D>( i_chip, i_rank, io_sc );
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "handleMpe<T>(0x%08x, 0x%02x) failed",
i_chip->getHuid(), i_rank.getKey() );
break;
}
} while (0);
// Add ECC capture data for FFDC.
MemCaptureData::addEccData<T>( i_chip, io_sc );
#endif // __HOSTBOOT_RUNTIME
return o_rc;
#undef PRDF_FUNC
}
// To resolve template linker errors.
template
uint32_t analyzeFetchMpe<TYPE_MCA, McaDataBundle *>( ExtensibleChip * i_chip,
const MemRank & i_rank,
STEP_CODE_DATA_STRUCT & io_sc );
//------------------------------------------------------------------------------
template<TARGETING::TYPE T, typename D>
uint32_t handleMemCe( ExtensibleChip * i_chip, const MemAddr & i_addr,
const MemSymbol & i_symbol, bool & o_doTps,
STEP_CODE_DATA_STRUCT & io_sc, bool i_isHard )
{
#define PRDF_FUNC "[MemEcc::handleMemCe] "
uint32_t o_rc = SUCCESS;
o_doTps = false;
TargetHandle_t trgt = i_chip->getTrgt();
MemRank rank = i_addr.getRank();
// Add the DIMM to the callout list
MemoryMru memmru ( trgt, rank, i_symbol );
io_sc.service_data->SetCallout( memmru, MRU_MEDA );
// Add data to the CE table.
D db = static_cast<D>(i_chip->getDataBundle());
uint32_t ceTableRc = db->iv_ceTable.addEntry( i_addr, i_symbol, i_isHard );
// Check MNFG thresholds, if needed.
// NOTE: We will only check the MNFG thresholds if DRAM repairs is disabled.
// This is for a Nimbus DD2.0.1 workaround, but the change will be
// permanent for all P9 DD levels.
if ( areDramRepairsDisabled() )
{
if ( 0 != (MemCeTable<T>::MNFG_TH_DRAM & ceTableRc) )
{
io_sc.service_data->AddSignatureList( trgt, PRDFSIG_MnfgDramCte );
io_sc.service_data->setServiceCall();
o_doTps = true;
}
else if ( 0 != (MemCeTable<T>::MNFG_TH_RANK & ceTableRc) )
{
io_sc.service_data->AddSignatureList( trgt, PRDFSIG_MnfgRankCte );
io_sc.service_data->setServiceCall();
o_doTps = true;
}
else if ( 0 != (MemCeTable<T>::MNFG_TH_DIMM & ceTableRc) )
{
io_sc.service_data->AddSignatureList( trgt, PRDFSIG_MnfgDimmCte );
io_sc.service_data->setServiceCall();
o_doTps = true;
}
else if ( 0 != (MemCeTable<T>::TABLE_FULL & ceTableRc) )
{
io_sc.service_data->AddSignatureList( trgt, PRDFSIG_MnfgTableFull );
// The table is full and no other threshold has been met. We are
// in a state where we may never hit a MNFG threshold. Callout
// all memory behind the chip. Also, since the counts are all
// over the place, there may be a problem with the chip. So call
// it out as well.
MemoryMru all_mm ( trgt, rank, MemoryMruData::CALLOUT_ALL_MEM );
io_sc.service_data->SetCallout( all_mm, MRU_MEDA );
io_sc.service_data->SetCallout( trgt, MRU_MEDA );
io_sc.service_data->setServiceCall();
o_doTps = true;
}
else if ( 0 != (MemCeTable<T>::ENTRY_TH_REACHED & ceTableRc) )
{
io_sc.service_data->AddSignatureList( trgt, PRDFSIG_MnfgEntryCte );
// There is a single entry threshold and no other threshold
// has been met. This is a potential flooding issue. So make
// the DIMM callout predictive.
io_sc.service_data->setServiceCall();
o_doTps = true;
}
}
else // field thresholds
{
// It is possible that the MNFG thresholds are higher than the field
// thresholds because of the scaling due to DRAM side. Therefore, we
// cannot simply trigger TPS on any threshold. The field and MNFG
// thresholds must be handled separately.
if ( !o_doTps )
o_doTps = ( 0 != (MemCeTable<T>::FIELD_TH_ALL & ceTableRc) );
}
#ifdef __HOSTBOOT_RUNTIME
/* TODO RTC 136129
if ( i_isHard )
{
// Dynamically deallocate the page.
o_rc = MemDealloc::page<T>( i_chip, i_addr );
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "MemDealloc::page(0x%08x) failed",
i_chip->getHuid() );
}
}
*/
#endif
return o_rc;
#undef PRDF_FUNC
}
//------------------------------------------------------------------------------
template<TARGETING::TYPE T, typename D>
uint32_t analyzeFetchNceTce( ExtensibleChip * i_chip,
STEP_CODE_DATA_STRUCT & io_sc )
{
#define PRDF_FUNC "[MemEcc::analyzeFetchNceTce] "
PRDF_ASSERT( nullptr != i_chip );
PRDF_ASSERT( T == i_chip->getType() );
uint32_t o_rc = SUCCESS;
do
{
// Get the address of the failure.
MemAddr addr;
o_rc = getMemReadAddr<T>( i_chip, MemAddr::READ_NCE_ADDR, addr );
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "getMemReadAddr(0x%08x) failed",
i_chip->getHuid() );
break;
}
MemRank rank = addr.getRank();
// Get the symbols for the NCE/TCE attention.
MemSymbol sym1, sym2;
o_rc = getMemReadSymbol<T>( i_chip, rank, sym1, sym2 );
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "getMemReadSymbol(0x%08x) failed",
i_chip->getHuid() );
break;
}
// Add the first symbol to the callout list and CE table.
bool doTps = false;
if ( sym1.isValid() )
{
o_rc = handleMemCe<T,D>( i_chip, addr, sym1, doTps, io_sc );
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "handleMemCe(0x%08x,0x%02x,%d) failed",
i_chip->getHuid(), rank.getKey(), sym1.getSymbol() );
break;
}
}
else
{
// The first symbol should always be valid.
PRDF_ERR( PRDF_FUNC "getMemReadSymbol(0x%08x) returned an invalid "
"symbol", i_chip->getHuid() );
o_rc = FAIL;
break;
}
// Add the second symbol to the callout list and CE table, if it exists.
if ( sym2.isValid() )
{
bool tmp;
o_rc = handleMemCe<T,D>( i_chip, addr, sym2, tmp, io_sc );
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "handleMemCe(0x%08x,0x%02x,%d) failed",
i_chip->getHuid(), rank.getKey(), sym2.getSymbol() );
break;
}
if ( tmp ) doTps = true;
}
// Initiate a TPS procedure, if needed.
if ( doTps )
{
#ifdef __HOSTBOOT_RUNTIME
// If a MNFG threshold has been reached (predictive callout), we
// will still try to start TPS just in case MNFG disables the
// termination policy.
o_rc = addTpsEvent<T,D>( i_chip, rank, io_sc );
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "addTpsEvent(0x%08x,0x%02x) failed",
i_chip->getHuid(), rank.getKey() );
}
#endif
}
} while (0);
// Add ECC capture data for FFDC.
MemCaptureData::addEccData<T>( i_chip, io_sc );
return o_rc;
#undef PRDF_FUNC
}
// To resolve template linker errors.
template
uint32_t analyzeFetchNceTce<TYPE_MCA, McaDataBundle *>( ExtensibleChip * i_chip,
STEP_CODE_DATA_STRUCT & io_sc );
//------------------------------------------------------------------------------
template<TARGETING::TYPE T, typename D>
uint32_t analyzeFetchUe( ExtensibleChip * i_chip,
STEP_CODE_DATA_STRUCT & io_sc )
{
#define PRDF_FUNC "[MemEcc::analyzeFetchUe] "
PRDF_ASSERT( T == i_chip->getType() );
uint32_t o_rc = SUCCESS;
// All memory UEs should be customer viewable. Normally, this would be done
// by setting the threshold to 1, but we do not want to mask UEs on the
// first occurrence.
io_sc.service_data->setServiceCall();
do
{
// Get the address of the failure.
MemAddr addr;
o_rc = getMemReadAddr<T>( i_chip, MemAddr::READ_UE_ADDR, addr );
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "getMemReadAddr(0x%08x, READ_UE_ADDR) failed",
i_chip->getHuid() );
break;
}
// Do memory UE handling.
o_rc = MemEcc::handleMemUe<T>( i_chip, addr, UE_TABLE::FETCH_UE, io_sc);
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "handleMemUe<T>(0x%08x) failed",
i_chip->getHuid() );
break;
}
#ifdef __HOSTBOOT_RUNTIME
// Add a TPS request to the TD queue and ban any further TPS requests
// for this rank.
MemRank rank = addr.getRank();
o_rc = addTpsEvent<T,D>( i_chip, rank, io_sc, true );
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "addTpsEvent() failed: i_chip=0x%08x "
"rank=%d,%d", i_chip->getHuid(), rank.getMaster(),
rank.getSlave() );
break;
}
#endif // __HOSTBOOT_RUNTIME
} while (0);
// Add ECC capture data for FFDC.
MemCaptureData::addEccData<T>( i_chip, io_sc );
return o_rc;
#undef PRDF_FUNC
}
// To resolve template linker errors.
template
uint32_t analyzeFetchUe<TYPE_MCA, McaDataBundle *>( ExtensibleChip * i_chip,
STEP_CODE_DATA_STRUCT & io_sc );
//------------------------------------------------------------------------------
template<TARGETING::TYPE T, typename D>
uint32_t handleMemIue( ExtensibleChip * i_chip, const MemRank & i_rank,
STEP_CODE_DATA_STRUCT & io_sc )
{
#define PRDF_FUNC "[MemEcc::handleMemIue] "
PRDF_ASSERT( nullptr != i_chip );
PRDF_ASSERT( T == i_chip->getType() );
uint32_t o_rc = SUCCESS;
// Add the DIMM to the callout list.
MemoryMru mm { i_chip->getTrgt(), i_rank, MemoryMruData::CALLOUT_RANK };
io_sc.service_data->SetCallout( mm );
#ifdef __HOSTBOOT_MODULE
do
{
// Nothing else to do if handling a system checkstop.
if ( CHECK_STOP == io_sc.service_data->getPrimaryAttnType() ) break;
// Get the data bundle from chip.
D db = static_cast<D>( i_chip->getDataBundle() );
// If we have already caused a port fail, mask the IUE bits.
if ( true == db->iv_iuePortFail )
{
SCAN_COMM_REGISTER_CLASS * mask_or =
i_chip->getRegister("MCAECCFIR_MASK_OR");
mask_or->SetBit(17);
mask_or->SetBit(37);
o_rc = mask_or->Write();
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "Write() failed on 0x%08x",
i_chip->getHuid() );
break;
}
}
// Get the DIMM select.
uint8_t ds = i_rank.getDimmSlct();
// Initialize threshold if it doesn't exist yet.
if ( 0 == db->iv_iueTh.count(ds) )
{
db->iv_iueTh[ds] = TimeBasedThreshold( getIueTh() );
}
// Increment the count and check if at threshold.
if ( db->iv_iueTh[ds].inc(io_sc) )
{
// Make the error log predictive.
io_sc.service_data->setServiceCall();
// The port fail will be triggered in the PostAnalysis plugin after
// the error log has been committed.
// Mask off the entire port to avoid collateral.
o_rc = MemEcc::maskMemPort<T>( i_chip );
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "MemEcc::maskMemPort<T>(0x%08x) failed",
i_chip->getHuid() );
break;
}
}
} while (0);
#endif // __HOSTBOOT_MODULE
return o_rc;
#undef PRDF_FUNC
}
//------------------------------------------------------------------------------
template<TARGETING::TYPE T, typename D>
uint32_t analyzeMainlineIue( ExtensibleChip * i_chip,
STEP_CODE_DATA_STRUCT & io_sc )
{
#define PRDF_FUNC "[MemEcc::analyzeMainlineIue] "
PRDF_ASSERT( nullptr != i_chip );
PRDF_ASSERT( T == i_chip->getType() );
uint32_t o_rc = SUCCESS;
do
{
// Use the address in MBRCER. This address also traps IRCDs, but it is
// not likely that we will have two independent failure modes at the
// same time. So we just assume the address is correct.
MemAddr addr;
o_rc = getMemReadAddr<T>( i_chip, MemAddr::READ_RCE_ADDR, addr );
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "getMemReadAddr(0x%08x, READ_RCE_ADDR) failed",
i_chip->getHuid() );
break;
}
MemRank rank = addr.getRank();
o_rc = handleMemIue<T,D>( i_chip, rank, io_sc );
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "handleMemIue<T,D>(0x%08x,m%ds%d) failed",
i_chip->getHuid(), rank.getMaster(), rank.getSlave() );
break;
}
} while (0);
return o_rc;
#undef PRDF_FUNC
}
// To resolve template linker errors.
template
uint32_t analyzeMainlineIue<TYPE_MCA, McaDataBundle *>( ExtensibleChip * i_chip,
STEP_CODE_DATA_STRUCT & io_sc );
//------------------------------------------------------------------------------
template<TARGETING::TYPE T, typename D>
uint32_t analyzeMaintIue( ExtensibleChip * i_chip,
STEP_CODE_DATA_STRUCT & io_sc )
{
#define PRDF_FUNC "[MemEcc::analyzeMaintIue] "
PRDF_ASSERT( nullptr != i_chip );
PRDF_ASSERT( T == i_chip->getType() );
uint32_t o_rc = SUCCESS;
do
{
// Use the current address in the MCBMCAT.
MemAddr addr;
o_rc = getMemMaintAddr<T>( i_chip, addr );
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "getMemMaintAddr(0x%08x) failed",
i_chip->getHuid() );
break;
}
MemRank rank = addr.getRank();
o_rc = handleMemIue<T,D>( i_chip, rank, io_sc );
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "handleMemIue<T,D>(0x%08x,m%ds%d) failed",
i_chip->getHuid(), rank.getMaster(), rank.getSlave() );
break;
}
} while (0);
return o_rc;
#undef PRDF_FUNC
}
// To resolve template linker errors.
template
uint32_t analyzeMaintIue<TYPE_MCA, McaDataBundle*>(ExtensibleChip * i_chip,
STEP_CODE_DATA_STRUCT & io_sc );
//------------------------------------------------------------------------------
template<TARGETING::TYPE T, typename D>
uint32_t analyzeImpe( ExtensibleChip * i_chip, STEP_CODE_DATA_STRUCT & io_sc )
{
#define PRDF_FUNC "[MemEcc::analyzeImpe] "
PRDF_ASSERT( T == i_chip->getType() );
uint32_t o_rc = SUCCESS;
do
{
// get the mark shadow register
SCAN_COMM_REGISTER_CLASS * msr = i_chip->getRegister("MSR");
o_rc = msr->Read();
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "Read() failed on MSR: i_chip=0x%08x",
i_chip->getHuid() );
break;
}
TargetHandle_t trgt = i_chip->getTrgt();
// get galois field code - bits 8:15 of MSR
uint8_t galois = msr->GetBitFieldJustified( 8, 8 );
// get rank - bits 16:18 of MSR
uint8_t mrnk = msr->GetBitFieldJustified( 16, 3 );
MemRank rank( mrnk );
// get symbol and DRAM
MemSymbol symbol = MemSymbol::fromGalois( trgt, rank, galois );
if ( !symbol.isValid() )
{
PRDF_ERR( PRDF_FUNC "Galois 0x%02x from MSR is invalid: 0x%08x,"
"0x%02x", galois, i_chip->getHuid(), rank.getKey() );
o_rc = FAIL;
break;
}
// Add the DIMM to the callout list
MemoryMru memmru( trgt, rank, MemoryMruData::CALLOUT_RANK );
io_sc.service_data->SetCallout( memmru );
#ifdef __HOSTBOOT_MODULE
// get data bundle from chip
D db = static_cast<D>( i_chip->getDataBundle() );
uint8_t dram = symbol.getDram();
// Increment the count and check threshold.
if ( db->getImpeThresholdCounter()->inc(rank, dram, io_sc) )
{
// Make the error log predictive if DRAM Repairs are disabled or if
// the number of DRAMs on this rank with IMPEs has reached threshold
if ( areDramRepairsDisabled() ||
db->getImpeThresholdCounter()->queryDrams(rank, dram, io_sc) )
{
io_sc.service_data->setServiceCall();
}
else // Otherwise, place a chip mark on the failing DRAM.
{
MemMark chipMark( trgt, rank, galois );
o_rc = MarkStore::writeChipMark<T>( i_chip, rank, chipMark );
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "writeChipMark(0x%08x,0x%02x) failed",
i_chip->getHuid(), rank.getKey() );
break;
}
o_rc = MarkStore::balance<T>( i_chip, rank, io_sc );
if ( SUCCESS != o_rc )
{