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explorer_scom_addresses_fixes.H
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explorer_scom_addresses_fixes.H
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/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
/* $Source: src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fixes.H $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2018,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
/* Licensed under the Apache License, Version 2.0 (the "License"); */
/* you may not use this file except in compliance with the License. */
/* You may obtain a copy of the License at */
/* */
/* http://www.apache.org/licenses/LICENSE-2.0 */
/* */
/* Unless required by applicable law or agreed to in writing, software */
/* distributed under the License is distributed on an "AS IS" BASIS, */
/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
/* implied. See the License for the specific language governing */
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
#ifndef __EXPLR_SCOM_ADDRESSES_FIXES_H
#define __EXPLR_SCOM_ADDRESSES_FIXES_H
static const uint64_t EXPLR_MIPS_TO_OCMB_INTERRUPT_REGISTER1 = 0x2058ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG0_U0_P0 = 0x04040340ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG0_U0_P0 = 0x04040230ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG0_U0_P0 = 0x04040240ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG0_U0_P0 = 0x04040200ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG0_U1_P0 = 0x04040740ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG0_U1_P0 = 0x04040630ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG0_U1_P0 = 0x04040640ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG0_U1_P0 = 0x04040600ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R0_P0 = 0x04040300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R1_P0 = 0x04040700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R2_P0 = 0x04040b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R3_P0 = 0x04040f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R4_P0 = 0x04041300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R5_P0 = 0x04041700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R6_P0 = 0x04041b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R7_P0 = 0x04041f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R8_P0 = 0x04042300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG0_U0_P0 = 0x04044340ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG0_U0_P0 = 0x04044230ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG0_U0_P0 = 0x04044240ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG0_U0_P0 = 0x04044200ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG0_U1_P0 = 0x04044740ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG0_U1_P0 = 0x04044630ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG0_U1_P0 = 0x04044640ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG0_U1_P0 = 0x04044600ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R0_P0 = 0x04044300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R1_P0 = 0x04044700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R2_P0 = 0x04044b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R3_P0 = 0x04044f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R4_P0 = 0x04045300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R5_P0 = 0x04045700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R6_P0 = 0x04045b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R7_P0 = 0x04045f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R8_P0 = 0x04046300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG0_U0_P0 = 0x04048340ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG0_U0_P0 = 0x04048230ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG0_U0_P0 = 0x04048240ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG0_U0_P0 = 0x04048200ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG0_U1_P0 = 0x04048740ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG0_U1_P0 = 0x04048630ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG0_U1_P0 = 0x04048640ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG0_U1_P0 = 0x04048600ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R0_P0 = 0x04048300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R1_P0 = 0x04048700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R2_P0 = 0x04048b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R3_P0 = 0x04048f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R4_P0 = 0x04049300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R5_P0 = 0x04049700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R6_P0 = 0x04049b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R7_P0 = 0x04049f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R8_P0 = 0x0404a300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG0_U0_P0 = 0x0404c340ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG0_U0_P0 = 0x0404c230ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG0_U0_P0 = 0x0404c240ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG0_U0_P0 = 0x0404c200ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG0_U1_P0 = 0x0404c740ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG0_U1_P0 = 0x0404c630ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG0_U1_P0 = 0x0404c640ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG0_U1_P0 = 0x0404c600ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R0_P0 = 0x0404c300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R1_P0 = 0x0404c700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R2_P0 = 0x0404cb00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R3_P0 = 0x0404cf00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R4_P0 = 0x0404d300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R5_P0 = 0x0404d700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R6_P0 = 0x0404db00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R7_P0 = 0x0404df00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R8_P0 = 0x0404e300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG0_U0_P0 = 0x04050340ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG0_U0_P0 = 0x04050230ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG0_U0_P0 = 0x04050240ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG0_U0_P0 = 0x04050200ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG0_U1_P0 = 0x04050740ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG0_U1_P0 = 0x04050630ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG0_U1_P0 = 0x04050640ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG0_U1_P0 = 0x04050600ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R0_P0 = 0x04050300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R1_P0 = 0x04050700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R2_P0 = 0x04050b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R3_P0 = 0x04050f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R4_P0 = 0x04051300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R5_P0 = 0x04051700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R6_P0 = 0x04051b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R7_P0 = 0x04051f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R8_P0 = 0x04052300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG0_U0_P0 = 0x04054340ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG0_U0_P0 = 0x04054230ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG0_U0_P0 = 0x04054240ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG0_U0_P0 = 0x04054200ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG0_U1_P0 = 0x04054740ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG0_U1_P0 = 0x04054630ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG0_U1_P0 = 0x04054640ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG0_U1_P0 = 0x04054600ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R0_P0 = 0x04054300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R1_P0 = 0x04054700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R2_P0 = 0x04054b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R3_P0 = 0x04054f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R4_P0 = 0x04055300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R5_P0 = 0x04055700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R6_P0 = 0x04055b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R7_P0 = 0x04055f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R8_P0 = 0x04056300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG0_U0_P0 = 0x04058340ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG0_U0_P0 = 0x04058230ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG0_U0_P0 = 0x04058240ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG0_U0_P0 = 0x04058200ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG0_U1_P0 = 0x04058740ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG0_U1_P0 = 0x04058630ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG0_U1_P0 = 0x04058640ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG0_U1_P0 = 0x04058600ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R0_P0 = 0x04058300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R1_P0 = 0x04058700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R2_P0 = 0x04058b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R3_P0 = 0x04058f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R4_P0 = 0x04059300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R5_P0 = 0x04059700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R6_P0 = 0x04059b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R7_P0 = 0x04059f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R8_P0 = 0x0405a300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG0_U0_P0 = 0x0405c340ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG0_U0_P0 = 0x0405c230ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG0_U0_P0 = 0x0405c240ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG0_U0_P0 = 0x0405c200ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG0_U1_P0 = 0x0405c740ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG0_U1_P0 = 0x0405c630ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG0_U1_P0 = 0x0405c640ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG0_U1_P0 = 0x0405c600ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R0_P0 = 0x0405c300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R1_P0 = 0x0405c700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R2_P0 = 0x0405cb00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R3_P0 = 0x0405cf00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R4_P0 = 0x0405d300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R5_P0 = 0x0405d700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R6_P0 = 0x0405db00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R7_P0 = 0x0405df00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R8_P0 = 0x0405e300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG0_U0_P0 = 0x04060340ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG0_U0_P0 = 0x04060230ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG0_U0_P0 = 0x04060240ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG0_U0_P0 = 0x04060200ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG0_U1_P0 = 0x04060740ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG0_U1_P0 = 0x04060630ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG0_U1_P0 = 0x04060640ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG0_U1_P0 = 0x04060600ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R0_P0 = 0x04060300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R1_P0 = 0x04060700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R2_P0 = 0x04060b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R3_P0 = 0x04060f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R4_P0 = 0x04061300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R5_P0 = 0x04061700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R6_P0 = 0x04061b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R7_P0 = 0x04061f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R8_P0 = 0x04062300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG0_U0_P0 = 0x04064340ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG0_U0_P0 = 0x04064230ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG0_U0_P0 = 0x04064240ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG0_U0_P0 = 0x04064200ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG0_U1_P0 = 0x04064740ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG0_U1_P0 = 0x04064630ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG0_U1_P0 = 0x04064640ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG0_U1_P0 = 0x04064600ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R0_P0 = 0x04064300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R1_P0 = 0x04064700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R2_P0 = 0x04064b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R3_P0 = 0x04064f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R4_P0 = 0x04065300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R5_P0 = 0x04065700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R6_P0 = 0x04065b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R7_P0 = 0x04065f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R8_P0 = 0x04066300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG1_U0_P0 = 0x04040344ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG1_U0_P0 = 0x04040234ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG1_U0_P0 = 0x04040244ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG1_U0_P0 = 0x04040204ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG1_U1_P0 = 0x04040744ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG1_U1_P0 = 0x04040634ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG1_U1_P0 = 0x04040644ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG1_U1_P0 = 0x04040604ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R0_P0 = 0x04040304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R1_P0 = 0x04040704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R2_P0 = 0x04040b04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R3_P0 = 0x04040f04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R4_P0 = 0x04041304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R5_P0 = 0x04041704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R6_P0 = 0x04041b04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R7_P0 = 0x04041f04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R8_P0 = 0x04042304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG1_U0_P0 = 0x04044344ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG1_U0_P0 = 0x04044234ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG1_U0_P0 = 0x04044244ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG1_U0_P0 = 0x04044204ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG1_U1_P0 = 0x04044744ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG1_U1_P0 = 0x04044634ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG1_U1_P0 = 0x04044644ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG1_U1_P0 = 0x04044604ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R0_P0 = 0x04044304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R1_P0 = 0x04044704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R2_P0 = 0x04044b04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R3_P0 = 0x04044f04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R4_P0 = 0x04045304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R5_P0 = 0x04045704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R6_P0 = 0x04045b04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R7_P0 = 0x04045f04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R8_P0 = 0x04046304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG1_U0_P0 = 0x04048344ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG1_U0_P0 = 0x04048234ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG1_U0_P0 = 0x04048244ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG1_U0_P0 = 0x04048204ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG1_U1_P0 = 0x04048744ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG1_U1_P0 = 0x04048634ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG1_U1_P0 = 0x04048644ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG1_U1_P0 = 0x04048604ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R0_P0 = 0x04048304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R1_P0 = 0x04048704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R2_P0 = 0x04048b04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R3_P0 = 0x04048f04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R4_P0 = 0x04049304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R5_P0 = 0x04049704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R6_P0 = 0x04049b04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R7_P0 = 0x04049f04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R8_P0 = 0x0404a304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG1_U0_P0 = 0x0404c344ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG1_U0_P0 = 0x0404c234ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG1_U0_P0 = 0x0404c244ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG1_U0_P0 = 0x0404c204ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG1_U1_P0 = 0x0404c744ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG1_U1_P0 = 0x0404c634ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG1_U1_P0 = 0x0404c644ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG1_U1_P0 = 0x0404c604ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R0_P0 = 0x0404c304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R1_P0 = 0x0404c704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R2_P0 = 0x0404cb04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R3_P0 = 0x0404cf04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R4_P0 = 0x0404d304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R5_P0 = 0x0404d704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R6_P0 = 0x0404db04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R7_P0 = 0x0404df04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R8_P0 = 0x0404e304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG1_U0_P0 = 0x04050344ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG1_U0_P0 = 0x04050234ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG1_U0_P0 = 0x04050244ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG1_U0_P0 = 0x04050204ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG1_U1_P0 = 0x04050744ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG1_U1_P0 = 0x04050634ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG1_U1_P0 = 0x04050644ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG1_U1_P0 = 0x04050604ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R0_P0 = 0x04050304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R1_P0 = 0x04050704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R2_P0 = 0x04050b04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R3_P0 = 0x04050f04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R4_P0 = 0x04051304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R5_P0 = 0x04051704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R6_P0 = 0x04051b04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R7_P0 = 0x04051f04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R8_P0 = 0x04052304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG1_U0_P0 = 0x04054344ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG1_U0_P0 = 0x04054234ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG1_U0_P0 = 0x04054244ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG1_U0_P0 = 0x04054204ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG1_U1_P0 = 0x04054744ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG1_U1_P0 = 0x04054634ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG1_U1_P0 = 0x04054644ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG1_U1_P0 = 0x04054604ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R0_P0 = 0x04054304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R1_P0 = 0x04054704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R2_P0 = 0x04054b04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R3_P0 = 0x04054f04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R4_P0 = 0x04055304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R5_P0 = 0x04055704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R6_P0 = 0x04055b04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R7_P0 = 0x04055f04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R8_P0 = 0x04056304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG1_U0_P0 = 0x04058344ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG1_U0_P0 = 0x04058234ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG1_U0_P0 = 0x04058244ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG1_U0_P0 = 0x04058204ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG1_U1_P0 = 0x04058744ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG1_U1_P0 = 0x04058634ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG1_U1_P0 = 0x04058644ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG1_U1_P0 = 0x04058604ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R0_P0 = 0x04058304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R1_P0 = 0x04058704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R2_P0 = 0x04058b04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R3_P0 = 0x04058f04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R4_P0 = 0x04059304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R5_P0 = 0x04059704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R6_P0 = 0x04059b04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R7_P0 = 0x04059f04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R8_P0 = 0x0405a304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG1_U0_P0 = 0x0405c344ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG1_U0_P0 = 0x0405c234ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG1_U0_P0 = 0x0405c244ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG1_U0_P0 = 0x0405c204ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG1_U1_P0 = 0x0405c744ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG1_U1_P0 = 0x0405c634ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG1_U1_P0 = 0x0405c644ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG1_U1_P0 = 0x0405c604ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R0_P0 = 0x0405c304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R1_P0 = 0x0405c704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R2_P0 = 0x0405cb04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R3_P0 = 0x0405cf04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R4_P0 = 0x0405d304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R5_P0 = 0x0405d704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R6_P0 = 0x0405db04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R7_P0 = 0x0405df04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R8_P0 = 0x0405e304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG1_U0_P0 = 0x04060344ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG1_U0_P0 = 0x04060234ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG1_U0_P0 = 0x04060244ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG1_U0_P0 = 0x04060204ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG1_U1_P0 = 0x04060744ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG1_U1_P0 = 0x04060634ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG1_U1_P0 = 0x04060644ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG1_U1_P0 = 0x04060604ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R0_P0 = 0x04060304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R1_P0 = 0x04060704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R2_P0 = 0x04060b04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R3_P0 = 0x04060f04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R4_P0 = 0x04061304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R5_P0 = 0x04061704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R6_P0 = 0x04061b04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R7_P0 = 0x04061f04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R8_P0 = 0x04062304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG1_U0_P0 = 0x04064344ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG1_U0_P0 = 0x04064234ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG1_U0_P0 = 0x04064244ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG1_U0_P0 = 0x04064204ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG1_U1_P0 = 0x04064744ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG1_U1_P0 = 0x04064634ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG1_U1_P0 = 0x04064644ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG1_U1_P0 = 0x04064604ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R0_P0 = 0x04064304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R1_P0 = 0x04064704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R2_P0 = 0x04064b04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R3_P0 = 0x04064f04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R4_P0 = 0x04065304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R5_P0 = 0x04065704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R6_P0 = 0x04065b04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R7_P0 = 0x04065f04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R8_P0 = 0x04066304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG2_U0_P0 = 0x04040348ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG2_U0_P0 = 0x04040238ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG2_U0_P0 = 0x04040248ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG2_U0_P0 = 0x04040208ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG2_U1_P0 = 0x04040748ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG2_U1_P0 = 0x04040638ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG2_U1_P0 = 0x04040648ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG2_U1_P0 = 0x04040608ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R0_P0 = 0x04040308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R1_P0 = 0x04040708ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R2_P0 = 0x04040b08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R3_P0 = 0x04040f08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R4_P0 = 0x04041308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R5_P0 = 0x04041708ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R6_P0 = 0x04041b08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R7_P0 = 0x04041f08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R8_P0 = 0x04042308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG2_U0_P0 = 0x04044348ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG2_U0_P0 = 0x04044238ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG2_U0_P0 = 0x04044248ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG2_U0_P0 = 0x04044208ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG2_U1_P0 = 0x04044748ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG2_U1_P0 = 0x04044638ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG2_U1_P0 = 0x04044648ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG2_U1_P0 = 0x04044608ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R0_P0 = 0x04044308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R1_P0 = 0x04044708ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R2_P0 = 0x04044b08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R3_P0 = 0x04044f08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R4_P0 = 0x04045308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R5_P0 = 0x04045708ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R6_P0 = 0x04045b08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R7_P0 = 0x04045f08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R8_P0 = 0x04046308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG2_U0_P0 = 0x04048348ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG2_U0_P0 = 0x04048238ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG2_U0_P0 = 0x04048248ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG2_U0_P0 = 0x04048208ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG2_U1_P0 = 0x04048748ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG2_U1_P0 = 0x04048638ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG2_U1_P0 = 0x04048648ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG2_U1_P0 = 0x04048608ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R0_P0 = 0x04048308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R1_P0 = 0x04048708ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R2_P0 = 0x04048b08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R3_P0 = 0x04048f08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R4_P0 = 0x04049308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R5_P0 = 0x04049708ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R6_P0 = 0x04049b08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R7_P0 = 0x04049f08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R8_P0 = 0x0404a308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG2_U0_P0 = 0x0404c348ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG2_U0_P0 = 0x0404c238ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG2_U0_P0 = 0x0404c248ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG2_U0_P0 = 0x0404c208ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG2_U1_P0 = 0x0404c748ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG2_U1_P0 = 0x0404c638ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG2_U1_P0 = 0x0404c648ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG2_U1_P0 = 0x0404c608ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R0_P0 = 0x0404c308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R1_P0 = 0x0404c708ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R2_P0 = 0x0404cb08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R3_P0 = 0x0404cf08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R4_P0 = 0x0404d308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R5_P0 = 0x0404d708ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R6_P0 = 0x0404db08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R7_P0 = 0x0404df08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R8_P0 = 0x0404e308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG2_U0_P0 = 0x04050348ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG2_U0_P0 = 0x04050238ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG2_U0_P0 = 0x04050248ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG2_U0_P0 = 0x04050208ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG2_U1_P0 = 0x04050748ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG2_U1_P0 = 0x04050638ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG2_U1_P0 = 0x04050648ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG2_U1_P0 = 0x04050608ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R0_P0 = 0x04050308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R1_P0 = 0x04050708ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R2_P0 = 0x04050b08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R3_P0 = 0x04050f08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R4_P0 = 0x04051308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R5_P0 = 0x04051708ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R6_P0 = 0x04051b08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R7_P0 = 0x04051f08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R8_P0 = 0x04052308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG2_U0_P0 = 0x04054348ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG2_U0_P0 = 0x04054238ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG2_U0_P0 = 0x04054248ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG2_U0_P0 = 0x04054208ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG2_U1_P0 = 0x04054748ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG2_U1_P0 = 0x04054638ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG2_U1_P0 = 0x04054648ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG2_U1_P0 = 0x04054608ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R0_P0 = 0x04054308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R1_P0 = 0x04054708ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R2_P0 = 0x04054b08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R3_P0 = 0x04054f08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R4_P0 = 0x04055308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R5_P0 = 0x04055708ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R6_P0 = 0x04055b08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R7_P0 = 0x04055f08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R8_P0 = 0x04056308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG2_U0_P0 = 0x04058348ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG2_U0_P0 = 0x04058238ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG2_U0_P0 = 0x04058248ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG2_U0_P0 = 0x04058208ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG2_U1_P0 = 0x04058748ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG2_U1_P0 = 0x04058638ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG2_U1_P0 = 0x04058648ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG2_U1_P0 = 0x04058608ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R0_P0 = 0x04058308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R1_P0 = 0x04058708ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R2_P0 = 0x04058b08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R3_P0 = 0x04058f08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R4_P0 = 0x04059308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R5_P0 = 0x04059708ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R6_P0 = 0x04059b08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R7_P0 = 0x04059f08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R8_P0 = 0x0405a308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG2_U0_P0 = 0x0405c348ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG2_U0_P0 = 0x0405c238ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG2_U0_P0 = 0x0405c248ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG2_U0_P0 = 0x0405c208ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG2_U1_P0 = 0x0405c748ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG2_U1_P0 = 0x0405c638ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG2_U1_P0 = 0x0405c648ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG2_U1_P0 = 0x0405c608ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R0_P0 = 0x0405c308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R1_P0 = 0x0405c708ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R2_P0 = 0x0405cb08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R3_P0 = 0x0405cf08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R4_P0 = 0x0405d308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R5_P0 = 0x0405d708ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R6_P0 = 0x0405db08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R7_P0 = 0x0405df08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R8_P0 = 0x0405e308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG2_U0_P0 = 0x04060348ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG2_U0_P0 = 0x04060238ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG2_U0_P0 = 0x04060248ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG2_U0_P0 = 0x04060208ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG2_U1_P0 = 0x04060748ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG2_U1_P0 = 0x04060638ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG2_U1_P0 = 0x04060648ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG2_U1_P0 = 0x04060608ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R0_P0 = 0x04060308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R1_P0 = 0x04060708ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R2_P0 = 0x04060b08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R3_P0 = 0x04060f08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R4_P0 = 0x04061308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R5_P0 = 0x04061708ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R6_P0 = 0x04061b08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R7_P0 = 0x04061f08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R8_P0 = 0x04062308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG2_U0_P0 = 0x04064348ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG2_U0_P0 = 0x04064238ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG2_U0_P0 = 0x04064248ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG2_U0_P0 = 0x04064208ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG2_U1_P0 = 0x04064748ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG2_U1_P0 = 0x04064638ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG2_U1_P0 = 0x04064648ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG2_U1_P0 = 0x04064608ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R0_P0 = 0x04064308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R1_P0 = 0x04064708ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R2_P0 = 0x04064b08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R3_P0 = 0x04064f08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R4_P0 = 0x04065308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R5_P0 = 0x04065708ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R6_P0 = 0x04065b08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R7_P0 = 0x04065f08ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R8_P0 = 0x04066308ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG3_U0_P0 = 0x0404034cull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG3_U0_P0 = 0x0404023cull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG3_U0_P0 = 0x0404024cull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG3_U0_P0 = 0x0404020cull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG3_U1_P0 = 0x0404074cull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG3_U1_P0 = 0x0404063cull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG3_U1_P0 = 0x0404064cull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG3_U1_P0 = 0x0404060cull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R0_P0 = 0x0404030cull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R1_P0 = 0x0404070cull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R2_P0 = 0x04040b0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R3_P0 = 0x04040f0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R4_P0 = 0x0404130cull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R5_P0 = 0x0404170cull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R6_P0 = 0x04041b0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R7_P0 = 0x04041f0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R8_P0 = 0x0404230cull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG3_U0_P0 = 0x0404434cull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG3_U0_P0 = 0x0404423cull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG3_U0_P0 = 0x0404424cull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG3_U0_P0 = 0x0404420cull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG3_U1_P0 = 0x0404474cull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG3_U1_P0 = 0x0404463cull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG3_U1_P0 = 0x0404464cull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG3_U1_P0 = 0x0404460cull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R0_P0 = 0x0404430cull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R1_P0 = 0x0404470cull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R2_P0 = 0x04044b0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R3_P0 = 0x04044f0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R4_P0 = 0x0404530cull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R5_P0 = 0x0404570cull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R6_P0 = 0x04045b0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R7_P0 = 0x04045f0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R8_P0 = 0x0404630cull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG3_U0_P0 = 0x0404834cull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG3_U0_P0 = 0x0404823cull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG3_U0_P0 = 0x0404824cull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG3_U0_P0 = 0x0404820cull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG3_U1_P0 = 0x0404874cull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG3_U1_P0 = 0x0404863cull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG3_U1_P0 = 0x0404864cull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG3_U1_P0 = 0x0404860cull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R0_P0 = 0x0404830cull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R1_P0 = 0x0404870cull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R2_P0 = 0x04048b0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R3_P0 = 0x04048f0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R4_P0 = 0x0404930cull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R5_P0 = 0x0404970cull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R6_P0 = 0x04049b0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R7_P0 = 0x04049f0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R8_P0 = 0x0404a30cull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG3_U0_P0 = 0x0404c34cull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG3_U0_P0 = 0x0404c23cull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG3_U0_P0 = 0x0404c24cull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG3_U0_P0 = 0x0404c20cull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG3_U1_P0 = 0x0404c74cull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG3_U1_P0 = 0x0404c63cull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG3_U1_P0 = 0x0404c64cull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG3_U1_P0 = 0x0404c60cull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R0_P0 = 0x0404c30cull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R1_P0 = 0x0404c70cull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R2_P0 = 0x0404cb0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R3_P0 = 0x0404cf0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R4_P0 = 0x0404d30cull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R5_P0 = 0x0404d70cull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R6_P0 = 0x0404db0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R7_P0 = 0x0404df0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R8_P0 = 0x0404e30cull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG3_U0_P0 = 0x0405034cull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG3_U0_P0 = 0x0405023cull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG3_U0_P0 = 0x0405024cull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG3_U0_P0 = 0x0405020cull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG3_U1_P0 = 0x0405074cull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG3_U1_P0 = 0x0405063cull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG3_U1_P0 = 0x0405064cull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG3_U1_P0 = 0x0405060cull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R0_P0 = 0x0405030cull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R1_P0 = 0x0405070cull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R2_P0 = 0x04050b0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R3_P0 = 0x04050f0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R4_P0 = 0x0405130cull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R5_P0 = 0x0405170cull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R6_P0 = 0x04051b0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R7_P0 = 0x04051f0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R8_P0 = 0x0405230cull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG3_U0_P0 = 0x0405434cull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG3_U0_P0 = 0x0405423cull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG3_U0_P0 = 0x0405424cull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG3_U0_P0 = 0x0405420cull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG3_U1_P0 = 0x0405474cull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG3_U1_P0 = 0x0405463cull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG3_U1_P0 = 0x0405464cull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG3_U1_P0 = 0x0405460cull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R0_P0 = 0x0405430cull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R1_P0 = 0x0405470cull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R2_P0 = 0x04054b0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R3_P0 = 0x04054f0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R4_P0 = 0x0405530cull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R5_P0 = 0x0405570cull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R6_P0 = 0x04055b0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R7_P0 = 0x04055f0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R8_P0 = 0x0405630cull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG3_U0_P0 = 0x0405834cull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG3_U0_P0 = 0x0405823cull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG3_U0_P0 = 0x0405824cull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG3_U0_P0 = 0x0405820cull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG3_U1_P0 = 0x0405874cull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG3_U1_P0 = 0x0405863cull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG3_U1_P0 = 0x0405864cull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG3_U1_P0 = 0x0405860cull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R0_P0 = 0x0405830cull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R1_P0 = 0x0405870cull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R2_P0 = 0x04058b0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R3_P0 = 0x04058f0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R4_P0 = 0x0405930cull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R5_P0 = 0x0405970cull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R6_P0 = 0x04059b0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R7_P0 = 0x04059f0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R8_P0 = 0x0405a30cull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG3_U0_P0 = 0x0405c34cull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG3_U0_P0 = 0x0405c23cull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG3_U0_P0 = 0x0405c24cull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG3_U0_P0 = 0x0405c20cull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG3_U1_P0 = 0x0405c74cull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG3_U1_P0 = 0x0405c63cull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG3_U1_P0 = 0x0405c64cull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG3_U1_P0 = 0x0405c60cull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R0_P0 = 0x0405c30cull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R1_P0 = 0x0405c70cull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R2_P0 = 0x0405cb0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R3_P0 = 0x0405cf0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R4_P0 = 0x0405d30cull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R5_P0 = 0x0405d70cull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R6_P0 = 0x0405db0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R7_P0 = 0x0405df0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R8_P0 = 0x0405e30cull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG3_U0_P0 = 0x0406034cull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG3_U0_P0 = 0x0406023cull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG3_U0_P0 = 0x0406024cull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG3_U0_P0 = 0x0406020cull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG3_U1_P0 = 0x0406074cull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG3_U1_P0 = 0x0406063cull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG3_U1_P0 = 0x0406064cull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG3_U1_P0 = 0x0406060cull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R0_P0 = 0x0406030cull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R1_P0 = 0x0406070cull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R2_P0 = 0x04060b0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R3_P0 = 0x04060f0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R4_P0 = 0x0406130cull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R5_P0 = 0x0406170cull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R6_P0 = 0x04061b0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R7_P0 = 0x04061f0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R8_P0 = 0x0406230cull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG3_U0_P0 = 0x0406434cull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG3_U0_P0 = 0x0406423cull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG3_U0_P0 = 0x0406424cull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG3_U0_P0 = 0x0406420cull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG3_U1_P0 = 0x0406474cull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG3_U1_P0 = 0x0406463cull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG3_U1_P0 = 0x0406464cull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG3_U1_P0 = 0x0406460cull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R0_P0 = 0x0406430cull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R1_P0 = 0x0406470cull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R2_P0 = 0x04064b0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R3_P0 = 0x04064f0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R4_P0 = 0x0406530cull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R5_P0 = 0x0406570cull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R6_P0 = 0x04065b0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R7_P0 = 0x04065f0cull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R8_P0 = 0x0406630cull;
static const uint64_t EXP_DDR4_PHY_ANIB0_ATXDLY_P0 = 0x04000200ull;
static const uint64_t EXP_DDR4_PHY_ANIB1_ATXDLY_P0 = 0x04004200ull;
static const uint64_t EXP_DDR4_PHY_ANIB2_ATXDLY_P0 = 0x04008200ull;
static const uint64_t EXP_DDR4_PHY_ANIB3_ATXDLY_P0 = 0x0400c200ull;
static const uint64_t EXP_DDR4_PHY_ANIB4_ATXDLY_P0 = 0x04010200ull;
static const uint64_t EXP_DDR4_PHY_ANIB5_ATXDLY_P0 = 0x04014200ull;
static const uint64_t EXP_DDR4_PHY_ANIB6_ATXDLY_P0 = 0x04018200ull;
static const uint64_t EXP_DDR4_PHY_ANIB7_ATXDLY_P0 = 0x0401c200ull;
static const uint64_t EXP_DDR4_PHY_ANIB8_ATXDLY_P0 = 0x04020200ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG0_U0_P1 = 0x04440340ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG0_U0_P1 = 0x04440230ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG0_U0_P1 = 0x04440240ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG0_U0_P1 = 0x04440200ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG0_U1_P1 = 0x04440740ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG0_U1_P1 = 0x04440630ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG0_U1_P1 = 0x04440640ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG0_U1_P1 = 0x04440600ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R0_P1 = 0x04440300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R1_P1 = 0x04440700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R2_P1 = 0x04440b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R3_P1 = 0x04440f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R4_P1 = 0x04441300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R5_P1 = 0x04441700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R6_P1 = 0x04441b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R7_P1 = 0x04441f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R8_P1 = 0x04442300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG0_U0_P1 = 0x04444340ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG0_U0_P1 = 0x04444230ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG0_U0_P1 = 0x04444240ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG0_U0_P1 = 0x04444200ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG0_U1_P1 = 0x04444740ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG0_U1_P1 = 0x04444630ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG0_U1_P1 = 0x04444640ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG0_U1_P1 = 0x04444600ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R0_P1 = 0x04444300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R1_P1 = 0x04444700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R2_P1 = 0x04444b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R3_P1 = 0x04444f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R4_P1 = 0x04445300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R5_P1 = 0x04445700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R6_P1 = 0x04445b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R7_P1 = 0x04445f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R8_P1 = 0x04446300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG0_U0_P1 = 0x04448340ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG0_U0_P1 = 0x04448230ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG0_U0_P1 = 0x04448240ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG0_U0_P1 = 0x04448200ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG0_U1_P1 = 0x04448740ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG0_U1_P1 = 0x04448630ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG0_U1_P1 = 0x04448640ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG0_U1_P1 = 0x04448600ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R0_P1 = 0x04448300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R1_P1 = 0x04448700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R2_P1 = 0x04448b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R3_P1 = 0x04448f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R4_P1 = 0x04449300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R5_P1 = 0x04449700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R6_P1 = 0x04449b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R7_P1 = 0x04449f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R8_P1 = 0x0444a300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG0_U0_P1 = 0x0444c340ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG0_U0_P1 = 0x0444c230ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG0_U0_P1 = 0x0444c240ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG0_U0_P1 = 0x0444c200ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG0_U1_P1 = 0x0444c740ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG0_U1_P1 = 0x0444c630ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG0_U1_P1 = 0x0444c640ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG0_U1_P1 = 0x0444c600ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R0_P1 = 0x0444c300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R1_P1 = 0x0444c700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R2_P1 = 0x0444cb00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R3_P1 = 0x0444cf00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R4_P1 = 0x0444d300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R5_P1 = 0x0444d700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R6_P1 = 0x0444db00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R7_P1 = 0x0444df00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R8_P1 = 0x0444e300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG0_U0_P1 = 0x04450340ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG0_U0_P1 = 0x04450230ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG0_U0_P1 = 0x04450240ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG0_U0_P1 = 0x04450200ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG0_U1_P1 = 0x04450740ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG0_U1_P1 = 0x04450630ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG0_U1_P1 = 0x04450640ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG0_U1_P1 = 0x04450600ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R0_P1 = 0x04450300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R1_P1 = 0x04450700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R2_P1 = 0x04450b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R3_P1 = 0x04450f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R4_P1 = 0x04451300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R5_P1 = 0x04451700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R6_P1 = 0x04451b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R7_P1 = 0x04451f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R8_P1 = 0x04452300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG0_U0_P1 = 0x04454340ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG0_U0_P1 = 0x04454230ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG0_U0_P1 = 0x04454240ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG0_U0_P1 = 0x04454200ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG0_U1_P1 = 0x04454740ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG0_U1_P1 = 0x04454630ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG0_U1_P1 = 0x04454640ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG0_U1_P1 = 0x04454600ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R0_P1 = 0x04454300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R1_P1 = 0x04454700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R2_P1 = 0x04454b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R3_P1 = 0x04454f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R4_P1 = 0x04455300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R5_P1 = 0x04455700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R6_P1 = 0x04455b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R7_P1 = 0x04455f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R8_P1 = 0x04456300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG0_U0_P1 = 0x04458340ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG0_U0_P1 = 0x04458230ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG0_U0_P1 = 0x04458240ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG0_U0_P1 = 0x04458200ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG0_U1_P1 = 0x04458740ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG0_U1_P1 = 0x04458630ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG0_U1_P1 = 0x04458640ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG0_U1_P1 = 0x04458600ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R0_P1 = 0x04458300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R1_P1 = 0x04458700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R2_P1 = 0x04458b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R3_P1 = 0x04458f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R4_P1 = 0x04459300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R5_P1 = 0x04459700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R6_P1 = 0x04459b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R7_P1 = 0x04459f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R8_P1 = 0x0445a300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG0_U0_P1 = 0x0445c340ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG0_U0_P1 = 0x0445c230ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG0_U0_P1 = 0x0445c240ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG0_U0_P1 = 0x0445c200ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG0_U1_P1 = 0x0445c740ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG0_U1_P1 = 0x0445c630ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG0_U1_P1 = 0x0445c640ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG0_U1_P1 = 0x0445c600ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R0_P1 = 0x0445c300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R1_P1 = 0x0445c700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R2_P1 = 0x0445cb00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R3_P1 = 0x0445cf00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R4_P1 = 0x0445d300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R5_P1 = 0x0445d700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R6_P1 = 0x0445db00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R7_P1 = 0x0445df00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R8_P1 = 0x0445e300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG0_U0_P1 = 0x04460340ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG0_U0_P1 = 0x04460230ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG0_U0_P1 = 0x04460240ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG0_U0_P1 = 0x04460200ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG0_U1_P1 = 0x04460740ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG0_U1_P1 = 0x04460630ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG0_U1_P1 = 0x04460640ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG0_U1_P1 = 0x04460600ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R0_P1 = 0x04460300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R1_P1 = 0x04460700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R2_P1 = 0x04460b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R3_P1 = 0x04460f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R4_P1 = 0x04461300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R5_P1 = 0x04461700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R6_P1 = 0x04461b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R7_P1 = 0x04461f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R8_P1 = 0x04462300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG0_U0_P1 = 0x04464340ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG0_U0_P1 = 0x04464230ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG0_U0_P1 = 0x04464240ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG0_U0_P1 = 0x04464200ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG0_U1_P1 = 0x04464740ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG0_U1_P1 = 0x04464630ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG0_U1_P1 = 0x04464640ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG0_U1_P1 = 0x04464600ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R0_P1 = 0x04464300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R1_P1 = 0x04464700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R2_P1 = 0x04464b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R3_P1 = 0x04464f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R4_P1 = 0x04465300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R5_P1 = 0x04465700ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R6_P1 = 0x04465b00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R7_P1 = 0x04465f00ull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R8_P1 = 0x04466300ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG1_U0_P1 = 0x04440344ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG1_U0_P1 = 0x04440234ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG1_U0_P1 = 0x04440244ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG1_U0_P1 = 0x04440204ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG1_U1_P1 = 0x04440744ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG1_U1_P1 = 0x04440634ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG1_U1_P1 = 0x04440644ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG1_U1_P1 = 0x04440604ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R0_P1 = 0x04440304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R1_P1 = 0x04440704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R2_P1 = 0x04440b04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R3_P1 = 0x04440f04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R4_P1 = 0x04441304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R5_P1 = 0x04441704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R6_P1 = 0x04441b04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R7_P1 = 0x04441f04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R8_P1 = 0x04442304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG1_U0_P1 = 0x04444344ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG1_U0_P1 = 0x04444234ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG1_U0_P1 = 0x04444244ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG1_U0_P1 = 0x04444204ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG1_U1_P1 = 0x04444744ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG1_U1_P1 = 0x04444634ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG1_U1_P1 = 0x04444644ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG1_U1_P1 = 0x04444604ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R0_P1 = 0x04444304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R1_P1 = 0x04444704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R2_P1 = 0x04444b04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R3_P1 = 0x04444f04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R4_P1 = 0x04445304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R5_P1 = 0x04445704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R6_P1 = 0x04445b04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R7_P1 = 0x04445f04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R8_P1 = 0x04446304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG1_U0_P1 = 0x04448344ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG1_U0_P1 = 0x04448234ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG1_U0_P1 = 0x04448244ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG1_U0_P1 = 0x04448204ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG1_U1_P1 = 0x04448744ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG1_U1_P1 = 0x04448634ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG1_U1_P1 = 0x04448644ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG1_U1_P1 = 0x04448604ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R0_P1 = 0x04448304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R1_P1 = 0x04448704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R2_P1 = 0x04448b04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R3_P1 = 0x04448f04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R4_P1 = 0x04449304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R5_P1 = 0x04449704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R6_P1 = 0x04449b04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R7_P1 = 0x04449f04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R8_P1 = 0x0444a304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG1_U0_P1 = 0x0444c344ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG1_U0_P1 = 0x0444c234ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG1_U0_P1 = 0x0444c244ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG1_U0_P1 = 0x0444c204ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG1_U1_P1 = 0x0444c744ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG1_U1_P1 = 0x0444c634ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG1_U1_P1 = 0x0444c644ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG1_U1_P1 = 0x0444c604ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R0_P1 = 0x0444c304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R1_P1 = 0x0444c704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R2_P1 = 0x0444cb04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R3_P1 = 0x0444cf04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R4_P1 = 0x0444d304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R5_P1 = 0x0444d704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R6_P1 = 0x0444db04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R7_P1 = 0x0444df04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R8_P1 = 0x0444e304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG1_U0_P1 = 0x04450344ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG1_U0_P1 = 0x04450234ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG1_U0_P1 = 0x04450244ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG1_U0_P1 = 0x04450204ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG1_U1_P1 = 0x04450744ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG1_U1_P1 = 0x04450634ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG1_U1_P1 = 0x04450644ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG1_U1_P1 = 0x04450604ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R0_P1 = 0x04450304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R1_P1 = 0x04450704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R2_P1 = 0x04450b04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R3_P1 = 0x04450f04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R4_P1 = 0x04451304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R5_P1 = 0x04451704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R6_P1 = 0x04451b04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R7_P1 = 0x04451f04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R8_P1 = 0x04452304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG1_U0_P1 = 0x04454344ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG1_U0_P1 = 0x04454234ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG1_U0_P1 = 0x04454244ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG1_U0_P1 = 0x04454204ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG1_U1_P1 = 0x04454744ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG1_U1_P1 = 0x04454634ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG1_U1_P1 = 0x04454644ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG1_U1_P1 = 0x04454604ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R0_P1 = 0x04454304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R1_P1 = 0x04454704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R2_P1 = 0x04454b04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R3_P1 = 0x04454f04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R4_P1 = 0x04455304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R5_P1 = 0x04455704ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R6_P1 = 0x04455b04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R7_P1 = 0x04455f04ull;
static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R8_P1 = 0x04456304ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG1_U0_P1 = 0x04458344ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG1_U0_P1 = 0x04458234ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG1_U0_P1 = 0x04458244ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG1_U0_P1 = 0x04458204ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG1_U1_P1 = 0x04458744ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG1_U1_P1 = 0x04458634ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG1_U1_P1 = 0x04458644ull;
static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG1_U1_P1 = 0x04458604ull;