-
Notifications
You must be signed in to change notification settings - Fork 97
/
p9_pstate_parameter_block.C
4557 lines (3837 loc) · 190 KB
/
p9_pstate_parameter_block.C
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.C $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
/* Licensed under the Apache License, Version 2.0 (the "License"); */
/* you may not use this file except in compliance with the License. */
/* You may obtain a copy of the License at */
/* */
/* http://www.apache.org/licenses/LICENSE-2.0 */
/* */
/* Unless required by applicable law or agreed to in writing, software */
/* distributed under the License is distributed on an "AS IS" BASIS, */
/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
/* implied. See the License for the specific language governing */
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
///
/// @file p9_pstate_parameter_block.C
/// @brief Setup Pstate super structure for PGPE/CME HCode
///
/// *HWP HW Owner : Greg Still <stillgs@us.ibm.com>
/// *HWP FW Owner : Prasad Bg Ranganath <prasadbgr@in.ibm.com>
/// *HWP Team : PM
/// *HWP Level : 3
/// *HWP Consumed by : PGPE,CME
///
/// @verbatim
/// Procedure Summary:
/// - Read VPD and attributes to create the Pstate Parameter Block(s) (one each for PGPE,OCC and CMEs).
/// @endverbatim
// *INDENT-OFF*
//
// ----------------------------------------------------------------------
// Includes
// ----------------------------------------------------------------------
#include <fapi2.H>
#include <p9_pstate_parameter_block.H>
#include <p9_hcd_memmap_base.H>
#include "p9_pm_get_poundw_bucket.H"
#include "p9_resclk_defines.H"
#include <attribute_ids.H>
#include <math.h>
//the value in this table are in Index format
uint8_t g_GreyCodeIndexMapping [] =
{
/* 0mV 0x00*/ 0,
/* - 8mV 0x01*/ 1,
/* -24mV 0x02*/ 3,
/* -16mV 0x03*/ 2,
/* -56mV 0x04*/ 7,
/* -48mV 0x05*/ 6,
/* -32mV 0x06*/ 4,
/* -40mV 0x07*/ 5,
/* -96mV 0x08*/ 12,
/* -96mV 0x09*/ 12,
/* -96mV 0x0a*/ 12,
/* -96mV 0x0b*/ 12,
/* -64mV 0x0c*/ 8,
/* -72mV 0x0d*/ 9,
/* -88mV 0x0e*/ 11,
/* -80mV 0x0f*/ 10
};
// from above mapping
const uint8_t GREYCODE_INDEX_M32MV = 4;
// #W version number where no special checks are needed.
const uint32_t FULLY_VALID_POUNDW_VERSION = 3;
fapi2::vdmData_t g_vpdData = {1,
2,
{
0x29, 0x0C, 0x05, 0xC3, 0x61, 0x36, 0x1, 0x3, 0x0, 0x0, //Nominal
0x28, 0xa8, 0x05, 0x5f, 0x21, 0x36, 0x1, 0x3, 0x0, 0x0, //PowerSave
0x29, 0x70, 0x06, 0x27, 0x71, 0x36, 0x1, 0x3, 0x0, 0x0, //Turbo
0x29, 0xD4, 0x06, 0x8b, 0x51, 0x36, 0x1, 0x3, 0x0, 0x0, //UltraTurbo
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0, 0x0, 0x0, 0x0, //Resistance
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0, 0x0, 0x0, 0x0 //Spare
}
};
uint8_t g_wofData[] = { 0x57, 0x46, 0x54, 0x48 /*MAGIC CODE WFTH*/,
0x00, 0x00, 0x00, 0x01 /*version*/,
0x00, 0x80 /*VFRT block size*/,
0x00, 0x08 /*VFRT header size*/,
0x00, 0x01 /*VFRT data size*/,
0x6 /*Quad value*/,
0x18 /*core count*/,
0x00, 0xFA /*Vdn start*/,
0x00, 0x64 /*Vdn step*/,
0x00, 0x08 /*Vdn size*/,
0x00, 0x00 /*Vdd start*/,
0x00, 0x32 /*Vdd step*/,
0x00, 0x15 /*Vdd size*/,
0x03, 0xE8 /*Vratio start*/,
0x00, 0x53 /*Vratio step*/,
0x00, 0x18 /*Vratio size*/,
0x03, 0xE8 /*Fratio start*/,
0x00, 0x64 /*Fratio step*/,
0x00, 0x5 /*Fratio size*/,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /*Vdn percent*/,
0x00, 0x64 /*Socket power Watts*/,
0x07, 0x4a /*nest freq*/,
0x09, 0x60 /*nominl freq*/,
0x00, 0x00 /*RDP capacity*/,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* WOF table source tag*/,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /*package name*/,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*Pad to 128B*/
};
uint8_t g_sysvfrtData[] = {0x56, 0x54, 0x00, 0x00, 0x02, 0x01, 0x01, 0x06, /// VFRT header values
// Magic_codea(2B)
// reserved(2B)
// type(4b),version(4b)
// vdn(1B),vdd(1B)
// quad id(1B)
0xB1, 0xB1, 0xB0, 0xAF, 0xA9, 0xA1, 0x97, 0x8E, 0x86, 0x7F, 0x78, 0x73, 0x6D, 0x68, 0x63, 0x5F, 0x5B, 0x57, 0x53, 0x4E, 0x4D, 0x4D, 0x4D, 0x4D,
0xB1, 0xB1, 0xB0, 0xAF, 0xA9, 0xA1, 0x97, 0x8E, 0x86, 0x7F, 0x78, 0x73, 0x6D, 0x68, 0x63, 0x5F, 0x5B, 0x57, 0x53, 0x4E, 0x4D, 0x4D, 0x4D, 0x4D,
0xB1, 0xB1, 0xB0, 0xAF, 0xA9, 0xA1, 0x97, 0x8E, 0x86, 0x7F, 0x78, 0x73, 0x6D, 0x68, 0x63, 0x5F, 0x5B, 0x57, 0x53, 0x4E, 0x4D, 0x4D, 0x4D, 0x4D,
0xB1, 0xB1, 0xB0, 0xAF, 0xA9, 0xA1, 0x97, 0x8E, 0x86, 0x7F, 0x78, 0x73, 0x6D, 0x68, 0x63, 0x5F, 0x5B, 0x57, 0x53, 0x4E, 0x4D, 0x4D, 0x4D, 0x4D,
0xB1, 0xB1, 0xB0, 0xAF, 0xA9, 0xA1, 0x97, 0x8E, 0x86, 0x7F, 0x78, 0x73, 0x6D, 0x68, 0x63, 0x5F, 0x5B, 0x57, 0x53, 0x4E, 0x4D, 0x4D, 0x4D, 0x4D
};
#define VALIDATE_VID_VALUES(w,x,y,z,state) \
if (!((w <= x) && (x <= y) && (y <= z))) \
{state = 0;}
#define VALIDATE_THRESHOLD_VALUES(w,x,y,z,state) \
if ((w > 0x7 && w != 0xC) || /* overvolt */ \
(x == 8) || (x == 9) || (x > 0xF) || \
(y == 8) || (y == 9) || (y > 0xF) || \
(z == 8) || (z == 9) || (z > 0xF) ) \
{state = 0;}
//w => N_L (w > 7 is invalid)
//x => N_S (x > N_L is invalid)
//y => L_S (y > (N_L - S_N) is invalid)
//z => S_N (z > N_S is invalid
#define VALIDATE_FREQUENCY_DROP_VALUES(w,x,y,z,state) \
if ((w > 7) || \
(x > w) || \
(y > (w - z)) || \
(z > x) || \
((w | x | y | z) == 0)) \
{state = 0; }
#define VALIDATE_WOF_HEADER_DATA(a,b,c,d,e,f,g,state) \
if ( ((!a) || (!b) || (!c) || (!d) || (!e) || (!f) || (!g))) \
{state = 0; }
double internal_ceil(double x)
{
if ((x-(int)(x))>0) return (int)x+1;
return ((int)x);
}
double internal_floor(double x)
{
if(x>=0)return (int)x;
return (int)(x-0.9999999999999999);
}
// Struct Variable for all attributes
AttributeList attr;
// Strings used in traces
char const* vpdSetStr[NUM_VPD_PTS_SET] = VPD_PT_SET_ORDER_STR;
char const* region_names[] = { "REGION_POWERSAVE_NOMINAL",
"REGION_NOMINAL_TURBO",
"REGION_TURBO_ULTRA"
};
char const* prt_region_names[] = VPD_OP_SLOPES_REGION_ORDER_STR;
///--------------------------------------
/// @brief Check wof is enabled or not
/// @param[in] pstate attribute state
/// @return true or false
///--------------------------------------
bool
is_wof_enabled(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
PSTATE_attribute_state* i_state)
{
uint8_t attr_dd_wof_not_supported;
uint8_t attr_system_wof_disable;
const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
FAPI_ATTR_GET(fapi2::ATTR_SYSTEM_WOF_DISABLE, FAPI_SYSTEM, attr_system_wof_disable);
FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_WOF_NOT_SUPPORTED, i_target, attr_dd_wof_not_supported);
return
(!(attr_system_wof_disable) &&
!(attr_dd_wof_not_supported) &&
i_state->iv_wof_enabled)
? true : false;
}
///--------------------------------------
/// @brief Check vdm is enabled or not
/// @param[in] pstate attribute state
/// @return true or false
///--------------------------------------
bool
is_vdm_enabled(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
PSTATE_attribute_state* i_state)
{
const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
uint8_t attr_dd_vdm_not_supported;
uint8_t attr_system_vdm_disable;
FAPI_ATTR_GET(fapi2::ATTR_SYSTEM_VDM_DISABLE, FAPI_SYSTEM, attr_system_vdm_disable);
FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_VDM_NOT_SUPPORTED, i_target, attr_dd_vdm_not_supported);
return
(!(attr_system_vdm_disable) &&
!(attr_dd_vdm_not_supported) &&
i_state->iv_vdm_enabled)
? true : false;
}
// START OF PSTATE PARAMETER BLOCK function
fapi2::ReturnCode
p9_pstate_parameter_block( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
PstateSuperStructure* io_pss,
uint8_t* o_buf,
uint32_t& io_size)
{
FAPI_DBG("> p9_pstate_parameter_block");
const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
fapi2::ReturnCode l_rc = 0;
io_size = 0;
do
{
// -----------------------------------------------------------
// Clear the PstateSuperStructure and install the magic number
//----------------------------------------------------------
memset(io_pss, 0, sizeof(PstateSuperStructure));
FAPI_INF("Populating magic number in Pstate Parameter block structure");
(*io_pss).magic = revle64(PSTATE_PARMSBLOCK_MAGIC);
//Local variables for Global,local and OCC parameter blocks
// PGPE content
GlobalPstateParmBlock l_globalppb;
memset (&l_globalppb, 0, sizeof(GlobalPstateParmBlock));
// CME content
LocalPstateParmBlock l_localppb;
memset (&l_localppb, 0, sizeof(LocalPstateParmBlock));
// OCC content
OCCPstateParmBlock l_occppb;
memset (&l_occppb , 0, sizeof (OCCPstateParmBlock));
PSTATE_attribute_state l_state;
l_state.iv_pstates_enabled = true;
l_state.iv_resclk_enabled = true;
l_state.iv_vdm_enabled = true;
l_state.iv_ivrm_enabled = true;
l_state.iv_wof_enabled = true;
// Enablement state
PoundW_data l_poundw_data;
memset (&l_poundw_data,0,sizeof(l_poundw_data));
// MVPD #V variables
uint32_t attr_mvpd_voltage_control[PV_D][PV_W];
uint8_t present_chiplets = 0;
uint32_t valid_pdv_points = 0;
//Variables for Loadline, Distribution loss and offset
SysPowerDistParms l_vdd_sysparm;
memset(&l_vdd_sysparm,0x00,sizeof(SysPowerDistParms));
SysPowerDistParms l_vcs_sysparm;
memset(&l_vcs_sysparm,0x00,sizeof(SysPowerDistParms));
SysPowerDistParms l_vdn_sysparm;
memset(&l_vdn_sysparm,0x00,sizeof(SysPowerDistParms));
// Local IDDQ table variable
IddqTable l_iddqt;
memset( & l_iddqt, 0x00, sizeof(IddqTable));
// Frequency step variable
double l_frequency_step_khz;
//VDM Parm block
GP_VDMParmBlock l_gp_vdmpb;
memset (&l_gp_vdmpb,0x00,sizeof(GP_VDMParmBlock));
LP_VDMParmBlock l_lp_vdmpb;
memset (&l_lp_vdmpb, 0x00, sizeof(LP_VDMParmBlock));
//Resonant Clocking setup
ResonantClockingSetup l_resclk_setup;
memset (&l_resclk_setup,0x00, sizeof(ResonantClockingSetup));
//IVRM Parm block
IvrmParmBlock l_ivrmpb;
memset (&l_ivrmpb, 0x00,sizeof(IvrmParmBlock));
// VPD voltage and frequency biases
VpdBias l_vpdbias[NUM_OP_POINTS];
memset (l_vpdbias,0,sizeof(VpdBias));
// -------------------------
// Get all attributes needed
// -------------------------
FAPI_INF("Getting Attributes to build Pstate Superstructure");
FAPI_TRY(proc_get_attributes(i_target, &attr), "Get attributes function failed");
//if PSTATES_MODE is off then we dont need to execute further to collect
//the data.
if (attr.attr_pstate_mode == fapi2::ENUM_ATTR_SYSTEM_PSTATES_MODE_OFF)
{
FAPI_INF("Pstate mode is to not boot the PGPE. Thus, none of the parameter blocks will be constructed");
// Set the io_size to 0 so that memory allocation issues won't be
// detected by the caller.
io_size = 0;
break;
}
// ----------------
// get #V data
// ----------------
FAPI_IMP("Getting #V Data");
uint8_t l_poundv_bucketId = 0;
// clear MVPD array
memset(attr_mvpd_voltage_control, 0, sizeof(attr_mvpd_voltage_control));
fapi2::voltageBucketData_t l_poundv_data;
FAPI_TRY(proc_get_mvpd_data(i_target, attr_mvpd_voltage_control,
&valid_pdv_points,
&present_chiplets,
l_poundv_bucketId,
&l_poundv_data, &l_state),
"proc_get_mvpd_data function failed to retrieve pound V data");
if (!present_chiplets)
{
FAPI_IMP("**** WARNING : There are no EQ chiplets present which means there is no valid #V VPD");
FAPI_IMP("**** WARNING : Pstates and all related functions will NOT be enabled.");
l_state.iv_pstates_enabled = false;
l_state.iv_resclk_enabled = false;
l_state.iv_resclk_enabled = false;
l_state.iv_wof_enabled = false;
// Set the io_size to 0 so that memory allocation issues won't be
// detected by the caller.
io_size = 0;
break;
}
FAPI_DBG("Pstate Base Frequency - Raw %X (%d)",
attr_mvpd_voltage_control[ULTRA][0] * 1000,
attr_mvpd_voltage_control[ULTRA][0] * 1000);
//Calculate freq step value
l_frequency_step_khz = (attr.attr_freq_proc_refclock_khz /
attr.attr_proc_dpll_divider);
VpdOperatingPoint l_raw_operating_points[NUM_OP_POINTS];
FAPI_INF("Load RAW VPD");
FAPI_TRY(load_mvpd_operating_point(attr_mvpd_voltage_control,
l_raw_operating_points,
l_frequency_step_khz),
"Loading MVPD operating point failed");
// ---------------------------------------------
// process external and internal bias attributes
// ---------------------------------------------
FAPI_IMP("Apply Biasing to #V");
FAPI_TRY(proc_get_extint_bias(attr_mvpd_voltage_control,
&attr,
l_vpdbias),
"Bias application function failed");
//Validating Bias values
FAPI_INF("Validate Biasd Voltage and Frequency values");
FAPI_TRY(proc_chk_valid_poundv( i_target,
attr_mvpd_voltage_control,
&valid_pdv_points,
i_target.getChipletNumber(),
l_poundv_bucketId,
&l_state,true));
FAPI_DBG("Pstate Base Frequency - after bias %X (%d)",
attr_mvpd_voltage_control[ULTRA][0] * 1000,
attr_mvpd_voltage_control[ULTRA][0] * 1000);
// -----------------------------------------------
// System power distribution parameters
// -----------------------------------------------
// VDD rail
l_vdd_sysparm.loadline_uohm = revle32(attr.attr_proc_r_loadline_vdd_uohm);
l_vdd_sysparm.distloss_uohm = revle32(attr.attr_proc_r_distloss_vdd_uohm);
l_vdd_sysparm.distoffset_uv = revle32(attr.attr_proc_vrm_voffset_vdd_uv);
// VCS rail
l_vcs_sysparm.loadline_uohm = revle32(attr.attr_proc_r_loadline_vcs_uohm);
l_vcs_sysparm.distloss_uohm = revle32(attr.attr_proc_r_distloss_vcs_uohm);
l_vcs_sysparm.distoffset_uv = revle32(attr.attr_proc_vrm_voffset_vcs_uv);
// VDN rail
l_vdn_sysparm.loadline_uohm = revle32(attr.attr_proc_r_loadline_vdn_uohm);
l_vdn_sysparm.distloss_uohm = revle32(attr.attr_proc_r_distloss_vdn_uohm);
l_vdn_sysparm.distoffset_uv = revle32(attr.attr_proc_vrm_voffset_vdn_uv);
//if wof is disabled.. don't call IQ function
if (is_wof_enabled(i_target,&l_state))
{
// ----------------
// get IQ (IDDQ) data
// ----------------
FAPI_INF("Getting IQ (IDDQ) Data");
l_rc = proc_get_mvpd_iddq(i_target, &l_iddqt, &l_state);
if (l_rc)
{
FAPI_ASSERT_NOEXIT(false,
fapi2::PSTATE_PB_IQ_ACCESS_ERROR(fapi2::FAPI2_ERRL_SEV_RECOVERED)
.set_CHIP_TARGET(i_target)
.set_FAPI_RC(l_rc),
"Pstate Parameter Block proc_get_mvpd_iddq function failed");
fapi2::current_err = fapi2::FAPI2_RC_SUCCESS;
}
}
else
{
FAPI_INF("Skipping IQ (IDDQ) Data as WOF is disabled");
l_state.iv_wof_enabled = false;
}
// ----------------
// get VDM Parameters data
// ----------------
FAPI_INF("Getting VDM Parameters Data");
FAPI_TRY(proc_get_vdm_parms(i_target, &attr, &l_gp_vdmpb));
// Note: the proc_get_mvpd_poundw has the conditional checking for VDM
// and WOF enablement as #W has both VDM and WOF content
l_rc = proc_get_mvpd_poundw(i_target,
l_poundv_bucketId,
&l_lp_vdmpb,
&l_poundw_data,
l_poundv_data, &l_state);
if (l_rc)
{
FAPI_ASSERT_NOEXIT(false,
fapi2::PSTATE_PB_POUND_W_ACCESS_FAIL(fapi2::FAPI2_ERRL_SEV_RECOVERED)
.set_CHIP_TARGET(i_target)
.set_FAPI_RC(l_rc),
"Pstate Parameter Block proc_get_mvpd_poundw function failed");
fapi2::current_err = fapi2::FAPI2_RC_SUCCESS;
}
// ----------------
// get IVRM Parameters data
// ----------------
FAPI_INF("Getting IVRM Parameters Data");
FAPI_TRY(proc_get_ivrm_parms(i_target,
&attr,
&l_ivrmpb,
&l_state));
// -----------------------------------------------
// Global parameter block
// -----------------------------------------------
// Needs to be Endianness corrected going into the block
l_globalppb.magic = revle64(PSTATE_PARMSBLOCK_MAGIC);
l_globalppb.options.options = 0; // until options get defined.
// Pstate Options @todo RTC 161279, Check what needs to be populated here
// @todo RTC 161279 - Corresponds to Pstate 0 . Setting to ULTRA TURBO
// frequency point.
// FIXME this should be the l_operating_points[VPD_PT_SET_BIASED][ULTRA].
// frequency_mhz value with p9_pstate_compute_vpd_pts ahead of this!!!!
l_globalppb.reference_frequency_khz =
revle32((attr_mvpd_voltage_control[ULTRA][0] * 1000));
FAPI_INF("Pstate Base Frequency %X (%d)",
revle32(l_globalppb.reference_frequency_khz),
revle32(l_globalppb.reference_frequency_khz));
// frequency_step_khz
l_globalppb.frequency_step_khz = revle32(l_frequency_step_khz);
l_globalppb.nest_frequency_mhz = revle32(attr.attr_nest_frequency_mhz);
// External VRM parameters
l_globalppb.ext_vrm_transition_start_ns =
revle32(attr.attr_ext_vrm_transition_start_ns);
l_globalppb.ext_vrm_transition_rate_inc_uv_per_us =
revle32(attr.attr_ext_vrm_transition_rate_inc_uv_per_us);
l_globalppb.ext_vrm_transition_rate_dec_uv_per_us =
revle32(attr.attr_ext_vrm_transition_rate_dec_uv_per_us);
l_globalppb.ext_vrm_stabilization_time_us =
revle32(attr.attr_ext_vrm_stabilization_time_us);
l_globalppb.ext_vrm_step_size_mv =
revle32(attr.attr_ext_vrm_step_size_mv);
// -----------------------------------------------
// populate VpdOperatingPoint with biased MVPD attributes
// -----------------------------------------------
FAPI_INF("Load VPD");
// VPD operating point
FAPI_TRY(load_mvpd_operating_point(attr_mvpd_voltage_control,
l_globalppb.operating_points,
l_frequency_step_khz),
"Loading MVPD operating point failed");
// VpdBias External and Internal Biases for Global and Local parameter
// block
for (uint8_t i = 0; i < NUM_OP_POINTS; i++)
{
l_globalppb.ext_biases[i] = l_vpdbias[i];
l_globalppb.int_biases[i] = l_vpdbias[i];
l_localppb.ext_biases[i] = l_vpdbias[i];
l_localppb.int_biases[i] = l_vpdbias[i];
}
l_globalppb.vdd_sysparm = l_vdd_sysparm;
l_globalppb.vcs_sysparm = l_vcs_sysparm;
l_globalppb.vdn_sysparm = l_vdn_sysparm;
// safe_voltage_mv
l_globalppb.safe_voltage_mv = revle32(attr.attr_pm_safe_voltage_mv);
// safe_frequency_khz
l_globalppb.safe_frequency_khz =
revle32(attr.attr_pm_safe_frequency_mhz / 1000);
// vrm_stepdelay_range -@todo RTC 161279 potential attributes to be defined
// vrm_stepdelay_value -@todo RTC 161279 potential attributes to be defined
VpdOperatingPoint l_operating_points[NUM_VPD_PTS_SET][NUM_OP_POINTS];
// Compute VPD points
p9_pstate_compute_vpd_pts(l_operating_points,
&l_globalppb,
l_raw_operating_points);
memcpy(l_globalppb.operating_points_set,
l_operating_points,
sizeof(l_operating_points));
// ----------------
// get Resonant clocking attributes
// ----------------
{
if (attr.attr_resclk_disable == fapi2::ENUM_ATTR_SYSTEM_RESCLK_DISABLE_OFF)
{
FAPI_TRY(proc_set_resclk_table_attrs(i_target,
&l_state),
"proc_set_resclk_table_attrs failed");
if (l_state.iv_resclk_enabled)
{
FAPI_TRY(proc_res_clock_setup(i_target,
&l_resclk_setup,
&l_globalppb));
l_localppb.resclk = l_resclk_setup;
l_globalppb.resclk = l_resclk_setup;
}
FAPI_INF("Resonant Clocks are enabled");
}
else
{
l_state.iv_resclk_enabled = false;
FAPI_INF("Resonant Clocks are disabled. Skipping setup.");
}
}
// VDMParmBlock vdm
l_globalppb.vdm = l_gp_vdmpb;
// IvrmParmBlock
l_globalppb.ivrm = l_ivrmpb;
// Calculate pre-calculated slopes
p9_pstate_compute_PsV_slopes(l_operating_points, &l_globalppb); //Remote this RTC: 174743
p9_pstate_compute_PStateV_slope(l_operating_points, &l_globalppb);
l_globalppb.dpll_pstate0_value =
revle32(revle32(l_globalppb.reference_frequency_khz) /
revle32(l_globalppb.frequency_step_khz));
FAPI_INF("l_globalppb.dpll_pstate0_value %X",
revle32(l_globalppb.dpll_pstate0_value));
// -----------------------------------------------
// Local parameter block
// -----------------------------------------------
l_localppb.magic = revle64(LOCAL_PARMSBLOCK_MAGIC);
// VPD operating point
FAPI_TRY(load_mvpd_operating_point(attr_mvpd_voltage_control,
l_localppb.operating_points,
l_frequency_step_khz),
"Loading MVPD operating point failed");
l_localppb.vdd_sysparm = l_vdd_sysparm;
// IvrmParmBlock
l_localppb.ivrm = l_ivrmpb;
// VDMParmBlock
l_localppb.vdm = l_lp_vdmpb;
l_localppb.dpll_pstate0_value =
revle32(revle32(l_globalppb.reference_frequency_khz) /
revle32(l_globalppb.frequency_step_khz));
FAPI_INF("l_localppb.dpll_pstate0_value %X",
revle32(l_localppb.dpll_pstate0_value));
uint8_t l_biased_pstate[NUM_OP_POINTS];
for (uint8_t i = 0; i < NUM_OP_POINTS; ++i)
{
l_biased_pstate[i] = l_operating_points[VPD_PT_SET_BIASED][i].pstate;
FAPI_INF ("l_biased_pstate %d ", l_biased_pstate[i]);
}
if (attr.attr_system_vdm_disable == fapi2::ENUM_ATTR_SYSTEM_VDM_DISABLE_OFF)
{
p9_pstate_compute_vdm_threshold_pts(l_poundw_data, &l_localppb);
// VID slope calculation
p9_pstate_compute_PsVIDCompSlopes_slopes(l_poundw_data,
&l_localppb,
l_biased_pstate);
// VDM threshold slope calculation
p9_pstate_compute_PsVDMThreshSlopes(&l_localppb, l_biased_pstate);
// VDM Jump slope calculation
p9_pstate_compute_PsVDMJumpSlopes (&l_localppb, l_biased_pstate);
//Initializing threshold values for GPPB
memcpy ( l_globalppb.vid_point_set,
l_localppb.vid_point_set,
sizeof(l_localppb.vid_point_set));
memcpy ( l_globalppb.threshold_set,
l_localppb.threshold_set,
sizeof(l_localppb.threshold_set));
memcpy ( l_globalppb.PsVIDCompSlopes,
l_localppb.PsVIDCompSlopes,
sizeof(l_localppb.PsVIDCompSlopes));
memcpy ( l_globalppb.PsVDMThreshSlopes,
l_localppb.PsVDMThreshSlopes,
sizeof(l_localppb.PsVDMThreshSlopes));
memcpy ( l_globalppb.PsVDMJumpSlopes,
l_localppb.PsVDMJumpSlopes,
sizeof(l_localppb.PsVDMJumpSlopes));
}
// -----------------------------------------------
// OCC parameter block
// -----------------------------------------------
l_occppb.magic = revle64(OCC_PARMSBLOCK_MAGIC);
// VPD operating point
FAPI_TRY(load_mvpd_operating_point(attr_mvpd_voltage_control, l_occppb.operating_points, l_frequency_step_khz),
"Loading MVPD operating point failed");
l_occppb.vdd_sysparm = l_vdd_sysparm;
l_occppb.vcs_sysparm = l_vcs_sysparm;
l_occppb.vdn_sysparm = l_vdn_sysparm;
// frequency_min_khz - Value from Power save operating point after biases
l_occppb.frequency_min_khz = revle32(attr_mvpd_voltage_control[VPD_PV_POWERSAVE][0] * 1000);
// frequency_max_khz - Value from Ultra Turbo operating point after biases
l_occppb.frequency_max_khz = revle32(attr_mvpd_voltage_control[VPD_PV_ULTRA][0] * 1000);
// frequency_step_khz
l_occppb.frequency_step_khz = revle32(l_frequency_step_khz);
//Power bus nest freq
uint16_t l_pbus_nest_freq = revle16(l_poundv_data.pbFreq);
FAPI_INF("l_pbus_nest_freq %x", (l_pbus_nest_freq));
// I- VDN PB current
uint16_t l_vpd_idn_100ma = revle16(l_poundv_data.IdnPbCurr);
FAPI_INF("l_vpd_idn_100ma %x", (l_vpd_idn_100ma));
if (is_wof_enabled(i_target,&l_state))
{
// Iddq Table
l_occppb.iddq = l_iddqt;
l_occppb.wof.tdp_rdp_factor = revle32(attr.attr_tdp_rdp_current_factor);
FAPI_INF("l_occppb.wof.tdp_rdp_factor %x", revle32(l_occppb.wof.tdp_rdp_factor));
// nest leakage percent
l_occppb.nest_leakage_percent = attr.attr_nest_leakage_percent;
FAPI_INF("l_occppb.nest_leakage_percent %x", l_occppb.nest_leakage_percent);
l_occppb.lac_tdp_vdd_turbo_10ma =
revle16(l_poundw_data.poundw[TURBO].ivdd_tdp_ac_current_10ma);
l_occppb.lac_tdp_vdd_nominal_10ma =
revle16(l_poundw_data.poundw[NOMINAL].ivdd_tdp_ac_current_10ma);
FAPI_INF("l_occppb.lac_tdp_vdd_turbo_10ma %x", l_occppb.lac_tdp_vdd_turbo_10ma);
FAPI_INF("l_occppb.lac_tdp_vdd_nominal_10ma %x",l_occppb.lac_tdp_vdd_nominal_10ma);
//Power bus vdn voltage
uint16_t l_vpd_vdn_mv = revle16(l_poundv_data.VdnPbVltg);
FAPI_INF("l_vpd_vdn_mv %x", (l_vpd_vdn_mv));
uint8_t l_nest_leakage_for_occ = 75;
uint16_t l_iac_tdp_vdn = get_iac_vdn_value ( l_vpd_vdn_mv,
l_iddqt,
l_nest_leakage_for_occ,
l_vpd_idn_100ma);
if (!l_iac_tdp_vdn)
{
l_state.iv_wof_enabled = false;
}
else
{
l_occppb.ceff_tdp_vdn =
revle16(
pstate_calculate_effective_capacitance(l_iac_tdp_vdn,
l_vpd_vdn_mv * 1000,
l_pbus_nest_freq)
);
}
FAPI_INF("l_iac_tdp_vdn %x", l_iac_tdp_vdn);
FAPI_INF("l_occppb.ceff_tdp_vdn %x", revle16(l_occppb.ceff_tdp_vdn));
}
else
{
l_state.iv_wof_enabled = false;
}
// @todo RTC 161279 - Need Pstate 0 definition and freq2pstate function to be coded
Pstate pstate_min;
int rc = freq2pState(&l_globalppb, revle32(l_occppb.frequency_min_khz), &pstate_min);
switch (rc)
{
case -PSTATE_LT_PSTATE_MIN:
FAPI_INF("OCC Minimum Frequency was clipped to Pstate 0");
break;
case -PSTATE_GT_PSTATE_MAX:
FAPI_INF("OCC Minimum FrequenL1617cy %d KHz is outside the range that can be represented"
" by a Pstate with a base frequency of %d KHz and step size %d KHz",
revle32(l_occppb.frequency_min_khz),
revle32(l_globalppb.reference_frequency_khz),
revle32(l_globalppb.frequency_step_khz));
FAPI_INF("Pstate is set to %X (%d)", pstate_min);
break;
}
l_occppb.pstate_min = pstate_min;
//Check WOF is enabled or not
io_size = 0;
if (is_wof_enabled(i_target,&l_state))
{
p9_pstate_wof_initialization(&l_globalppb,
o_buf,
io_size,
&l_state,
attr_mvpd_voltage_control[VPD_PV_ULTRA][0]);
}
else
{
FAPI_INF("WOF is not enabled");
l_state.iv_wof_enabled = false;
}
l_occppb.wof.wof_enabled = l_state.iv_wof_enabled;
// QuadManagerFlags
QuadManagerFlags l_qm_flags;
FAPI_TRY(p9_pstate_set_global_feature_attributes(i_target,
l_state,
&l_qm_flags));
l_localppb.qmflags = l_qm_flags;
// Put out the Parmater Blocks to the trace
gppb_print(&(l_globalppb));
oppb_print(&(l_occppb));
// Populate Global,local and OCC parameter blocks into Pstate super structure
(*io_pss).globalppb = l_globalppb;
(*io_pss).localppb = l_localppb;
(*io_pss).occppb = l_occppb;
}
while(0);
fapi_try_exit:
FAPI_DBG("< p9_pstate_parameter_block");
return fapi2::current_err;
}
// END OF PSTATE PARAMETER BLOCK function
void
p9_pstate_wof_initialization (const GlobalPstateParmBlock* i_gppb,
uint8_t* o_buf,
uint32_t& io_size,
PSTATE_attribute_state* o_state,
const uint32_t i_base_state_frequency)
{
FAPI_DBG(">> WOF initialization");
fapi2::ReturnCode l_rc = 0;
//this structure has VFRT header + data
HomerVFRTLayout_t l_vfrt;
memset (&l_vfrt, 0, sizeof(l_vfrt));
// Use new to avoid over-running the stack
fapi2::ATTR_WOF_TABLE_DATA_Type* l_wof_table_data =
(fapi2::ATTR_WOF_TABLE_DATA_Type*)new fapi2::ATTR_WOF_TABLE_DATA_Type;
FAPI_DBG("l_wof_table_data addr = %p size = %d",
l_wof_table_data, sizeof(fapi2::ATTR_WOF_TABLE_DATA_Type));
do
{
// If this attribute is set, fill in l_wof_table_data with the VFRT data
// from the internal, static table.
const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
fapi2::ATTR_SYS_VFRT_STATIC_DATA_ENABLE_Type l_sys_vfrt_static_data = 0;
FAPI_ATTR_GET(fapi2::ATTR_SYS_VFRT_STATIC_DATA_ENABLE,
FAPI_SYSTEM,
l_sys_vfrt_static_data);
if (l_sys_vfrt_static_data)
{
FAPI_DBG("ATTR_SYS_VFRT_STATIC_DATA_ENABLE is SET");
// Copy WOF header data
memcpy (l_wof_table_data, g_wofData, sizeof(g_wofData));
uint32_t l_index = sizeof(g_wofData);
WofTablesHeader_t* p_wfth;
p_wfth = reinterpret_cast<WofTablesHeader_t*>(l_wof_table_data);
FAPI_INF("WFTH: %X", revle32(p_wfth->magic_number));
memcpy(&l_vfrt, &g_sysvfrtData, sizeof (g_sysvfrtData));
for (uint32_t vdn = 0; vdn < CEF_VDN_INDEX; ++vdn)
{
l_vfrt.vfrtHeader.res_vdnId = vdn;
for (uint32_t vdd = 0; vdd < CEF_VDD_INDEX; ++vdd)
{
for (uint32_t qid = 0; qid < ACTIVE_QUADS; ++qid)
{
l_vfrt.vfrtHeader.VddId_QAId = vdd << 4 | qid;
FAPI_DBG(" l_vfrt.vfrtHeader res_vdnId = %1X VddId_QAId = 0x%2X",
l_vfrt.vfrtHeader.res_vdnId,
l_vfrt.vfrtHeader.VddId_QAId);
memcpy((*l_wof_table_data) + l_index, &l_vfrt, sizeof (l_vfrt));
l_index += sizeof (g_sysvfrtData);
}
}
}
io_size = l_index;
FAPI_DBG(" io_size = %d", io_size);
}
else
{
FAPI_DBG("ATTR_SYS_VFRT_STATIC_DATA_ENABLE is not SET");
// Read System VFRT data
l_rc = FAPI_ATTR_GET(fapi2::ATTR_WOF_TABLE_DATA,
FAPI_SYSTEM,
(*l_wof_table_data));
if (l_rc)
{
FAPI_INF("Pstate Parameter Block ATTR_WOF_TABLE_DATA attribute failed. Disabling WOF");
o_state->iv_wof_enabled = false;
// Write the returned error content to the error log
fapi2::logError(l_rc,fapi2::FAPI2_ERRL_SEV_RECOVERED);
break;
}
}
// Copy WOF header data
memcpy (o_buf, (*l_wof_table_data), sizeof(WofTablesHeader_t));
uint32_t l_wof_table_index = sizeof(WofTablesHeader_t);
uint32_t l_index = sizeof(WofTablesHeader_t);
//Validate WOF header part
WofTablesHeader_t* p_wfth;
p_wfth = reinterpret_cast<WofTablesHeader_t*>(o_buf);
FAPI_INF("WFTH: %X", revle32(p_wfth->magic_number));
bool l_wof_header_data_state = 1;
VALIDATE_WOF_HEADER_DATA(p_wfth->magic_number,
p_wfth->reserved_version,
p_wfth->vfrt_block_size,
p_wfth->vfrt_block_header_size,
p_wfth->vfrt_data_size,
p_wfth->quads_active_size,
p_wfth->core_count,
l_wof_header_data_state);
if (!l_wof_header_data_state)
{
o_state->iv_wof_enabled = false;
FAPI_ASSERT_NOEXIT(false,
fapi2::PSTATE_PB_WOF_HEADER_DATA_INVALID(fapi2::FAPI2_ERRL_SEV_RECOVERED)
.set_CHIP_TARGET(FAPI_SYSTEM)
.set_MAGIC_NUMBER(p_wfth->magic_number)
.set_VERSION(p_wfth->reserved_version)
.set_VFRT_BLOCK_SIZE(p_wfth->vfrt_block_size)
.set_VFRT_HEADER_SIZE(p_wfth->vfrt_block_header_size)
.set_VFRT_DATA_SIZE(p_wfth->vfrt_data_size)
.set_QUADS_ACTIVE_SIZE(p_wfth->quads_active_size)
.set_CORE_COUNT(p_wfth->core_count),
"Pstate Parameter Block WOF Header validation failed");
break;
}
// Convert system vfrt to homer vfrt
for (uint32_t vfrt_index = 0;
vfrt_index < (CEF_VDN_INDEX * CEF_VDD_INDEX * ACTIVE_QUADS);
++vfrt_index)
{
p9_pstate_update_vfrt (i_gppb,
((*l_wof_table_data) + l_wof_table_index),
&l_vfrt,
i_base_state_frequency);
FAPI_INF("VFRT: %X", l_vfrt.vfrtHeader.magic_number);
// Check for "VT" at the start of the magic number
if (revle16(l_vfrt.vfrtHeader.magic_number) != 0x5654)
{
o_state->iv_wof_enabled = false;
FAPI_ASSERT_NOEXIT(false,
fapi2::PSTATE_PB_VFRT_HEADER_DATA_INVALID(fapi2::FAPI2_ERRL_SEV_RECOVERED)
.set_CHIP_TARGET(FAPI_SYSTEM)
.set_MAGIC_NUMBER(l_vfrt.vfrtHeader.magic_number)
.set_VFRT_INDEX(vfrt_index),
"Pstate Parameter Block: Invalid VFRT Magic word");
break;
}
l_wof_table_index += 128; //System vFRT size is 128B..hence need to jump after each VFRT entry
memcpy(o_buf + l_index, &l_vfrt, sizeof (l_vfrt));
l_index += sizeof (l_vfrt);
}
io_size = l_index;
} while(0);
delete l_wof_table_data;
fapi2::current_err = fapi2::FAPI2_RC_SUCCESS;