PM: Fixed generation of MTSPR instruction in STOP API.

STOP API generates SPR restore instruction for a given SPR.
Commit fixes the generation of mtspr instruction by API.
Problem will show up only when API is changed to generate
restore instruction using a GPR other than R0.

CQ: SW407799
Change-Id: I2a841a9aae417b7bcd92a323197d9c6a1f3cb149
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49525
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: STEWART E. SMITH <stewart@linux.vnet.ibm.com>
Dev-Ready: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49529
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>

src/import/chips/p9/procedures/utils/stopreg/p9_stop_api.C

@@ -258,7 +258,7 @@ static uint32_t getMtsprInstruction( const uint16_t i_Rs, const uint16_t i_Spr )
     uint32_t mtsprInstOpcode = 0;
     uint32_t temp = (( i_Spr & 0x03FF ) << 11);
     mtsprInstOpcode = (uint8_t)i_Rs << 21;
-    mtsprInstOpcode = ( temp  & 0x0000F800 ) << 5;
+    mtsprInstOpcode |= ( temp  & 0x0000F800 ) << 5;
     mtsprInstOpcode |= ( temp & 0x001F0000 ) >> 5;
     mtsprInstOpcode |= MTSPR_BASE_OPCODE;