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TP, Nest FIR updates -- DD2 updates to match RAS XML
TP Pervasive LFIR - mark bit 21 recoverable to match XML specification - add Nimbus-only workaround for XBUS PLL lock reporting - adjust MEM PLL reset,setup routines to avoid generating spurious attention from MEM PLL FBC IOE TL FIR - mask bits 9,12,15 to match XML specification - mark bits 56..58 checkstop to match XML specification FBC IOO DL FIR - mask bits 56..59, 62..63 to match XML specification - mark bits 60..61 recoverable to match XML specification IO OBUS FIR - mark bit 2 recoverable to match XML specification CXA FIR - update initfile to handle change in number of implemented bits from Nimbus DD1 to DD2 NX CQ FIR - mark bits 6,16,20..21,23..24,28,39 checkstop to match XML specification - mark bit 11 recoverable to match XML specification changes Change-Id: Ic2bdf913ef98b6ad1ae6b94fe1e8a2ae8dacad70 Original-Change-Id: Ic954b2281d1d86ad91e7cd4952923af8c0fa0d8b CQ: HW415692 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42905 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55552 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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