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RAS_XML: updates to sync the XML with actual values from hardware
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Change-Id: I590d6790cd391ff4be984001acd41c6a1ba48a06
CQ: SW445620
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63398
Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com>
Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63840
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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@zane131 @crgeddes
zane131 authored and crgeddes committed Sep 18, 2018
1 parent f04d03f commit 09b976d
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Showing 2 changed files with 28 additions and 10 deletions.
20 changes: 10 additions & 10 deletions src/import/chips/p9/procedures/hwp/initfiles/p9_npu_scom.C
View file
Original file line number Diff line number Diff line change
Expand Up @@ -65,14 +65,14 @@ constexpr uint64_t literal_0xFFFFFFFFFFFFFFFF = 0xFFFFFFFFFFFFFFFF;
constexpr uint64_t literal_0x7F60B04500AE0000 = 0x7F60B04500AE0000;
constexpr uint64_t literal_0x8005000200100000 = 0x8005000200100000;
constexpr uint64_t literal_0xFF65B04700FE0000 = 0xFF65B04700FE0000;
constexpr uint64_t literal_0x5550F40000000003 = 0x5550F40000000003;
constexpr uint64_t literal_0x5550F4000FFFFFFF = 0x5550F4000FFFFFFF;
constexpr uint64_t literal_0xFFF70A5DF0000000 = 0xFFF70A5DF0000000;
constexpr uint64_t literal_0x000801A200000000 = 0x000801A200000000;
constexpr uint64_t literal_0xFFFF0BFFF0000000 = 0xFFFF0BFFF0000000;
constexpr uint64_t literal_0x009A48180F01FFFF = 0x009A48180F01FFFF;
constexpr uint64_t literal_0x8005000200500000 = 0x8005000200500000;
constexpr uint64_t literal_0b10 = 0b10;
constexpr uint64_t literal_0x0000F40000000003 = 0x0000F40000000003;
constexpr uint64_t literal_0x0000F4000FFFFFFF = 0x0000F4000FFFFFFF;
constexpr uint64_t literal_0xF000003FF00C0FFF = 0xF000003FF00C0FFF;
constexpr uint64_t literal_0x0000100000024000 = 0x0000100000024000;

Expand Down Expand Up @@ -5263,11 +5263,11 @@ fapi2::ReturnCode p9_npu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&

if (((l_def_NVLINK_ACTIVE == literal_1) && (l_def_ENABLE_NPU_FREEZE == literal_0)))
{
l_scom_buffer.insert<0, 64, 0, uint64_t>(literal_0x5550F40000000003 );
l_scom_buffer.insert<0, 64, 0, uint64_t>(literal_0x5550F4000FFFFFFF );
}
else if (((l_def_NVLINK_ACTIVE == literal_1) && (l_def_ENABLE_NPU_FREEZE == literal_1)))
{
l_scom_buffer.insert<0, 64, 0, uint64_t>(literal_0x5550F40000000003 );
l_scom_buffer.insert<0, 64, 0, uint64_t>(literal_0x5550F4000FFFFFFF );
}
else if ((l_def_NVLINK_ACTIVE == literal_0))
{
Expand Down Expand Up @@ -6681,11 +6681,11 @@ fapi2::ReturnCode p9_npu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&
{
if (((l_def_NVLINK_ACTIVE == literal_1) && (l_def_ENABLE_NPU_FREEZE == literal_0)))
{
l_scom_buffer.insert<0, 64, 0, uint64_t>(literal_0x5550F40000000003 );
l_scom_buffer.insert<0, 64, 0, uint64_t>(literal_0x5550F4000FFFFFFF );
}
else if (((l_def_NVLINK_ACTIVE == literal_1) && (l_def_ENABLE_NPU_FREEZE == literal_1)))
{
l_scom_buffer.insert<0, 64, 0, uint64_t>(literal_0x5550F40000000003 );
l_scom_buffer.insert<0, 64, 0, uint64_t>(literal_0x5550F4000FFFFFFF );
}
else if ((l_def_NVLINK_ACTIVE == literal_0))
{
Expand All @@ -6697,11 +6697,11 @@ fapi2::ReturnCode p9_npu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&
{
if (((l_def_NVLINK_ACTIVE == literal_1) && (l_def_ENABLE_NPU_FREEZE == literal_0)))
{
l_scom_buffer.insert<0, 64, 0, uint64_t>(literal_0x5550F40000000003 );
l_scom_buffer.insert<0, 64, 0, uint64_t>(literal_0x5550F4000FFFFFFF );
}
else if (((l_def_NVLINK_ACTIVE == literal_1) && (l_def_ENABLE_NPU_FREEZE == literal_1)))
{
l_scom_buffer.insert<0, 64, 0, uint64_t>(literal_0x0000F40000000003 );
l_scom_buffer.insert<0, 64, 0, uint64_t>(literal_0x0000F4000FFFFFFF );
}
else if ((l_def_NVLINK_ACTIVE == literal_0))
{
Expand Down Expand Up @@ -6957,11 +6957,11 @@ fapi2::ReturnCode p9_npu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&

if (((l_def_NVLINK_ACTIVE == literal_1) && (l_def_ENABLE_NPU_FREEZE == literal_0)))
{
l_scom_buffer.insert<0, 64, 0, uint64_t>(literal_0x5550F40000000003 );
l_scom_buffer.insert<0, 64, 0, uint64_t>(literal_0x5550F4000FFFFFFF );
}
else if (((l_def_NVLINK_ACTIVE == literal_1) && (l_def_ENABLE_NPU_FREEZE == literal_1)))
{
l_scom_buffer.insert<0, 64, 0, uint64_t>(literal_0x0000F40000000003 );
l_scom_buffer.insert<0, 64, 0, uint64_t>(literal_0x0000F4000FFFFFFF );
}
else if ((l_def_NVLINK_ACTIVE == literal_0))
{
Expand Down
18 changes: 18 additions & 0 deletions src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
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Original file line number Diff line number Diff line change
Expand Up @@ -7790,6 +7790,24 @@
</chipEcFeature>
</attribute>
<!-- ******************************************************************** -->
<attribute>
<id>ATTR_CHIP_EC_FEATURE_CORE_RECOVERY_WA</id>
<targetType>TARGET_TYPE_PROC_CHIP</targetType>
<description>
Unmask L2 FIR bit 39 to serve as PRD signalling mechanism
for core recovery
</description>
<chipEcFeature>
<chip>
<name>ENUM_ATTR_NAME_NIMBUS</name>
<ec>
<value>0x20</value>
<test>LESS_THAN</test>
</ec>
</chip>
</chipEcFeature>
</attribute>
<!-- ******************************************************************** -->
<attribute>
<id>ATTR_CHIP_EC_FEATURE_SW432374</id>
<targetType>TARGET_TYPE_PROC_CHIP</targetType>
Expand Down

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