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Update iom busctl registers to MC target.
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Update dmi_dccal to use MC target for busctl registers.

Change-Id: I1f1ffb4bf23a3f634e5712f410d37413d2843771
Original-Change-Id: I2da493a558ade5824065f23821dfbb980e564eea
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44670
Dev-Ready: Benjamin Gass <bgass@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Christopher W. Steffen <cwsteffen@us.ibm.com>
Reviewed-by: John G. Rell III <jgrell@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45794
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Thomas R. Sand <trsand@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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BenAtIBM authored and crgeddes committed Sep 11, 2017
1 parent 900541d commit 0e89fa3
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Showing 3 changed files with 51 additions and 26 deletions.
9 changes: 8 additions & 1 deletion src/import/chips/p9/common/scominfo/p9_scom_addr.H
Expand Up @@ -540,12 +540,19 @@ extern "C"
}

/// @brief Extract the RX or TX Group ID of an indirect scom address
/// @retval uint8_t Satellite register offset field value
/// @retval uint8_t RX/TX group id
inline uint8_t get_rxtx_group_id()
{
return (iv_addr >> 37) & 0x3F;
}

/// @brief Extract the indirect address field of a scom address
/// @retval uint16_t indirect address field
inline uint16_t get_ind_addr()
{
return (iv_addr >> 43) & 0x1FF;
}

/// @brief Modify SCOM address, update the RX or TX Group ID
/// @param[in] i_grp_id Group id to set
/// @retval none
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64 changes: 39 additions & 25 deletions src/import/chips/p9/common/scominfo/p9_scominfo.C
Expand Up @@ -866,42 +866,56 @@ extern "C"
l_sat_offset == P9C_MC_OFFSET_IND )
{
uint32_t l_rxtx_grp = l_scom.get_rxtx_group_id();
uint32_t l_ind_addr = l_scom.get_ind_addr();

if (l_rxtx_grp >= 0x20)
//From iofrc_bus_reg_intf.vhdl
//gcr_pkt_equal_addr <= (gcr_reg_reg_addr(0 to 3) = "1111")
// and not (gcr_reg_reg_addr = "111111111"); --Ignore protected FIR address
if (((l_ind_addr & 0x1E0) == 0x1E0) && (l_ind_addr != 0x1FF))
{
l_rxtx_grp -= 0x20;
o_chipUnitRelated = true;
o_chipUnitPairing.push_back(p9_chipUnitPairing_t(PU_MC_CHIPUNIT,
l_chiplet_id - MC01_CHIPLET_ID));

}
else
{

uint8_t l_adder = 0;
if (l_rxtx_grp >= 0x20)
{
l_rxtx_grp -= 0x20;
}

switch (l_rxtx_grp % 4)
{
case 3:
l_adder = 0;
break;
uint8_t l_adder = 0;

case 2:
l_adder = 1;
break;
switch (l_rxtx_grp % 4)
{
case 3:
l_adder = 0;
break;

case 0:
l_adder = 2;
break;
case 2:
l_adder = 1;
break;

case 1:
l_adder = 3;
break;
case 0:
l_adder = 2;
break;

default:
//escape to bunker - math broke
break;
}
case 1:
l_adder = 3;
break;

o_chipUnitRelated = true;
o_chipUnitPairing.push_back(p9_chipUnitPairing_t(PU_DMI_CHIPUNIT,
((l_chiplet_id == MC01_CHIPLET_ID ? (0) : (4))) +
l_adder));
default:
//escape to bunker - math broke
break;
}

o_chipUnitRelated = true;
o_chipUnitPairing.push_back(p9_chipUnitPairing_t(PU_DMI_CHIPUNIT,
((l_chiplet_id == MC01_CHIPLET_ID ? (0) : (4))) +
l_adder));
}
}

}
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4 changes: 4 additions & 0 deletions src/import/chips/p9/procedures/hwp/io/p9_io_scom.H
Expand Up @@ -135,6 +135,10 @@ inline uint32_t get_base_address( const fapi2::Target < K > i_target, uint32_t&
o_base_addr = P9_DMI0_PHY_BASE_0x0701103F;
break;

case fapi2::TargetType::TARGET_TYPE_MC:
o_base_addr = P9_DMI0_PHY_BASE_0x0701103F;
break;

case fapi2::TargetType::TARGET_TYPE_ABUS:
case fapi2::TargetType::TARGET_TYPE_OBUS:
o_base_addr = P9_OBUS0_PHY_BASE_0x09010C00;
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